[deliverable/linux.git] / arch / m68k / coldfire / clk.c

/***************************************************************************/

/*
 *	clk.c -- general ColdFire CPU kernel clk handling
 *
 *	Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
 */

/***************************************************************************/

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/mutex.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfclk.h>

static DEFINE_SPINLOCK(clk_lock);

#ifdef MCFPM_PPMCR0
/*
 *	For more advanced ColdFire parts that have clocks that can be enabled
 *	we supply enable/disable functions. These must properly define their
 *	clocks in their platform specific code.
 */
void __clk_init_enabled(struct clk *clk)
{
	clk->enabled = 1;
	clk->clk_ops->enable(clk);
}

void __clk_init_disabled(struct clk *clk)
{
	clk->enabled = 0;
	clk->clk_ops->disable(clk);
}

static void __clk_enable0(struct clk *clk)
{
	__raw_writeb(clk->slot, MCFPM_PPMCR0);
}

static void __clk_disable0(struct clk *clk)
{
	__raw_writeb(clk->slot, MCFPM_PPMSR0);
}

struct clk_ops clk_ops0 = {
	.enable		= __clk_enable0,
	.disable	= __clk_disable0,
};

#ifdef MCFPM_PPMCR1
static void __clk_enable1(struct clk *clk)
{
	__raw_writeb(clk->slot, MCFPM_PPMCR1);
}

static void __clk_disable1(struct clk *clk)
{
	__raw_writeb(clk->slot, MCFPM_PPMSR1);
}

struct clk_ops clk_ops1 = {
	.enable		= __clk_enable1,
	.disable	= __clk_disable1,
};
#endif /* MCFPM_PPMCR1 */
#endif /* MCFPM_PPMCR0 */

struct clk *clk_get(struct device *dev, const char *id)
{
	const char *clk_name = dev ? dev_name(dev) : id ? id : NULL;
	struct clk *clk;
	unsigned i;

	for (i = 0; (clk = mcf_clks[i]) != NULL; ++i)
		if (!strcmp(clk->name, clk_name))
			return clk;
	pr_warn("clk_get: didn't find clock %s\n", clk_name);
	return ERR_PTR(-ENOENT);
}
EXPORT_SYMBOL(clk_get);

int clk_enable(struct clk *clk)
{
	unsigned long flags;
	spin_lock_irqsave(&clk_lock, flags);
	if ((clk->enabled++ == 0) && clk->clk_ops)
		clk->clk_ops->enable(clk);
	spin_unlock_irqrestore(&clk_lock, flags);

	return 0;
}
EXPORT_SYMBOL(clk_enable);

void clk_disable(struct clk *clk)
{
	unsigned long flags;
	spin_lock_irqsave(&clk_lock, flags);
	if ((--clk->enabled == 0) && clk->clk_ops)
		clk->clk_ops->disable(clk);
	spin_unlock_irqrestore(&clk_lock, flags);
}
EXPORT_SYMBOL(clk_disable);

void clk_put(struct clk *clk)
{
	if (clk->enabled != 0)
		pr_warn("clk_put %s still enabled\n", clk->name);
}
EXPORT_SYMBOL(clk_put);

unsigned long clk_get_rate(struct clk *clk)
{
	return clk->rate;
}
EXPORT_SYMBOL(clk_get_rate);

/***************************************************************************/
Commit	Line	Data
facdf0ed GU	1	/***************************************************************************/
	2
	3	/*
	4	* clk.c -- general ColdFire CPU kernel clk handling
	5	*
	6	* Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
	7	*/
	8
	9	/***************************************************************************/
	10
	11	#include <linux/kernel.h>
96c61242	12	#include <linux/module.h>
bea8bcb1 SK	13	#include <linux/platform_device.h>
bea8bcb1 SK	14	#include <linux/mutex.h>
facdf0ed	15	#include <linux/clk.h>
bea8bcb1 SK	16	#include <linux/io.h>
bea8bcb1 SK	17	#include <linux/err.h>
facdf0ed	18	#include <asm/coldfire.h>
bea8bcb1 SK	19	#include <asm/mcfsim.h>
bea8bcb1 SK	20	#include <asm/mcfclk.h>
facdf0ed	21
280ef31a GU	22	static DEFINE_SPINLOCK(clk_lock);
	23
	24	#ifdef MCFPM_PPMCR0
	25	/*
	26	* For more advanced ColdFire parts that have clocks that can be enabled
	27	* we supply enable/disable functions. These must properly define their
	28	* clocks in their platform specific code.
	29	*/
	30	void __clk_init_enabled(struct clk *clk)
facdf0ed	31	{
280ef31a GU	32	clk->enabled = 1;
280ef31a GU	33	clk->clk_ops->enable(clk);
facdf0ed GU	34	}
facdf0ed GU	35
280ef31a	36	void __clk_init_disabled(struct clk *clk)
facdf0ed	37	{
280ef31a GU	38	clk->enabled = 0;
280ef31a GU	39	clk->clk_ops->disable(clk);
facdf0ed GU	40	}
facdf0ed GU	41
280ef31a	42	static void __clk_enable0(struct clk *clk)
facdf0ed	43	{
280ef31a	44	__raw_writeb(clk->slot, MCFPM_PPMCR0);
facdf0ed GU	45	}
facdf0ed GU	46
280ef31a GU	47	static void __clk_disable0(struct clk *clk)
	48	{
	49	__raw_writeb(clk->slot, MCFPM_PPMSR0);
	50	}
	51
	52	struct clk_ops clk_ops0 = {
	53	.enable = __clk_enable0,
	54	.disable = __clk_disable0,
	55	};
	56
	57	#ifdef MCFPM_PPMCR1
	58	static void __clk_enable1(struct clk *clk)
facdf0ed	59	{
280ef31a	60	__raw_writeb(clk->slot, MCFPM_PPMCR1);
facdf0ed GU	61	}
facdf0ed GU	62
280ef31a	63	static void __clk_disable1(struct clk *clk)
facdf0ed	64	{
280ef31a	65	__raw_writeb(clk->slot, MCFPM_PPMSR1);
facdf0ed	66	}
280ef31a GU	67
	68	struct clk_ops clk_ops1 = {
	69	.enable = __clk_enable1,
	70	.disable = __clk_disable1,
	71	};
	72	#endif /* MCFPM_PPMCR1 */
	73	#endif /* MCFPM_PPMCR0 */
bea8bcb1 SK	74
	75	struct clk clk_get(struct device dev, const char *id)
	76	{
	77	const char *clk_name = dev ? dev_name(dev) : id ? id : NULL;
	78	struct clk *clk;
	79	unsigned i;
	80
	81	for (i = 0; (clk = mcf_clks[i]) != NULL; ++i)
	82	if (!strcmp(clk->name, clk_name))
	83	return clk;
	84	pr_warn("clk_get: didn't find clock %s\n", clk_name);
	85	return ERR_PTR(-ENOENT);
	86	}
	87	EXPORT_SYMBOL(clk_get);
	88
	89	int clk_enable(struct clk *clk)
	90	{
	91	unsigned long flags;
	92	spin_lock_irqsave(&clk_lock, flags);
	93	if ((clk->enabled++ == 0) && clk->clk_ops)
	94	clk->clk_ops->enable(clk);
	95	spin_unlock_irqrestore(&clk_lock, flags);
	96
	97	return 0;
	98	}
	99	EXPORT_SYMBOL(clk_enable);
	100
	101	void clk_disable(struct clk *clk)
	102	{
	103	unsigned long flags;
	104	spin_lock_irqsave(&clk_lock, flags);
	105	if ((--clk->enabled == 0) && clk->clk_ops)
	106	clk->clk_ops->disable(clk);
	107	spin_unlock_irqrestore(&clk_lock, flags);
	108	}
	109	EXPORT_SYMBOL(clk_disable);
	110
	111	void clk_put(struct clk *clk)
	112	{
	113	if (clk->enabled != 0)
	114	pr_warn("clk_put %s still enabled\n", clk->name);
	115	}
	116	EXPORT_SYMBOL(clk_put);
	117
	118	unsigned long clk_get_rate(struct clk *clk)
	119	{
	120	return clk->rate;
	121	}
	122	EXPORT_SYMBOL(clk_get_rate);
	123
facdf0ed	124	/***************************************************************************/