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1da177e4 LT |
1 | | |
2 | | x_fline.sa 3.3 1/10/91 | |
3 | | | |
4 | | fpsp_fline --- FPSP handler for fline exception | |
5 | | | |
6 | | First determine if the exception is one of the unimplemented | |
7 | | floating point instructions. If so, let fpsp_unimp handle it. | |
8 | | Next, determine if the instruction is an fmovecr with a non-zero | |
9 | | <ea> field. If so, handle here and return. Otherwise, it | |
10 | | must be a real F-line exception. | |
11 | | | |
12 | ||
13 | | Copyright (C) Motorola, Inc. 1990 | |
14 | | All Rights Reserved | |
15 | | | |
e00d82d0 MW |
16 | | For details on the license for this file, please see the |
17 | | file, README, in this same directory. | |
1da177e4 LT |
18 | |
19 | X_FLINE: |idnt 2,1 | Motorola 040 Floating Point Software Package | |
20 | ||
21 | |section 8 | |
22 | ||
23 | #include "fpsp.h" | |
24 | ||
25 | |xref real_fline | |
26 | |xref fpsp_unimp | |
27 | |xref uni_2 | |
28 | |xref mem_read | |
29 | |xref fpsp_fmt_error | |
30 | ||
31 | .global fpsp_fline | |
32 | fpsp_fline: | |
33 | | | |
34 | | check for unimplemented vector first. Use EXC_VEC-4 because | |
35 | | the equate is valid only after a 'link a6' has pushed one more | |
36 | | long onto the stack. | |
37 | | | |
38 | cmpw #UNIMP_VEC,EXC_VEC-4(%a7) | |
39 | beql fpsp_unimp | |
40 | ||
41 | | | |
42 | | fmovecr with non-zero <ea> handling here | |
43 | | | |
44 | subl #4,%a7 |4 accounts for 2-word difference | |
45 | | ;between six word frame (unimp) and | |
46 | | ;four word frame | |
47 | link %a6,#-LOCAL_SIZE | |
48 | fsave -(%a7) | |
49 | moveml %d0-%d1/%a0-%a1,USER_DA(%a6) | |
50 | moveal EXC_PC+4(%a6),%a0 |get address of fline instruction | |
51 | leal L_SCR1(%a6),%a1 |use L_SCR1 as scratch | |
52 | movel #4,%d0 | |
53 | addl #4,%a6 |to offset the sub.l #4,a7 above so that | |
54 | | ;a6 can point correctly to the stack frame | |
55 | | ;before branching to mem_read | |
56 | bsrl mem_read | |
57 | subl #4,%a6 | |
58 | movel L_SCR1(%a6),%d0 |d0 contains the fline and command word | |
59 | bfextu %d0{#4:#3},%d1 |extract coprocessor id | |
60 | cmpib #1,%d1 |check if cpid=1 | |
61 | bne not_mvcr |exit if not | |
62 | bfextu %d0{#16:#6},%d1 | |
63 | cmpib #0x17,%d1 |check if it is an FMOVECR encoding | |
64 | bne not_mvcr | |
65 | | ;if an FMOVECR instruction, fix stack | |
66 | | ;and go to FPSP_UNIMP | |
67 | fix_stack: | |
68 | cmpib #VER_40,(%a7) |test for orig unimp frame | |
69 | bnes ck_rev | |
70 | subl #UNIMP_40_SIZE-4,%a7 |emulate an orig fsave | |
71 | moveb #VER_40,(%a7) | |
72 | moveb #UNIMP_40_SIZE-4,1(%a7) | |
73 | clrw 2(%a7) | |
74 | bras fix_con | |
75 | ck_rev: | |
76 | cmpib #VER_41,(%a7) |test for rev unimp frame | |
77 | bnel fpsp_fmt_error |if not $40 or $41, exit with error | |
78 | subl #UNIMP_41_SIZE-4,%a7 |emulate a rev fsave | |
79 | moveb #VER_41,(%a7) | |
80 | moveb #UNIMP_41_SIZE-4,1(%a7) | |
81 | clrw 2(%a7) | |
82 | fix_con: | |
83 | movew EXC_SR+4(%a6),EXC_SR(%a6) |move stacked sr to new position | |
84 | movel EXC_PC+4(%a6),EXC_PC(%a6) |move stacked pc to new position | |
85 | fmovel EXC_PC(%a6),%FPIAR |point FPIAR to fline inst | |
86 | movel #4,%d1 | |
87 | addl %d1,EXC_PC(%a6) |increment stacked pc value to next inst | |
88 | movew #0x202c,EXC_VEC(%a6) |reformat vector to unimp | |
89 | clrl EXC_EA(%a6) |clear the EXC_EA field | |
90 | movew %d0,CMDREG1B(%a6) |move the lower word into CMDREG1B | |
91 | clrl E_BYTE(%a6) | |
92 | bsetb #UFLAG,T_BYTE(%a6) | |
93 | moveml USER_DA(%a6),%d0-%d1/%a0-%a1 |restore data registers | |
94 | bral uni_2 | |
95 | ||
96 | not_mvcr: | |
97 | moveml USER_DA(%a6),%d0-%d1/%a0-%a1 |restore data registers | |
98 | frestore (%a7)+ | |
99 | unlk %a6 | |
100 | addl #4,%a7 | |
101 | bral real_fline | |
102 | ||
103 | |end |