Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/include/asm-m68k/io.h | |
3 | * | |
4 | * 4/1/00 RZ: - rewritten to avoid clashes between ISA/PCI and other | |
5 | * IO access | |
6 | * - added Q40 support | |
7 | * - added skeleton for GG-II and Amiga PCMCIA | |
8 | * 2/3/01 RZ: - moved a few more defs into raw_io.h | |
9 | * | |
2171a19a AB |
10 | * inX/outX should not be used by any driver unless it does |
11 | * ISA access. Other drivers should use function defined in raw_io.h | |
1da177e4 LT |
12 | * or define its own macros on top of these. |
13 | * | |
2171a19a | 14 | * inX(),outX() are for ISA I/O |
1da177e4 | 15 | * isa_readX(),isa_writeX() are for ISA memory |
1da177e4 LT |
16 | */ |
17 | ||
18 | #ifndef _IO_H | |
19 | #define _IO_H | |
20 | ||
21 | #ifdef __KERNEL__ | |
22 | ||
ad9ec4f8 | 23 | #include <linux/compiler.h> |
1da177e4 LT |
24 | #include <asm/raw_io.h> |
25 | #include <asm/virtconvert.h> | |
26 | ||
f9569e1d | 27 | #include <asm-generic/iomap.h> |
1da177e4 LT |
28 | |
29 | #ifdef CONFIG_ATARI | |
30 | #include <asm/atarihw.h> | |
31 | #endif | |
32 | ||
33 | ||
34 | /* | |
35 | * IO/MEM definitions for various ISA bridges | |
36 | */ | |
37 | ||
38 | ||
39 | #ifdef CONFIG_Q40 | |
40 | ||
41 | #define q40_isa_io_base 0xff400000 | |
42 | #define q40_isa_mem_base 0xff800000 | |
43 | ||
44 | #define Q40_ISA_IO_B(ioaddr) (q40_isa_io_base+1+4*((unsigned long)(ioaddr))) | |
45 | #define Q40_ISA_IO_W(ioaddr) (q40_isa_io_base+ 4*((unsigned long)(ioaddr))) | |
46 | #define Q40_ISA_MEM_B(madr) (q40_isa_mem_base+1+4*((unsigned long)(madr))) | |
47 | #define Q40_ISA_MEM_W(madr) (q40_isa_mem_base+ 4*((unsigned long)(madr))) | |
48 | ||
49 | #define MULTI_ISA 0 | |
50 | #endif /* Q40 */ | |
51 | ||
1da177e4 LT |
52 | #ifdef CONFIG_AMIGA_PCMCIA |
53 | #include <asm/amigayle.h> | |
54 | ||
55 | #define AG_ISA_IO_B(ioaddr) ( GAYLE_IO+(ioaddr)+(((ioaddr)&1)*GAYLE_ODD) ) | |
56 | #define AG_ISA_IO_W(ioaddr) ( GAYLE_IO+(ioaddr) ) | |
57 | ||
58 | #ifndef MULTI_ISA | |
59 | #define MULTI_ISA 0 | |
60 | #else | |
61 | #undef MULTI_ISA | |
62 | #define MULTI_ISA 1 | |
63 | #endif | |
64 | #endif /* AMIGA_PCMCIA */ | |
65 | ||
66 | ||
67 | ||
68 | #ifdef CONFIG_ISA | |
69 | ||
70 | #if MULTI_ISA == 0 | |
71 | #undef MULTI_ISA | |
72 | #endif | |
73 | ||
52de114e | 74 | #define ISA_TYPE_Q40 (1) |
808fa62f | 75 | #define ISA_TYPE_AG (2) |
1da177e4 LT |
76 | |
77 | #if defined(CONFIG_Q40) && !defined(MULTI_ISA) | |
52de114e | 78 | #define ISA_TYPE ISA_TYPE_Q40 |
1da177e4 LT |
79 | #define ISA_SEX 0 |
80 | #endif | |
81 | #if defined(CONFIG_AMIGA_PCMCIA) && !defined(MULTI_ISA) | |
52de114e | 82 | #define ISA_TYPE ISA_TYPE_AG |
1da177e4 LT |
83 | #define ISA_SEX 1 |
84 | #endif | |
1da177e4 LT |
85 | |
86 | #ifdef MULTI_ISA | |
87 | extern int isa_type; | |
88 | extern int isa_sex; | |
89 | ||
90 | #define ISA_TYPE isa_type | |
91 | #define ISA_SEX isa_sex | |
92 | #endif | |
93 | ||
94 | /* | |
95 | * define inline addr translation functions. Normally only one variant will | |
96 | * be compiled in so the case statement will be optimised away | |
97 | */ | |
98 | ||
ad9ec4f8 | 99 | static inline u8 __iomem *isa_itb(unsigned long addr) |
1da177e4 LT |
100 | { |
101 | switch(ISA_TYPE) | |
102 | { | |
103 | #ifdef CONFIG_Q40 | |
52de114e | 104 | case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_IO_B(addr); |
1da177e4 | 105 | #endif |
1da177e4 | 106 | #ifdef CONFIG_AMIGA_PCMCIA |
52de114e | 107 | case ISA_TYPE_AG: return (u8 __iomem *)AG_ISA_IO_B(addr); |
1da177e4 | 108 | #endif |
ad9ec4f8 | 109 | default: return NULL; /* avoid warnings, just in case */ |
1da177e4 LT |
110 | } |
111 | } | |
ad9ec4f8 | 112 | static inline u16 __iomem *isa_itw(unsigned long addr) |
1da177e4 LT |
113 | { |
114 | switch(ISA_TYPE) | |
115 | { | |
116 | #ifdef CONFIG_Q40 | |
52de114e | 117 | case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_IO_W(addr); |
1da177e4 | 118 | #endif |
1da177e4 | 119 | #ifdef CONFIG_AMIGA_PCMCIA |
52de114e | 120 | case ISA_TYPE_AG: return (u16 __iomem *)AG_ISA_IO_W(addr); |
1da177e4 | 121 | #endif |
ad9ec4f8 | 122 | default: return NULL; /* avoid warnings, just in case */ |
1da177e4 LT |
123 | } |
124 | } | |
f9569e1d AV |
125 | static inline u32 __iomem *isa_itl(unsigned long addr) |
126 | { | |
127 | switch(ISA_TYPE) | |
128 | { | |
129 | #ifdef CONFIG_AMIGA_PCMCIA | |
52de114e | 130 | case ISA_TYPE_AG: return (u32 __iomem *)AG_ISA_IO_W(addr); |
f9569e1d AV |
131 | #endif |
132 | default: return 0; /* avoid warnings, just in case */ | |
133 | } | |
134 | } | |
ad9ec4f8 | 135 | static inline u8 __iomem *isa_mtb(unsigned long addr) |
1da177e4 LT |
136 | { |
137 | switch(ISA_TYPE) | |
138 | { | |
139 | #ifdef CONFIG_Q40 | |
52de114e | 140 | case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_MEM_B(addr); |
1da177e4 | 141 | #endif |
1da177e4 | 142 | #ifdef CONFIG_AMIGA_PCMCIA |
52de114e | 143 | case ISA_TYPE_AG: return (u8 __iomem *)addr; |
1da177e4 | 144 | #endif |
ad9ec4f8 | 145 | default: return NULL; /* avoid warnings, just in case */ |
1da177e4 LT |
146 | } |
147 | } | |
ad9ec4f8 | 148 | static inline u16 __iomem *isa_mtw(unsigned long addr) |
1da177e4 LT |
149 | { |
150 | switch(ISA_TYPE) | |
151 | { | |
152 | #ifdef CONFIG_Q40 | |
52de114e | 153 | case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_MEM_W(addr); |
1da177e4 | 154 | #endif |
1da177e4 | 155 | #ifdef CONFIG_AMIGA_PCMCIA |
52de114e | 156 | case ISA_TYPE_AG: return (u16 __iomem *)addr; |
1da177e4 | 157 | #endif |
ad9ec4f8 | 158 | default: return NULL; /* avoid warnings, just in case */ |
1da177e4 LT |
159 | } |
160 | } | |
161 | ||
162 | ||
163 | #define isa_inb(port) in_8(isa_itb(port)) | |
164 | #define isa_inw(port) (ISA_SEX ? in_be16(isa_itw(port)) : in_le16(isa_itw(port))) | |
f9569e1d | 165 | #define isa_inl(port) (ISA_SEX ? in_be32(isa_itl(port)) : in_le32(isa_itl(port))) |
1da177e4 LT |
166 | #define isa_outb(val,port) out_8(isa_itb(port),(val)) |
167 | #define isa_outw(val,port) (ISA_SEX ? out_be16(isa_itw(port),(val)) : out_le16(isa_itw(port),(val))) | |
f9569e1d | 168 | #define isa_outl(val,port) (ISA_SEX ? out_be32(isa_itl(port),(val)) : out_le32(isa_itl(port),(val))) |
1da177e4 LT |
169 | |
170 | #define isa_readb(p) in_8(isa_mtb((unsigned long)(p))) | |
171 | #define isa_readw(p) \ | |
172 | (ISA_SEX ? in_be16(isa_mtw((unsigned long)(p))) \ | |
173 | : in_le16(isa_mtw((unsigned long)(p)))) | |
174 | #define isa_writeb(val,p) out_8(isa_mtb((unsigned long)(p)),(val)) | |
175 | #define isa_writew(val,p) \ | |
176 | (ISA_SEX ? out_be16(isa_mtw((unsigned long)(p)),(val)) \ | |
177 | : out_le16(isa_mtw((unsigned long)(p)),(val))) | |
178 | ||
179 | static inline void isa_delay(void) | |
180 | { | |
181 | switch(ISA_TYPE) | |
182 | { | |
183 | #ifdef CONFIG_Q40 | |
52de114e | 184 | case ISA_TYPE_Q40: isa_outb(0,0x80); break; |
1da177e4 | 185 | #endif |
1da177e4 | 186 | #ifdef CONFIG_AMIGA_PCMCIA |
52de114e | 187 | case ISA_TYPE_AG: break; |
1da177e4 LT |
188 | #endif |
189 | default: break; /* avoid warnings */ | |
190 | } | |
191 | } | |
192 | ||
193 | #define isa_inb_p(p) ({u8 v=isa_inb(p);isa_delay();v;}) | |
194 | #define isa_outb_p(v,p) ({isa_outb((v),(p));isa_delay();}) | |
195 | #define isa_inw_p(p) ({u16 v=isa_inw(p);isa_delay();v;}) | |
196 | #define isa_outw_p(v,p) ({isa_outw((v),(p));isa_delay();}) | |
197 | #define isa_inl_p(p) ({u32 v=isa_inl(p);isa_delay();v;}) | |
198 | #define isa_outl_p(v,p) ({isa_outl((v),(p));isa_delay();}) | |
199 | ||
200 | #define isa_insb(port, buf, nr) raw_insb(isa_itb(port), (u8 *)(buf), (nr)) | |
201 | #define isa_outsb(port, buf, nr) raw_outsb(isa_itb(port), (u8 *)(buf), (nr)) | |
202 | ||
203 | #define isa_insw(port, buf, nr) \ | |
204 | (ISA_SEX ? raw_insw(isa_itw(port), (u16 *)(buf), (nr)) : \ | |
205 | raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr))) | |
206 | ||
207 | #define isa_outsw(port, buf, nr) \ | |
208 | (ISA_SEX ? raw_outsw(isa_itw(port), (u16 *)(buf), (nr)) : \ | |
209 | raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr))) | |
f9569e1d AV |
210 | |
211 | #define isa_insl(port, buf, nr) \ | |
212 | (ISA_SEX ? raw_insl(isa_itl(port), (u32 *)(buf), (nr)) : \ | |
213 | raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1)) | |
214 | ||
215 | #define isa_outsl(port, buf, nr) \ | |
216 | (ISA_SEX ? raw_outsl(isa_itl(port), (u32 *)(buf), (nr)) : \ | |
217 | raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1)) | |
218 | ||
1da177e4 | 219 | |
1da177e4 LT |
220 | #define inb isa_inb |
221 | #define inb_p isa_inb_p | |
222 | #define outb isa_outb | |
223 | #define outb_p isa_outb_p | |
224 | #define inw isa_inw | |
225 | #define inw_p isa_inw_p | |
226 | #define outw isa_outw | |
227 | #define outw_p isa_outw_p | |
f9569e1d AV |
228 | #define inl isa_inl |
229 | #define inl_p isa_inl_p | |
230 | #define outl isa_outl | |
231 | #define outl_p isa_outl_p | |
1da177e4 LT |
232 | #define insb isa_insb |
233 | #define insw isa_insw | |
f9569e1d | 234 | #define insl isa_insl |
1da177e4 LT |
235 | #define outsb isa_outsb |
236 | #define outsw isa_outsw | |
f9569e1d | 237 | #define outsl isa_outsl |
1da177e4 LT |
238 | #define readb isa_readb |
239 | #define readw isa_readw | |
240 | #define writeb isa_writeb | |
241 | #define writew isa_writew | |
1da177e4 | 242 | |
2171a19a | 243 | #else /* CONFIG_ISA */ |
1da177e4 | 244 | |
1da177e4 | 245 | /* |
f9569e1d | 246 | * We need to define dummy functions for GENERIC_IOMAP support. |
1da177e4 | 247 | */ |
f9569e1d AV |
248 | #define inb(port) 0xff |
249 | #define inb_p(port) 0xff | |
250 | #define outb(val,port) ((void)0) | |
251 | #define outb_p(val,port) ((void)0) | |
252 | #define inw(port) 0xffff | |
779b7e64 | 253 | #define inw_p(port) 0xffff |
f9569e1d | 254 | #define outw(val,port) ((void)0) |
779b7e64 | 255 | #define outw_p(val,port) ((void)0) |
f9569e1d | 256 | #define inl(port) 0xffffffffUL |
779b7e64 | 257 | #define inl_p(port) 0xffffffffUL |
f9569e1d | 258 | #define outl(val,port) ((void)0) |
779b7e64 | 259 | #define outl_p(val,port) ((void)0) |
f9569e1d AV |
260 | |
261 | #define insb(port,buf,nr) ((void)0) | |
262 | #define outsb(port,buf,nr) ((void)0) | |
263 | #define insw(port,buf,nr) ((void)0) | |
264 | #define outsw(port,buf,nr) ((void)0) | |
265 | #define insl(port,buf,nr) ((void)0) | |
266 | #define outsl(port,buf,nr) ((void)0) | |
1da177e4 LT |
267 | |
268 | /* | |
269 | * These should be valid on any ioremap()ed region | |
270 | */ | |
271 | #define readb(addr) in_8(addr) | |
272 | #define writeb(val,addr) out_8((addr),(val)) | |
f9569e1d AV |
273 | #define readw(addr) in_le16(addr) |
274 | #define writew(val,addr) out_le16((addr),(val)) | |
2171a19a AB |
275 | |
276 | #endif /* CONFIG_ISA */ | |
277 | ||
1da177e4 LT |
278 | #define readl(addr) in_le32(addr) |
279 | #define writel(val,addr) out_le32((addr),(val)) | |
1da177e4 | 280 | |
f5db9c6a GU |
281 | #define readsb(port, buf, nr) raw_insb((port), (u8 *)(buf), (nr)) |
282 | #define readsw(port, buf, nr) raw_insw((port), (u16 *)(buf), (nr)) | |
283 | #define readsl(port, buf, nr) raw_insl((port), (u32 *)(buf), (nr)) | |
284 | #define writesb(port, buf, nr) raw_outsb((port), (u8 *)(buf), (nr)) | |
285 | #define writesw(port, buf, nr) raw_outsw((port), (u16 *)(buf), (nr)) | |
286 | #define writesl(port, buf, nr) raw_outsl((port), (u32 *)(buf), (nr)) | |
287 | ||
1da177e4 LT |
288 | #define mmiowb() |
289 | ||
ad9ec4f8 | 290 | static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size) |
1da177e4 LT |
291 | { |
292 | return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); | |
293 | } | |
ad9ec4f8 | 294 | static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size) |
1da177e4 LT |
295 | { |
296 | return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); | |
297 | } | |
ad9ec4f8 | 298 | static inline void __iomem *ioremap_writethrough(unsigned long physaddr, |
1da177e4 LT |
299 | unsigned long size) |
300 | { | |
301 | return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); | |
302 | } | |
ad9ec4f8 | 303 | static inline void __iomem *ioremap_fullcache(unsigned long physaddr, |
1da177e4 LT |
304 | unsigned long size) |
305 | { | |
306 | return __ioremap(physaddr, size, IOMAP_FULL_CACHING); | |
307 | } | |
308 | ||
f9569e1d AV |
309 | static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) |
310 | { | |
311 | __builtin_memset((void __force *) addr, val, count); | |
312 | } | |
313 | static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count) | |
314 | { | |
315 | __builtin_memcpy(dst, (void __force *) src, count); | |
316 | } | |
317 | static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) | |
318 | { | |
319 | __builtin_memcpy((void __force *) dst, src, count); | |
320 | } | |
1da177e4 LT |
321 | |
322 | #ifndef CONFIG_SUN3 | |
323 | #define IO_SPACE_LIMIT 0xffff | |
324 | #else | |
325 | #define IO_SPACE_LIMIT 0x0fffffff | |
326 | #endif | |
327 | ||
328 | #endif /* __KERNEL__ */ | |
329 | ||
330 | #define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1 | |
331 | ||
332 | /* | |
333 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | |
334 | * access | |
335 | */ | |
336 | #define xlate_dev_mem_ptr(p) __va(p) | |
337 | ||
338 | /* | |
339 | * Convert a virtual cached pointer to an uncached pointer | |
340 | */ | |
341 | #define xlate_dev_kmem_ptr(p) p | |
342 | ||
343 | #endif /* _IO_H */ |