[deliverable/linux.git] / arch / m68k / mac / psc.c

/*
 *	Apple Peripheral System Controller (PSC)
 *
 *	The PSC is used on the AV Macs to control IO functions not handled
 *	by the VIAs (Ethernet, DSP, SCC).
 *
 * TO DO:
 *
 * Try to figure out what's going on in pIFR5 and pIFR6. There seem to be
 * persisant interrupt conditions in those registers and I have no idea what
 * they are. Granted it doesn't affect since we're not enabling any interrupts
 * on those levels at the moment, but it would be nice to know. I have a feeling
 * they aren't actually interrupt lines but data lines (to the DSP?)
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/irq.h>

#include <asm/traps.h>
#include <asm/macintosh.h>
#include <asm/macints.h>
#include <asm/mac_psc.h>

#define DEBUG_PSC

volatile __u8 *psc;
EXPORT_SYMBOL_GPL(psc);

/*
 * Debugging dump, used in various places to see what's going on.
 */

static void psc_debug_dump(void)
{
	int	i;

	if (!psc)
		return;

	for (i = 0x30 ; i < 0x70 ; i += 0x10) {
		printk("PSC #%d:  IFR = 0x%02X IER = 0x%02X\n",
			i >> 4,
			(int) psc_read_byte(pIFRbase + i),
			(int) psc_read_byte(pIERbase + i));
	}
}

/*
 * Try to kill all DMA channels on the PSC. Not sure how this his
 * supposed to work; this is code lifted from macmace.c and then
 * expanded to cover what I think are the other 7 channels.
 */

static __init void psc_dma_die_die_die(void)
{
	int i;

	printk("Killing all PSC DMA channels...");
	for (i = 0 ; i < 9 ; i++) {
		psc_write_word(PSC_CTL_BASE + (i << 4), 0x8800);
		psc_write_word(PSC_CTL_BASE + (i << 4), 0x1000);
		psc_write_word(PSC_CMD_BASE + (i << 5), 0x1100);
		psc_write_word(PSC_CMD_BASE + (i << 5) + 0x10, 0x1100);
	}
	printk("done!\n");
}

/*
 * Initialize the PSC. For now this just involves shutting down all
 * interrupt sources using the IERs.
 */

void __init psc_init(void)
{
	int i;

	if (macintosh_config->ident != MAC_MODEL_C660
	 && macintosh_config->ident != MAC_MODEL_Q840)
	{
		psc = NULL;
		return;
	}

	/*
	 * The PSC is always at the same spot, but using psc
	 * keeps things consistent with the psc_xxxx functions.
	 */

	psc = (void *) PSC_BASE;

	printk("PSC detected at %p\n", psc);

	psc_dma_die_die_die();

#ifdef DEBUG_PSC
	psc_debug_dump();
#endif
	/*
	 * Mask and clear all possible interrupts
	 */

	for (i = 0x30 ; i < 0x70 ; i += 0x10) {
		psc_write_byte(pIERbase + i, 0x0F);
		psc_write_byte(pIFRbase + i, 0x0F);
	}
}

/*
 * PSC interrupt handler. It's a lot like the VIA interrupt handler.
 */

static void psc_irq(struct irq_desc *desc)
{
	unsigned int offset = (unsigned int)irq_desc_get_handler_data(desc);
	unsigned int irq = irq_desc_get_irq(desc);
	int pIFR	= pIFRbase + offset;
	int pIER	= pIERbase + offset;
	int irq_num;
	unsigned char irq_bit, events;

#ifdef DEBUG_IRQS
	printk("psc_irq: irq %u pIFR = 0x%02X pIER = 0x%02X\n",
		irq, (int) psc_read_byte(pIFR), (int) psc_read_byte(pIER));
#endif

	events = psc_read_byte(pIFR) & psc_read_byte(pIER) & 0xF;
	if (!events)
		return;

	irq_num = irq << 3;
	irq_bit = 1;
	do {
		if (events & irq_bit) {
			psc_write_byte(pIFR, irq_bit);
			generic_handle_irq(irq_num);
		}
		irq_num++;
		irq_bit <<= 1;
	} while (events >= irq_bit);
}

/*
 * Register the PSC interrupt dispatchers for autovector interrupts 3-6.
 */

void __init psc_register_interrupts(void)
{
	irq_set_chained_handler_and_data(IRQ_AUTO_3, psc_irq, (void *)0x30);
	irq_set_chained_handler_and_data(IRQ_AUTO_4, psc_irq, (void *)0x40);
	irq_set_chained_handler_and_data(IRQ_AUTO_5, psc_irq, (void *)0x50);
	irq_set_chained_handler_and_data(IRQ_AUTO_6, psc_irq, (void *)0x60);
}

void psc_irq_enable(int irq) {
	int irq_src	= IRQ_SRC(irq);
	int irq_idx	= IRQ_IDX(irq);
	int pIER	= pIERbase + (irq_src << 4);

#ifdef DEBUG_IRQUSE
	printk("psc_irq_enable(%d)\n", irq);
#endif
	psc_write_byte(pIER, (1 << irq_idx) | 0x80);
}

void psc_irq_disable(int irq) {
	int irq_src	= IRQ_SRC(irq);
	int irq_idx	= IRQ_IDX(irq);
	int pIER	= pIERbase + (irq_src << 4);

#ifdef DEBUG_IRQUSE
	printk("psc_irq_disable(%d)\n", irq);
#endif
	psc_write_byte(pIER, 1 << irq_idx);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Apple Peripheral System Controller (PSC)
	3	*
	4	* The PSC is used on the AV Macs to control IO functions not handled
	5	* by the VIAs (Ethernet, DSP, SCC).
	6	*
	7	* TO DO:
	8	*
	9	* Try to figure out what's going on in pIFR5 and pIFR6. There seem to be
	10	* persisant interrupt conditions in those registers and I have no idea what
	11	* they are. Granted it doesn't affect since we're not enabling any interrupts
	12	* on those levels at the moment, but it would be nice to know. I have a feeling
	13	* they aren't actually interrupt lines but data lines (to the DSP?)
	14	*/
	15
	16	#include <linux/types.h>
	17	#include <linux/kernel.h>
	18	#include <linux/mm.h>
	19	#include <linux/delay.h>
	20	#include <linux/init.h>
ddc7fd25	21	#include <linux/irq.h>
1da177e4 LT	22
1da177e4 LT	23	#include <asm/traps.h>
1da177e4 LT	24	#include <asm/macintosh.h>
	25	#include <asm/macints.h>
	26	#include <asm/mac_psc.h>
	27
	28	#define DEBUG_PSC
	29
1da177e4	30	volatile __u8 *psc;
a77cdaaf	31	EXPORT_SYMBOL_GPL(psc);
1da177e4	32
1da177e4 LT	33	/*
	34	* Debugging dump, used in various places to see what's going on.
	35	*/
	36
8dfbdf4a	37	static void psc_debug_dump(void)
1da177e4 LT	38	{
	39	int i;
	40
70bc53b4 GU	41	if (!psc)
	42	return;
	43
1da177e4 LT	44	for (i = 0x30 ; i < 0x70 ; i += 0x10) {
	45	printk("PSC #%d: IFR = 0x%02X IER = 0x%02X\n",
	46	i >> 4,
	47	(int) psc_read_byte(pIFRbase + i),
	48	(int) psc_read_byte(pIERbase + i));
	49	}
	50	}
	51
	52	/*
	53	* Try to kill all DMA channels on the PSC. Not sure how this his
	54	* supposed to work; this is code lifted from macmace.c and then
	55	* expanded to cover what I think are the other 7 channels.
	56	*/
	57
a4df02a2	58	static __init void psc_dma_die_die_die(void)
1da177e4 LT	59	{
	60	int i;
	61
	62	printk("Killing all PSC DMA channels...");
	63	for (i = 0 ; i < 9 ; i++) {
	64	psc_write_word(PSC_CTL_BASE + (i << 4), 0x8800);
	65	psc_write_word(PSC_CTL_BASE + (i << 4), 0x1000);
	66	psc_write_word(PSC_CMD_BASE + (i << 5), 0x1100);
	67	psc_write_word(PSC_CMD_BASE + (i << 5) + 0x10, 0x1100);
	68	}
	69	printk("done!\n");
	70	}
	71
	72	/*
	73	* Initialize the PSC. For now this just involves shutting down all
	74	* interrupt sources using the IERs.
	75	*/
	76
	77	void __init psc_init(void)
	78	{
	79	int i;
	80
	81	if (macintosh_config->ident != MAC_MODEL_C660
	82	&& macintosh_config->ident != MAC_MODEL_Q840)
	83	{
	84	psc = NULL;
1da177e4 LT	85	return;
	86	}
	87
	88	/*
	89	* The PSC is always at the same spot, but using psc
a34f0b31	90	* keeps things consistent with the psc_xxxx functions.
1da177e4 LT	91	*/
	92
	93	psc = (void *) PSC_BASE;
1da177e4 LT	94
	95	printk("PSC detected at %p\n", psc);
	96
	97	psc_dma_die_die_die();
	98
	99	#ifdef DEBUG_PSC
	100	psc_debug_dump();
	101	#endif
	102	/*
	103	* Mask and clear all possible interrupts
	104	*/
	105
	106	for (i = 0x30 ; i < 0x70 ; i += 0x10) {
	107	psc_write_byte(pIERbase + i, 0x0F);
	108	psc_write_byte(pIFRbase + i, 0x0F);
	109	}
	110	}
	111
	112	/*
9145db56	113	* PSC interrupt handler. It's a lot like the VIA interrupt handler.
1da177e4 LT	114	*/
1da177e4 LT	115
bd0b9ac4	116	static void psc_irq(struct irq_desc *desc)
1da177e4	117	{
9145db56	118	unsigned int offset = (unsigned int)irq_desc_get_handler_data(desc);
625b86ad	119	unsigned int irq = irq_desc_get_irq(desc);
9145db56 GU	120	int pIFR = pIFRbase + offset;
	121	int pIER = pIERbase + offset;
	122	int irq_num;
	123	unsigned char irq_bit, events;
1da177e4	124
9145db56 GU	125	#ifdef DEBUG_IRQS
	126	printk("psc_irq: irq %u pIFR = 0x%02X pIER = 0x%02X\n",
	127	irq, (int) psc_read_byte(pIFR), (int) psc_read_byte(pIER));
	128	#endif
1da177e4	129
9145db56 GU	130	events = psc_read_byte(pIFR) & psc_read_byte(pIER) & 0xF;
	131	if (!events)
	132	return;
	133
	134	irq_num = irq << 3;
	135	irq_bit = 1;
	136	do {
	137	if (events & irq_bit) {
	138	psc_write_byte(pIFR, irq_bit);
	139	generic_handle_irq(irq_num);
	140	}
	141	irq_num++;
	142	irq_bit <<= 1;
	143	} while (events >= irq_bit);
	144	}
9145db56 GU	145
	146	/*
	147	* Register the PSC interrupt dispatchers for autovector interrupts 3-6.
	148	*/
	149
	150	void __init psc_register_interrupts(void)
	151	{
09c5cb94 TG	152	irq_set_chained_handler_and_data(IRQ_AUTO_3, psc_irq, (void *)0x30);
	153	irq_set_chained_handler_and_data(IRQ_AUTO_4, psc_irq, (void *)0x40);
	154	irq_set_chained_handler_and_data(IRQ_AUTO_5, psc_irq, (void *)0x50);
	155	irq_set_chained_handler_and_data(IRQ_AUTO_6, psc_irq, (void *)0x60);
9145db56	156	}
1da177e4 LT	157
	158	void psc_irq_enable(int irq) {
	159	int irq_src = IRQ_SRC(irq);
	160	int irq_idx = IRQ_IDX(irq);
	161	int pIER = pIERbase + (irq_src << 4);
	162
	163	#ifdef DEBUG_IRQUSE
	164	printk("psc_irq_enable(%d)\n", irq);
	165	#endif
	166	psc_write_byte(pIER, (1 << irq_idx) \| 0x80);
	167	}
	168
	169	void psc_irq_disable(int irq) {
	170	int irq_src = IRQ_SRC(irq);
	171	int irq_idx = IRQ_IDX(irq);
	172	int pIER = pIERbase + (irq_src << 4);
	173
	174	#ifdef DEBUG_IRQUSE
	175	printk("psc_irq_disable(%d)\n", irq);
	176	#endif
	177	psc_write_byte(pIER, 1 << irq_idx);
	178	}