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1da177e4 LT |
1 | /* |
2 | * arch/m68k/mvme147/config.c | |
3 | * | |
4 | * Copyright (C) 1996 Dave Frascone [chaos@mindspring.com] | |
5 | * Cloned from Richard Hirst [richard@sleepie.demon.co.uk] | |
6 | * | |
7 | * Based on: | |
8 | * | |
9 | * Copyright (C) 1993 Hamish Macdonald | |
10 | * | |
11 | * This file is subject to the terms and conditions of the GNU General Public | |
12 | * License. See the file README.legal in the main directory of this archive | |
13 | * for more details. | |
14 | */ | |
15 | ||
16 | #include <linux/types.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/mm.h> | |
19 | #include <linux/tty.h> | |
20 | #include <linux/console.h> | |
21 | #include <linux/linkage.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/major.h> | |
24 | #include <linux/genhd.h> | |
25 | #include <linux/rtc.h> | |
26 | #include <linux/interrupt.h> | |
27 | ||
28 | #include <asm/bootinfo.h> | |
4c3c522b | 29 | #include <asm/bootinfo-vme.h> |
abe48101 | 30 | #include <asm/byteorder.h> |
1da177e4 LT |
31 | #include <asm/pgtable.h> |
32 | #include <asm/setup.h> | |
33 | #include <asm/irq.h> | |
34 | #include <asm/traps.h> | |
35 | #include <asm/rtc.h> | |
36 | #include <asm/machdep.h> | |
37 | #include <asm/mvme147hw.h> | |
38 | ||
39 | ||
1da177e4 | 40 | static void mvme147_get_model(char *model); |
40220c1a | 41 | extern void mvme147_sched_init(irq_handler_t handler); |
c8d5ba18 | 42 | extern u32 mvme147_gettimeoffset(void); |
1da177e4 LT |
43 | extern int mvme147_hwclk (int, struct rtc_time *); |
44 | extern int mvme147_set_clock_mmss (unsigned long); | |
45 | extern void mvme147_reset (void); | |
1da177e4 LT |
46 | |
47 | ||
48 | static int bcd2int (unsigned char b); | |
49 | ||
e53f276b TH |
50 | /* Save tick handler routine pointer, will point to xtime_update() in |
51 | * kernel/time/timekeeping.c, called via mvme147_process_int() */ | |
1da177e4 | 52 | |
40220c1a | 53 | irq_handler_t tick_handler; |
1da177e4 LT |
54 | |
55 | ||
a4df02a2 | 56 | int __init mvme147_parse_bootinfo(const struct bi_record *bi) |
1da177e4 | 57 | { |
abe48101 GU |
58 | uint16_t tag = be16_to_cpu(bi->tag); |
59 | if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO) | |
1da177e4 LT |
60 | return 0; |
61 | else | |
62 | return 1; | |
63 | } | |
64 | ||
65 | void mvme147_reset(void) | |
66 | { | |
67 | printk ("\r\n\nCalled mvme147_reset\r\n"); | |
68 | m147_pcc->watchdog = 0x0a; /* Clear timer */ | |
69 | m147_pcc->watchdog = 0xa5; /* Enable watchdog - 100ms to reset */ | |
70 | while (1) | |
71 | ; | |
72 | } | |
73 | ||
74 | static void mvme147_get_model(char *model) | |
75 | { | |
76 | sprintf(model, "Motorola MVME147"); | |
77 | } | |
78 | ||
200a3d35 RZ |
79 | /* |
80 | * This function is called during kernel startup to initialize | |
81 | * the mvme147 IRQ handling routines. | |
82 | */ | |
83 | ||
66a3f820 | 84 | void __init mvme147_init_IRQ(void) |
200a3d35 | 85 | { |
f30a6484 | 86 | m68k_setup_user_interrupt(VEC_USER, 192); |
200a3d35 | 87 | } |
1da177e4 LT |
88 | |
89 | void __init config_mvme147(void) | |
90 | { | |
91 | mach_max_dma_address = 0x01000000; | |
92 | mach_sched_init = mvme147_sched_init; | |
93 | mach_init_IRQ = mvme147_init_IRQ; | |
c8d5ba18 | 94 | arch_gettimeoffset = mvme147_gettimeoffset; |
1da177e4 LT |
95 | mach_hwclk = mvme147_hwclk; |
96 | mach_set_clock_mmss = mvme147_set_clock_mmss; | |
97 | mach_reset = mvme147_reset; | |
1da177e4 | 98 | mach_get_model = mvme147_get_model; |
1da177e4 LT |
99 | |
100 | /* Board type is only set by newer versions of vmelilo/tftplilo */ | |
101 | if (!vme_brdtype) | |
102 | vme_brdtype = VME_TYPE_MVME147; | |
103 | } | |
104 | ||
105 | ||
106 | /* Using pcc tick timer 1 */ | |
107 | ||
2850bc27 | 108 | static irqreturn_t mvme147_timer_int (int irq, void *dev_id) |
1da177e4 LT |
109 | { |
110 | m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR; | |
111 | m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1; | |
2850bc27 | 112 | return tick_handler(irq, dev_id); |
1da177e4 LT |
113 | } |
114 | ||
115 | ||
40220c1a | 116 | void mvme147_sched_init (irq_handler_t timer_routine) |
1da177e4 LT |
117 | { |
118 | tick_handler = timer_routine; | |
5a239453 | 119 | if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, 0, "timer 1", NULL)) |
41904f8f | 120 | pr_err("Couldn't register timer interrupt\n"); |
1da177e4 LT |
121 | |
122 | /* Init the clock with a value */ | |
123 | /* our clock goes off every 6.25us */ | |
124 | m147_pcc->t1_preload = PCC_TIMER_PRELOAD; | |
125 | m147_pcc->t1_cntrl = 0x0; /* clear timer */ | |
126 | m147_pcc->t1_cntrl = 0x3; /* start timer */ | |
127 | m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR; /* clear pending ints */ | |
128 | m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1; | |
129 | } | |
130 | ||
131 | /* This is always executed with interrupts disabled. */ | |
132 | /* XXX There are race hazards in this code XXX */ | |
c8d5ba18 | 133 | u32 mvme147_gettimeoffset(void) |
1da177e4 LT |
134 | { |
135 | volatile unsigned short *cp = (volatile unsigned short *)0xfffe1012; | |
136 | unsigned short n; | |
137 | ||
138 | n = *cp; | |
139 | while (n != *cp) | |
140 | n = *cp; | |
141 | ||
142 | n -= PCC_TIMER_PRELOAD; | |
c8d5ba18 | 143 | return ((unsigned long)n * 25 / 4) * 1000; |
1da177e4 LT |
144 | } |
145 | ||
146 | static int bcd2int (unsigned char b) | |
147 | { | |
148 | return ((b>>4)*10 + (b&15)); | |
149 | } | |
150 | ||
151 | int mvme147_hwclk(int op, struct rtc_time *t) | |
152 | { | |
153 | #warning check me! | |
154 | if (!op) { | |
155 | m147_rtc->ctrl = RTC_READ; | |
156 | t->tm_year = bcd2int (m147_rtc->bcd_year); | |
157 | t->tm_mon = bcd2int (m147_rtc->bcd_mth); | |
158 | t->tm_mday = bcd2int (m147_rtc->bcd_dom); | |
159 | t->tm_hour = bcd2int (m147_rtc->bcd_hr); | |
160 | t->tm_min = bcd2int (m147_rtc->bcd_min); | |
161 | t->tm_sec = bcd2int (m147_rtc->bcd_sec); | |
162 | m147_rtc->ctrl = 0; | |
163 | } | |
164 | return 0; | |
165 | } | |
166 | ||
167 | int mvme147_set_clock_mmss (unsigned long nowtime) | |
168 | { | |
169 | return 0; | |
170 | } |