[deliverable/linux.git] / arch / m68k / platform / 5272 / config.c

/***************************************************************************/

/*
 *	linux/arch/m68knommu/platform/5272/config.c
 *
 *	Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
 *	Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
 */

/***************************************************************************/

#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/phy.h>
#include <linux/phy_fixed.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>

/***************************************************************************/

/*
 *	Some platforms need software versions of the GPIO data registers.
 */
unsigned short ppdata;
unsigned char ledbank = 0xff;

/***************************************************************************/

static struct mcf_platform_uart m5272_uart_platform[] = {
	{
		.mapbase	= MCF_MBAR + MCFUART_BASE1,
		.irq		= MCF_IRQ_UART1,
	},
	{
		.mapbase 	= MCF_MBAR + MCFUART_BASE2,
		.irq		= MCF_IRQ_UART2,
	},
	{ },
};

static struct platform_device m5272_uart = {
	.name			= "mcfuart",
	.id			= 0,
	.dev.platform_data	= m5272_uart_platform,
};

static struct resource m5272_fec_resources[] = {
	{
		.start		= MCF_MBAR + 0x840,
		.end		= MCF_MBAR + 0x840 + 0x1cf,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= MCF_IRQ_ERX,
		.end		= MCF_IRQ_ERX,
		.flags		= IORESOURCE_IRQ,
	},
	{
		.start		= MCF_IRQ_ETX,
		.end		= MCF_IRQ_ETX,
		.flags		= IORESOURCE_IRQ,
	},
	{
		.start		= MCF_IRQ_ENTC,
		.end		= MCF_IRQ_ENTC,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device m5272_fec = {
	.name			= "fec",
	.id			= 0,
	.num_resources		= ARRAY_SIZE(m5272_fec_resources),
	.resource		= m5272_fec_resources,
};

static struct platform_device *m5272_devices[] __initdata = {
	&m5272_uart,
	&m5272_fec,
};

/***************************************************************************/

static void __init m5272_uart_init_line(int line, int irq)
{
	u32 v;

	if ((line >= 0) && (line < 2)) {
		/* Enable the output lines for the serial ports */
		v = readl(MCF_MBAR + MCFSIM_PBCNT);
		v = (v & ~0x000000ff) | 0x00000055;
		writel(v, MCF_MBAR + MCFSIM_PBCNT);

		v = readl(MCF_MBAR + MCFSIM_PDCNT);
		v = (v & ~0x000003fc) | 0x000002a8;
		writel(v, MCF_MBAR + MCFSIM_PDCNT);
	}
}

static void __init m5272_uarts_init(void)
{
	const int nrlines = ARRAY_SIZE(m5272_uart_platform);
	int line;

	for (line = 0; (line < nrlines); line++)
		m5272_uart_init_line(line, m5272_uart_platform[line].irq);
}

/***************************************************************************/

static void m5272_cpu_reset(void)
{
	local_irq_disable();
	/* Set watchdog to reset, and enabled */
	__raw_writew(0, MCF_MBAR + MCFSIM_WIRR);
	__raw_writew(1, MCF_MBAR + MCFSIM_WRRR);
	__raw_writew(0, MCF_MBAR + MCFSIM_WCR);
	for (;;)
		/* wait for watchdog to timeout */;
}

/***************************************************************************/

void __init config_BSP(char *commandp, int size)
{
#if defined (CONFIG_MOD5272)
	volatile unsigned char	*pivrp;

	/* Set base of device vectors to be 64 */
	pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR);
	*pivrp = 0x40;
#endif

#if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
	/* Copy command line from FLASH to local buffer... */
	memcpy(commandp, (char *) 0xf0004000, size);
	commandp[size-1] = 0;
#elif defined(CONFIG_CANCam)
	/* Copy command line from FLASH to local buffer... */
	memcpy(commandp, (char *) 0xf0010000, size);
	commandp[size-1] = 0;
#endif

	mach_reset = m5272_cpu_reset;
}

/***************************************************************************/

/*
 * Some 5272 based boards have the FEC ethernet diectly connected to
 * an ethernet switch. In this case we need to use the fixed phy type,
 * and we need to declare it early in boot.
 */
static struct fixed_phy_status nettel_fixed_phy_status __initdata = {
	.link	= 1,
	.speed	= 100,
	.duplex	= 0,
};

/***************************************************************************/

static int __init init_BSP(void)
{
	m5272_uarts_init();
	fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status);
	platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices));
	return 0;
}

arch_initcall(init_BSP);

/***************************************************************************/
Commit	Line	Data
1da177e4 LT	1	/***************************************************************************/
	2
	3	/*
	4	* linux/arch/m68knommu/platform/5272/config.c
	5	*
	6	* Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
	7	* Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
	8	*/
	9
	10	/***************************************************************************/
	11
1da177e4	12	#include <linux/kernel.h>
1da177e4 LT	13	#include <linux/param.h>
1da177e4 LT	14	#include <linux/init.h>
84e6defa	15	#include <linux/io.h>
41a2159b GU	16	#include <linux/phy.h>
41a2159b GU	17	#include <linux/phy_fixed.h>
1da177e4 LT	18	#include <asm/machdep.h>
1da177e4 LT	19	#include <asm/coldfire.h>
1da177e4	20	#include <asm/mcfsim.h>
84e6defa	21	#include <asm/mcfuart.h>
1da177e4 LT	22
	23	/***************************************************************************/
	24
1da177e4 LT	25	/*
	26	* Some platforms need software versions of the GPIO data registers.
	27	*/
	28	unsigned short ppdata;
	29	unsigned char ledbank = 0xff;
	30
	31	/***************************************************************************/
	32
84e6defa GU	33	static struct mcf_platform_uart m5272_uart_platform[] = {
	34	{
	35	.mapbase = MCF_MBAR + MCFUART_BASE1,
49802967	36	.irq = MCF_IRQ_UART1,
84e6defa GU	37	},
	38	{
	39	.mapbase = MCF_MBAR + MCFUART_BASE2,
49802967	40	.irq = MCF_IRQ_UART2,
84e6defa GU	41	},
84e6defa GU	42	{ },
1da177e4 LT	43	};
1da177e4 LT	44
84e6defa GU	45	static struct platform_device m5272_uart = {
	46	.name = "mcfuart",
	47	.id = 0,
	48	.dev.platform_data = m5272_uart_platform,
	49	};
	50
ffba3f48 GU	51	static struct resource m5272_fec_resources[] = {
	52	{
	53	.start = MCF_MBAR + 0x840,
	54	.end = MCF_MBAR + 0x840 + 0x1cf,
	55	.flags = IORESOURCE_MEM,
	56	},
	57	{
49802967 GU	58	.start = MCF_IRQ_ERX,
49802967 GU	59	.end = MCF_IRQ_ERX,
ffba3f48 GU	60	.flags = IORESOURCE_IRQ,
	61	},
	62	{
49802967 GU	63	.start = MCF_IRQ_ETX,
49802967 GU	64	.end = MCF_IRQ_ETX,
ffba3f48 GU	65	.flags = IORESOURCE_IRQ,
	66	},
	67	{
49802967 GU	68	.start = MCF_IRQ_ENTC,
49802967 GU	69	.end = MCF_IRQ_ENTC,
ffba3f48 GU	70	.flags = IORESOURCE_IRQ,
	71	},
	72	};
	73
	74	static struct platform_device m5272_fec = {
	75	.name = "fec",
	76	.id = 0,
	77	.num_resources = ARRAY_SIZE(m5272_fec_resources),
	78	.resource = m5272_fec_resources,
	79	};
	80
84e6defa GU	81	static struct platform_device *m5272_devices[] __initdata = {
84e6defa GU	82	&m5272_uart,
ffba3f48	83	&m5272_fec,
84e6defa GU	84	};
	85
	86	/***************************************************************************/
	87
	88	static void __init m5272_uart_init_line(int line, int irq)
	89	{
	90	u32 v;
	91
	92	if ((line >= 0) && (line < 2)) {
84e6defa GU	93	/* Enable the output lines for the serial ports */
	94	v = readl(MCF_MBAR + MCFSIM_PBCNT);
	95	v = (v & ~0x000000ff) \| 0x00000055;
	96	writel(v, MCF_MBAR + MCFSIM_PBCNT);
	97
	98	v = readl(MCF_MBAR + MCFSIM_PDCNT);
	99	v = (v & ~0x000003fc) \| 0x000002a8;
	100	writel(v, MCF_MBAR + MCFSIM_PDCNT);
	101	}
	102	}
	103
	104	static void __init m5272_uarts_init(void)
	105	{
	106	const int nrlines = ARRAY_SIZE(m5272_uart_platform);
	107	int line;
	108
	109	for (line = 0; (line < nrlines); line++)
	110	m5272_uart_init_line(line, m5272_uart_platform[line].irq);
	111	}
1da177e4 LT	112
	113	/***************************************************************************/
	114
05728aec GU	115	static void m5272_cpu_reset(void)
	116	{
	117	local_irq_disable();
	118	/* Set watchdog to reset, and enabled */
	119	__raw_writew(0, MCF_MBAR + MCFSIM_WIRR);
	120	__raw_writew(1, MCF_MBAR + MCFSIM_WRRR);
	121	__raw_writew(0, MCF_MBAR + MCFSIM_WCR);
	122	for (;;)
	123	/* wait for watchdog to timeout */;
	124	}
	125
	126	/***************************************************************************/
	127
84e6defa	128	void __init config_BSP(char *commandp, int size)
1da177e4	129	{
a7962660 GU	130	#if defined (CONFIG_MOD5272)
a7962660 GU	131	volatile unsigned char *pivrp;
1da177e4 LT	132
1da177e4 LT	133	/* Set base of device vectors to be 64 */
a7962660	134	pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR);
1da177e4 LT	135	*pivrp = 0x40;
	136	#endif
	137
bc72450a	138	#if defined(CONFIG_NETtel) \|\| defined(CONFIG_SCALES)
1da177e4 LT	139	/* Copy command line from FLASH to local buffer... */
	140	memcpy(commandp, (char *) 0xf0004000, size);
	141	commandp[size-1] = 0;
1da177e4 LT	142	#elif defined(CONFIG_CANCam)
	143	/* Copy command line from FLASH to local buffer... */
	144	memcpy(commandp, (char *) 0xf0010000, size);
	145	commandp[size-1] = 0;
1da177e4 LT	146	#endif
1da177e4 LT	147
05728aec	148	mach_reset = m5272_cpu_reset;
1da177e4 LT	149	}
	150
	151	/***************************************************************************/
84e6defa	152
41a2159b GU	153	/*
	154	* Some 5272 based boards have the FEC ethernet diectly connected to
	155	* an ethernet switch. In this case we need to use the fixed phy type,
	156	* and we need to declare it early in boot.
	157	*/
	158	static struct fixed_phy_status nettel_fixed_phy_status __initdata = {
	159	.link = 1,
	160	.speed = 100,
	161	.duplex = 0,
	162	};
	163
	164	/***************************************************************************/
	165
84e6defa GU	166	static int __init init_BSP(void)
	167	{
	168	m5272_uarts_init();
41a2159b	169	fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status);
84e6defa GU	170	platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices));
	171	return 0;
	172	}
	173
	174	arch_initcall(init_BSP);
	175
	176	/***************************************************************************/