[deliverable/linux.git] / arch / m68k / q40 / q40ints.c

/*
 * arch/m68k/q40/q40ints.c
 *
 * Copyright (C) 1999,2001 Richard Zidlicky
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * .. used to be loosely based on bvme6000ints.c
 *
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/interrupt.h>

#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <asm/traps.h>

#include <asm/q40_master.h>
#include <asm/q40ints.h>

/*
 * Q40 IRQs are defined as follows:
 *            3,4,5,6,7,10,11,14,15 : ISA dev IRQs
 *            16-31: reserved
 *            32   : keyboard int
 *            33   : frame int (50/200 Hz periodic timer)
 *            34   : sample int (10/20 KHz periodic timer)
 *
*/

static void q40_irq_handler(unsigned int, struct pt_regs *fp);
static void q40_enable_irq(unsigned int);
static void q40_disable_irq(unsigned int);

unsigned short q40_ablecount[35];
unsigned short q40_state[35];

static unsigned int q40_irq_startup(unsigned int irq)
{
	/* test for ISA ints not implemented by HW */
	switch (irq) {
	case 1: case 2: case 8: case 9:
	case 11: case 12: case 13:
		printk("%s: ISA IRQ %d not implemented by HW\n", __func__, irq);
		/* FIXME return -ENXIO; */
	}
	return 0;
}

static void q40_irq_shutdown(unsigned int irq)
{
}

static struct irq_chip q40_irq_chip = {
	.name		= "q40",
	.irq_startup	= q40_irq_startup,
	.irq_shutdown	= q40_irq_shutdown,
	.irq_enable	= q40_enable_irq,
	.irq_disable	= q40_disable_irq,
};

/*
 * void q40_init_IRQ (void)
 *
 * Parameters:	None
 *
 * Returns:	Nothing
 *
 * This function is called during kernel startup to initialize
 * the q40 IRQ handling routines.
 */

static int disabled;

void __init q40_init_IRQ(void)
{
	m68k_setup_irq_chip(&q40_irq_chip, 1, Q40_IRQ_MAX);

	/* setup handler for ISA ints */
	m68k_setup_auto_interrupt(q40_irq_handler);

	m68k_irq_startup(IRQ_AUTO_2);
	m68k_irq_startup(IRQ_AUTO_4);

	/* now enable some ints.. */
	master_outb(1, EXT_ENABLE_REG);  /* ISA IRQ 5-15 */

	/* make sure keyboard IRQ is disabled */
	master_outb(0, KEY_IRQ_ENABLE_REG);
}


/*
 * this stuff doesn't really belong here..
 */

int ql_ticks;              /* 200Hz ticks since last jiffie */
static int sound_ticks;

#define SVOL 45

void q40_mksound(unsigned int hz, unsigned int ticks)
{
	/* for now ignore hz, except that hz==0 switches off sound */
	/* simply alternate the ampl (128-SVOL)-(128+SVOL)-..-.. at 200Hz */
	if (hz == 0) {
		if (sound_ticks)
			sound_ticks = 1;

		*DAC_LEFT = 128;
		*DAC_RIGHT = 128;

		return;
	}
	/* sound itself is done in q40_timer_int */
	if (sound_ticks == 0)
		sound_ticks = 1000; /* pretty long beep */
	sound_ticks = ticks << 1;
}

static irq_handler_t q40_timer_routine;

static irqreturn_t q40_timer_int (int irq, void * dev)
{
	ql_ticks = ql_ticks ? 0 : 1;
	if (sound_ticks) {
		unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
		sound_ticks--;
		*DAC_LEFT=sval;
		*DAC_RIGHT=sval;
	}

	if (!ql_ticks)
		q40_timer_routine(irq, dev);
	return IRQ_HANDLED;
}

void q40_sched_init (irq_handler_t timer_routine)
{
	int timer_irq;

	q40_timer_routine = timer_routine;
	timer_irq = Q40_IRQ_FRAME;

	if (request_irq(timer_irq, q40_timer_int, 0,
				"timer", q40_timer_int))
		panic("Couldn't register timer int");

	master_outb(-1, FRAME_CLEAR_REG);
	master_outb( 1, FRAME_RATE_REG);
}


/*
 * tables to translate bits into IRQ numbers
 * it is a good idea to order the entries by priority
 *
*/

struct IRQ_TABLE{ unsigned mask; int irq ;};
#if 0
static struct IRQ_TABLE iirqs[]={
  {Q40_IRQ_FRAME_MASK,Q40_IRQ_FRAME},
  {Q40_IRQ_KEYB_MASK,Q40_IRQ_KEYBOARD},
  {0,0}};
#endif
static struct IRQ_TABLE eirqs[] = {
  { .mask = Q40_IRQ3_MASK,	.irq = 3 },	/* ser 1 */
  { .mask = Q40_IRQ4_MASK,	.irq = 4 },	/* ser 2 */
  { .mask = Q40_IRQ14_MASK,	.irq = 14 },	/* IDE 1 */
  { .mask = Q40_IRQ15_MASK,	.irq = 15 },	/* IDE 2 */
  { .mask = Q40_IRQ6_MASK,	.irq = 6 },	/* floppy, handled elsewhere */
  { .mask = Q40_IRQ7_MASK,	.irq = 7 },	/* par */
  { .mask = Q40_IRQ5_MASK,	.irq = 5 },
  { .mask = Q40_IRQ10_MASK,	.irq = 10 },
  {0,0}
};

/* complain only this many times about spurious ints : */
static int ccleirq=60;    /* ISA dev IRQs*/
/*static int cclirq=60;*/     /* internal */

/* FIXME: add shared ints,mask,unmask,probing.... */

#define IRQ_INPROGRESS 1
/*static unsigned short saved_mask;*/
//static int do_tint=0;

#define DEBUG_Q40INT
/*#define IP_USE_DISABLE *//* would be nice, but crashes ???? */

static int mext_disabled=0;  /* ext irq disabled by master chip? */
static int aliased_irq=0;  /* how many times inside handler ?*/


/* got interrupt, dispatch to ISA or keyboard/timer IRQs */
static void q40_irq_handler(unsigned int irq, struct pt_regs *fp)
{
	unsigned mir, mer;
	int i;

//repeat:
	mir = master_inb(IIRQ_REG);
#ifdef CONFIG_BLK_DEV_FD
	if ((mir & Q40_IRQ_EXT_MASK) &&
	    (master_inb(EIRQ_REG) & Q40_IRQ6_MASK)) {
		floppy_hardint();
		return;
	}
#endif
	switch (irq) {
	case 4:
	case 6:
		__m68k_handle_int(Q40_IRQ_SAMPLE, fp);
		return;
	}
	if (mir & Q40_IRQ_FRAME_MASK) {
		__m68k_handle_int(Q40_IRQ_FRAME, fp);
		master_outb(-1, FRAME_CLEAR_REG);
	}
	if ((mir & Q40_IRQ_SER_MASK) || (mir & Q40_IRQ_EXT_MASK)) {
		mer = master_inb(EIRQ_REG);
		for (i = 0; eirqs[i].mask; i++) {
			if (mer & eirqs[i].mask) {
				irq = eirqs[i].irq;
/*
 * There is a little mess wrt which IRQ really caused this irq request. The
 * main problem is that IIRQ_REG and EIRQ_REG reflect the state when they
 * are read - which is long after the request came in. In theory IRQs should
 * not just go away but they occasionally do
 */
				if (irq > 4 && irq <= 15 && mext_disabled) {
					/*aliased_irq++;*/
					goto iirq;
				}
				if (q40_state[irq] & IRQ_INPROGRESS) {
					/* some handlers do local_irq_enable() for irq latency reasons, */
					/* however reentering an active irq handler is not permitted */
#ifdef IP_USE_DISABLE
					/* in theory this is the better way to do it because it still */
					/* lets through eg the serial irqs, unfortunately it crashes */
					disable_irq(irq);
					disabled = 1;
#else
					/*printk("IRQ_INPROGRESS detected for irq %d, disabling - %s disabled\n",
						irq, disabled ? "already" : "not yet"); */
					fp->sr = (((fp->sr) & (~0x700))+0x200);
					disabled = 1;
#endif
					goto iirq;
				}
				q40_state[irq] |= IRQ_INPROGRESS;
				__m68k_handle_int(irq, fp);
				q40_state[irq] &= ~IRQ_INPROGRESS;

				/* naively enable everything, if that fails than    */
				/* this function will be reentered immediately thus */
				/* getting another chance to disable the IRQ        */

				if (disabled) {
#ifdef IP_USE_DISABLE
					if (irq > 4) {
						disabled = 0;
						enable_irq(irq);
					}
#else
					disabled = 0;
					/*printk("reenabling irq %d\n", irq); */
#endif
				}
// used to do 'goto repeat;' here, this delayed bh processing too long
				return;
			}
		}
		if (mer && ccleirq > 0 && !aliased_irq) {
			printk("ISA interrupt from unknown source? EIRQ_REG = %x\n",mer);
			ccleirq--;
		}
	}
 iirq:
	mir = master_inb(IIRQ_REG);
	/* should test whether keyboard irq is really enabled, doing it in defhand */
	if (mir & Q40_IRQ_KEYB_MASK)
		__m68k_handle_int(Q40_IRQ_KEYBOARD, fp);

	return;
}

void q40_enable_irq(unsigned int irq)
{
	if (irq >= 5 && irq <= 15) {
		mext_disabled--;
		if (mext_disabled > 0)
			printk("q40_enable_irq : nested disable/enable\n");
		if (mext_disabled == 0)
			master_outb(1, EXT_ENABLE_REG);
	}
}


void q40_disable_irq(unsigned int irq)
{
	/* disable ISA iqs : only do something if the driver has been
	 * verified to be Q40 "compatible" - right now IDE, NE2K
	 * Any driver should not attempt to sleep across disable_irq !!
	 */

	if (irq >= 5 && irq <= 15) {
		master_outb(0, EXT_ENABLE_REG);
		mext_disabled++;
		if (mext_disabled > 1)
			printk("disable_irq nesting count %d\n",mext_disabled);
	}
}

unsigned long q40_probe_irq_on(void)
{
	printk("irq probing not working - reconfigure the driver to avoid this\n");
	return -1;
}
int q40_probe_irq_off(unsigned long irqs)
{
	return -1;
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* arch/m68k/q40/q40ints.c
	3	*
	4	* Copyright (C) 1999,2001 Richard Zidlicky
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file COPYING in the main directory of this archive
	8	* for more details.
	9	*
	10	* .. used to be loosely based on bvme6000ints.c
	11	*
	12	*/
	13
	14	#include <linux/types.h>
	15	#include <linux/kernel.h>
	16	#include <linux/errno.h>
1da177e4	17	#include <linux/interrupt.h>
1da177e4	18
1da177e4 LT	19	#include <asm/ptrace.h>
	20	#include <asm/system.h>
	21	#include <asm/irq.h>
	22	#include <asm/traps.h>
	23
	24	#include <asm/q40_master.h>
	25	#include <asm/q40ints.h>
	26
	27	/*
	28	* Q40 IRQs are defined as follows:
	29	* 3,4,5,6,7,10,11,14,15 : ISA dev IRQs
	30	* 16-31: reserved
	31	* 32 : keyboard int
	32	* 33 : frame int (50/200 Hz periodic timer)
	33	* 34 : sample int (10/20 KHz periodic timer)
	34	*
	35	*/
	36
77dda339 RZ	37	static void q40_irq_handler(unsigned int, struct pt_regs *fp);
	38	static void q40_enable_irq(unsigned int);
	39	static void q40_disable_irq(unsigned int);
1da177e4	40
77dda339 RZ	41	unsigned short q40_ablecount[35];
77dda339 RZ	42	unsigned short q40_state[35];
1da177e4	43
c288bf25	44	static unsigned int q40_irq_startup(unsigned int irq)
77dda339 RZ	45	{
	46	/* test for ISA ints not implemented by HW */
	47	switch (irq) {
	48	case 1: case 2: case 8: case 9:
	49	case 11: case 12: case 13:
f85e7cdc	50	printk("%s: ISA IRQ %d not implemented by HW\n", __func__, irq);
c288bf25	51	/* FIXME return -ENXIO; */
77dda339 RZ	52	}
	53	return 0;
	54	}
1da177e4	55
77dda339 RZ	56	static void q40_irq_shutdown(unsigned int irq)
	57	{
	58	}
1da177e4	59
c288bf25	60	static struct irq_chip q40_irq_chip = {
77dda339	61	.name = "q40",
c288bf25 GU	62	.irq_startup = q40_irq_startup,
	63	.irq_shutdown = q40_irq_shutdown,
	64	.irq_enable = q40_enable_irq,
	65	.irq_disable = q40_disable_irq,
77dda339	66	};
1da177e4 LT	67
	68	/*
	69	* void q40_init_IRQ (void)
	70	*
	71	* Parameters: None
	72	*
	73	* Returns: Nothing
	74	*
	75	* This function is called during kernel startup to initialize
	76	* the q40 IRQ handling routines.
	77	*/
	78
77dda339	79	static int disabled;
1da177e4	80
66a3f820	81	void __init q40_init_IRQ(void)
1da177e4	82	{
c288bf25	83	m68k_setup_irq_chip(&q40_irq_chip, 1, Q40_IRQ_MAX);
1da177e4 LT	84
1da177e4 LT	85	/* setup handler for ISA ints */
77dda339 RZ	86	m68k_setup_auto_interrupt(q40_irq_handler);
	87
	88	m68k_irq_startup(IRQ_AUTO_2);
	89	m68k_irq_startup(IRQ_AUTO_4);
1da177e4 LT	90
1da177e4 LT	91	/* now enable some ints.. */
77dda339	92	master_outb(1, EXT_ENABLE_REG); /* ISA IRQ 5-15 */
1da177e4 LT	93
1da177e4 LT	94	/* make sure keyboard IRQ is disabled */
77dda339	95	master_outb(0, KEY_IRQ_ENABLE_REG);
1da177e4 LT	96	}
1da177e4 LT	97
1da177e4 LT	98
	99	/*
	100	* this stuff doesn't really belong here..
77dda339	101	*/
1da177e4 LT	102
	103	int ql_ticks; /* 200Hz ticks since last jiffie */
	104	static int sound_ticks;
	105
	106	#define SVOL 45
	107
	108	void q40_mksound(unsigned int hz, unsigned int ticks)
	109	{
77dda339 RZ	110	/* for now ignore hz, except that hz==0 switches off sound */
	111	/* simply alternate the ampl (128-SVOL)-(128+SVOL)-..-.. at 200Hz */
	112	if (hz == 0) {
	113	if (sound_ticks)
	114	sound_ticks = 1;
	115
	116	*DAC_LEFT = 128;
	117	*DAC_RIGHT = 128;
	118
	119	return;
	120	}
	121	/* sound itself is done in q40_timer_int */
	122	if (sound_ticks == 0)
	123	sound_ticks = 1000; /* pretty long beep */
	124	sound_ticks = ticks << 1;
1da177e4 LT	125	}
1da177e4 LT	126
40220c1a	127	static irq_handler_t q40_timer_routine;
1da177e4	128
2850bc27	129	static irqreturn_t q40_timer_int (int irq, void * dev)
1da177e4	130	{
77dda339 RZ	131	ql_ticks = ql_ticks ? 0 : 1;
	132	if (sound_ticks) {
	133	unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
	134	sound_ticks--;
	135	*DAC_LEFT=sval;
	136	*DAC_RIGHT=sval;
	137	}
	138
	139	if (!ql_ticks)
2850bc27	140	q40_timer_routine(irq, dev);
77dda339	141	return IRQ_HANDLED;
1da177e4 LT	142	}
1da177e4 LT	143
40220c1a	144	void q40_sched_init (irq_handler_t timer_routine)
1da177e4	145	{
77dda339	146	int timer_irq;
1da177e4	147
77dda339 RZ	148	q40_timer_routine = timer_routine;
77dda339 RZ	149	timer_irq = Q40_IRQ_FRAME;
1da177e4	150
77dda339	151	if (request_irq(timer_irq, q40_timer_int, 0,
1da177e4	152	"timer", q40_timer_int))
77dda339	153	panic("Couldn't register timer int");
1da177e4	154
77dda339 RZ	155	master_outb(-1, FRAME_CLEAR_REG);
77dda339 RZ	156	master_outb( 1, FRAME_RATE_REG);
1da177e4 LT	157	}
	158
	159
	160	/*
	161	* tables to translate bits into IRQ numbers
	162	* it is a good idea to order the entries by priority
	163	*
	164	*/
	165
	166	struct IRQ_TABLE{ unsigned mask; int irq ;};
	167	#if 0
	168	static struct IRQ_TABLE iirqs[]={
	169	{Q40_IRQ_FRAME_MASK,Q40_IRQ_FRAME},
	170	{Q40_IRQ_KEYB_MASK,Q40_IRQ_KEYBOARD},
	171	{0,0}};
	172	#endif
	173	static struct IRQ_TABLE eirqs[] = {
	174	{ .mask = Q40_IRQ3_MASK, .irq = 3 }, /* ser 1 */
	175	{ .mask = Q40_IRQ4_MASK, .irq = 4 }, /* ser 2 */
	176	{ .mask = Q40_IRQ14_MASK, .irq = 14 }, /* IDE 1 */
	177	{ .mask = Q40_IRQ15_MASK, .irq = 15 }, /* IDE 2 */
	178	{ .mask = Q40_IRQ6_MASK, .irq = 6 }, /* floppy, handled elsewhere */
	179	{ .mask = Q40_IRQ7_MASK, .irq = 7 }, /* par */
	180	{ .mask = Q40_IRQ5_MASK, .irq = 5 },
	181	{ .mask = Q40_IRQ10_MASK, .irq = 10 },
	182	{0,0}
	183	};
	184
	185	/* complain only this many times about spurious ints : */
0c79cf6a	186	static int ccleirq=60; /* ISA dev IRQs*/
1da177e4 LT	187	/static int cclirq=60;/ /* internal */
	188
	189	/* FIXME: add shared ints,mask,unmask,probing.... */
	190
	191	#define IRQ_INPROGRESS 1
	192	/static unsigned short saved_mask;/
	193	//static int do_tint=0;
	194
	195	#define DEBUG_Q40INT
	196	/#define IP_USE_DISABLE //* would be nice, but crashes ???? */
	197
	198	static int mext_disabled=0; /* ext irq disabled by master chip? */
	199	static int aliased_irq=0; /* how many times inside handler ?*/
	200
	201
77dda339 RZ	202	/* got interrupt, dispatch to ISA or keyboard/timer IRQs */
77dda339 RZ	203	static void q40_irq_handler(unsigned int irq, struct pt_regs *fp)
1da177e4	204	{
77dda339 RZ	205	unsigned mir, mer;
77dda339 RZ	206	int i;
1da177e4 LT	207
1da177e4 LT	208	//repeat:
77dda339 RZ	209	mir = master_inb(IIRQ_REG);
	210	#ifdef CONFIG_BLK_DEV_FD
	211	if ((mir & Q40_IRQ_EXT_MASK) &&
	212	(master_inb(EIRQ_REG) & Q40_IRQ6_MASK)) {
	213	floppy_hardint();
	214	return;
	215	}
	216	#endif
	217	switch (irq) {
	218	case 4:
	219	case 6:
2850bc27	220	__m68k_handle_int(Q40_IRQ_SAMPLE, fp);
77dda339 RZ	221	return;
	222	}
	223	if (mir & Q40_IRQ_FRAME_MASK) {
2850bc27	224	__m68k_handle_int(Q40_IRQ_FRAME, fp);
77dda339 RZ	225	master_outb(-1, FRAME_CLEAR_REG);
	226	}
	227	if ((mir & Q40_IRQ_SER_MASK) \|\| (mir & Q40_IRQ_EXT_MASK)) {
	228	mer = master_inb(EIRQ_REG);
	229	for (i = 0; eirqs[i].mask; i++) {
	230	if (mer & eirqs[i].mask) {
	231	irq = eirqs[i].irq;
1da177e4 LT	232	/*
	233	* There is a little mess wrt which IRQ really caused this irq request. The
	234	* main problem is that IIRQ_REG and EIRQ_REG reflect the state when they
	235	* are read - which is long after the request came in. In theory IRQs should
0c79cf6a	236	* not just go away but they occasionally do
1da177e4	237	*/
77dda339 RZ	238	if (irq > 4 && irq <= 15 && mext_disabled) {
	239	/aliased_irq++;/
	240	goto iirq;
	241	}
	242	if (q40_state[irq] & IRQ_INPROGRESS) {
	243	/* some handlers do local_irq_enable() for irq latency reasons, */
	244	/* however reentering an active irq handler is not permitted */
1da177e4	245	#ifdef IP_USE_DISABLE
77dda339 RZ	246	/* in theory this is the better way to do it because it still */
	247	/* lets through eg the serial irqs, unfortunately it crashes */
	248	disable_irq(irq);
	249	disabled = 1;
1da177e4	250	#else
77dda339 RZ	251	/*printk("IRQ_INPROGRESS detected for irq %d, disabling - %s disabled\n",
	252	irq, disabled ? "already" : "not yet"); */
	253	fp->sr = (((fp->sr) & (~0x700))+0x200);
	254	disabled = 1;
1da177e4	255	#endif
77dda339 RZ	256	goto iirq;
	257	}
	258	q40_state[irq] \|= IRQ_INPROGRESS;
2850bc27	259	__m68k_handle_int(irq, fp);
77dda339 RZ	260	q40_state[irq] &= ~IRQ_INPROGRESS;
	261
	262	/* naively enable everything, if that fails than */
	263	/* this function will be reentered immediately thus */
	264	/* getting another chance to disable the IRQ */
	265
	266	if (disabled) {
1da177e4	267	#ifdef IP_USE_DISABLE
77dda339 RZ	268	if (irq > 4) {
	269	disabled = 0;
	270	enable_irq(irq);
	271	}
1da177e4	272	#else
77dda339 RZ	273	disabled = 0;
77dda339 RZ	274	/printk("reenabling irq %d\n", irq); /
1da177e4	275	#endif
77dda339	276	}
1da177e4	277	// used to do 'goto repeat;' here, this delayed bh processing too long
77dda339 RZ	278	return;
	279	}
	280	}
	281	if (mer && ccleirq > 0 && !aliased_irq) {
	282	printk("ISA interrupt from unknown source? EIRQ_REG = %x\n",mer);
	283	ccleirq--;
	284	}
1da177e4	285	}
77dda339 RZ	286	iirq:
	287	mir = master_inb(IIRQ_REG);
	288	/* should test whether keyboard irq is really enabled, doing it in defhand */
	289	if (mir & Q40_IRQ_KEYB_MASK)
2850bc27	290	__m68k_handle_int(Q40_IRQ_KEYBOARD, fp);
1da177e4	291
77dda339	292	return;
1da177e4	293	}
1da177e4	294
77dda339	295	void q40_enable_irq(unsigned int irq)
1da177e4	296	{
77dda339 RZ	297	if (irq >= 5 && irq <= 15) {
	298	mext_disabled--;
	299	if (mext_disabled > 0)
	300	printk("q40_enable_irq : nested disable/enable\n");
	301	if (mext_disabled == 0)
	302	master_outb(1, EXT_ENABLE_REG);
	303	}
1da177e4 LT	304	}
	305
	306
77dda339	307	void q40_disable_irq(unsigned int irq)
1da177e4	308	{
77dda339 RZ	309	/* disable ISA iqs : only do something if the driver has been
	310	* verified to be Q40 "compatible" - right now IDE, NE2K
	311	* Any driver should not attempt to sleep across disable_irq !!
	312	*/
	313
	314	if (irq >= 5 && irq <= 15) {
	315	master_outb(0, EXT_ENABLE_REG);
	316	mext_disabled++;
	317	if (mext_disabled > 1)
	318	printk("disable_irq nesting count %d\n",mext_disabled);
	319	}
1da177e4 LT	320	}
1da177e4 LT	321
77dda339	322	unsigned long q40_probe_irq_on(void)
1da177e4	323	{
77dda339 RZ	324	printk("irq probing not working - reconfigure the driver to avoid this\n");
77dda339 RZ	325	return -1;
1da177e4	326	}
77dda339	327	int q40_probe_irq_off(unsigned long irqs)
1da177e4	328	{
77dda339	329	return -1;
1da177e4	330	}