[PATCH] add EXPORT_SYMBOL_GPL_FUTURE()
[deliverable/linux.git] / arch / m68knommu / kernel / vmlinux.lds.S
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1/*
2 * vmlinux.lds.S -- master linker script for m68knommu arch
3 *
4 * (C) Copyright 2002-2004, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This ends up looking compilcated, because of the number of
7 * address variations for ram and rom/flash layouts. The real
8 * work of the linker script is all at the end, and reasonably
9 * strait forward.
10 */
11
12#include <linux/config.h>
13#include <asm-generic/vmlinux.lds.h>
14
15/*
16 * Original Palm pilot (same for Xcopilot).
17 * There is really only a rom target for this.
18 */
19#ifdef CONFIG_PILOT3
20#define ROMVEC_START 0x10c00000
21#define ROMVEC_LENGTH 0x10400
22#define ROM_START 0x10c10400
23#define ROM_LENGTH 0xfec00
24#define ROM_END 0x10d00000
25#define RAMVEC_START 0x00000000
26#define RAMVEC_LENGTH 0x400
27#define RAM_START 0x10000400
28#define RAM_LENGTH 0xffc00
29#define RAM_END 0x10100000
30#define _ramend _ram_end_notused
31#define DATA_ADDR RAM_START
32#endif
33
34/*
35 * Same setup on both the uCsimm and uCdimm.
36 */
37#if defined(CONFIG_UCSIMM) || defined(CONFIG_UCDIMM)
38#ifdef CONFIG_RAMKERNEL
39#define ROMVEC_START 0x10c10000
40#define ROMVEC_LENGTH 0x400
41#define ROM_START 0x10c10400
42#define ROM_LENGTH 0x1efc00
43#define ROM_END 0x10e00000
44#define RAMVEC_START 0x00000000
45#define RAMVEC_LENGTH 0x400
46#define RAM_START 0x00020400
47#define RAM_LENGTH 0x7dfc00
48#define RAM_END 0x00800000
49#endif
50#ifdef CONFIG_ROMKERNEL
51#define ROMVEC_START 0x10c10000
52#define ROMVEC_LENGTH 0x400
53#define ROM_START 0x10c10400
54#define ROM_LENGTH 0x1efc00
55#define ROM_END 0x10e00000
56#define RAMVEC_START 0x00000000
57#define RAMVEC_LENGTH 0x400
58#define RAM_START 0x00020000
59#define RAM_LENGTH 0x600000
60#define RAM_END 0x00800000
61#endif
62#ifdef CONFIG_HIMEMKERNEL
63#define ROMVEC_START 0x00600000
64#define ROMVEC_LENGTH 0x400
65#define ROM_START 0x00600400
66#define ROM_LENGTH 0x1efc00
67#define ROM_END 0x007f0000
68#define RAMVEC_START 0x00000000
69#define RAMVEC_LENGTH 0x400
70#define RAM_START 0x00020000
71#define RAM_LENGTH 0x5e0000
72#define RAM_END 0x00600000
73#endif
74#endif
75
76#ifdef CONFIG_DRAGEN2
77#define RAM_START 0x10000
78#define RAM_LENGTH 0x7f0000
79#endif
80
81#ifdef CONFIG_UCQUICC
82#define ROMVEC_START 0x00000000
83#define ROMVEC_LENGTH 0x404
84#define ROM_START 0x00000404
85#define ROM_LENGTH 0x1ff6fc
86#define ROM_END 0x00200000
87#define RAMVEC_START 0x00200000
88#define RAMVEC_LENGTH 0x404
89#define RAM_START 0x00200404
90#define RAM_LENGTH 0x1ff6fc
91#define RAM_END 0x00400000
92#endif
93
94/*
95 * The standard Arnewsh 5206 board only has 1MiB of ram. Not normally
96 * enough to be useful. Assume the user has fitted something larger,
97 * at least 4MiB in size. No point in not letting the kernel completely
98 * link, it will be obvious if it is too big when they go to load it.
99 */
100#if defined(CONFIG_ARN5206)
101#define RAM_START 0x10000
102#define RAM_LENGTH 0x3f0000
103#endif
104
105/*
106 * The Motorola 5206eLITE board only has 1MiB of static RAM.
107 */
108#if defined(CONFIG_ELITE)
109#define RAM_START 0x30020000
4945b302 110#define RAM_LENGTH 0xe0000
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111#endif
112
113/*
114 * All the Motorola eval boards have the same basic arrangement.
115 * The end of RAM will vary depending on how much ram is fitted,
116 * but this isn't important here, we assume at least 4MiB.
117 */
118#if defined(CONFIG_M5206eC3) || defined(CONFIG_M5249C3) || \
119 defined(CONFIG_M5272C3) || defined(CONFIG_M5307C3) || \
120 defined(CONFIG_ARN5307) || defined(CONFIG_M5407C3) || \
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121 defined(CONFIG_M5271EVB) || defined(CONFIG_M5275EVB) || \
122 defined(CONFIG_M5235EVB)
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123#define RAM_START 0x20000
124#define RAM_LENGTH 0x3e0000
125#endif
126
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127/*
128 * The Freescale 5208EVB board has 32MB of RAM.
129 */
130#if defined(CONFIG_M5208EVB)
131#define RAM_START 0x40020000
694d855f 132#define RAM_LENGTH 0x01fe0000
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133#endif
134
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135/*
136 * The senTec COBRA5272 board has nearly the same memory layout as
137 * the M5272C3. We assume 16MiB ram.
138 */
139#if defined(CONFIG_COBRA5272)
140#define RAM_START 0x20000
141#define RAM_LENGTH 0xfe0000
142#endif
143
144#if defined(CONFIG_M5282EVB)
145#define RAM_START 0x10000
146#define RAM_LENGTH 0x3f0000
147#endif
148
149/*
150 * The senTec COBRA5282 board has the same memory layout as the M5282EVB.
151 */
152#if defined(CONFIG_COBRA5282)
153#define RAM_START 0x10000
154#define RAM_LENGTH 0x3f0000
155#endif
156
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157
158/*
159 * The EMAC SoM-5282EM module.
160 */
161#if defined(CONFIG_SOM5282EM)
162#define RAM_START 0x10000
163#define RAM_LENGTH 0xff0000
164#endif
165
166
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167/*
168 * These flash boot boards use all of ram for operation. Again the
169 * actual memory size is not important here, assume at least 4MiB.
170 * They currently have no support for running in flash.
171 */
172#if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \
173 defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || \
174 defined(CONFIG_HW_FEITH)
175#define RAM_START 0x400
176#define RAM_LENGTH 0x3ffc00
177#endif
178
179/*
4945b302 180 * Sneha Boards mimimun memory
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181 * The end of RAM will vary depending on how much ram is fitted,
182 * but this isn't important here, we assume at least 4MiB.
183 */
184#if defined(CONFIG_CPU16B)
185#define RAM_START 0x20000
186#define RAM_LENGTH 0x3e0000
187#endif
188
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189#if defined(CONFIG_MOD5272)
190#define RAM_START 0x02000000
191#define RAM_LENGTH 0x00800000
192#define RAMVEC_START 0x20000000
193#define RAMVEC_LENGTH 0x00000400
194#endif
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195
196#if defined(CONFIG_RAMKERNEL)
197#define TEXT ram
198#define DATA ram
199#define INIT ram
200#define BSS ram
201#endif
202#if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL)
203#define TEXT rom
204#define DATA ram
205#define INIT ram
206#define BSS ram
207#endif
208
209#ifndef DATA_ADDR
210#define DATA_ADDR
211#endif
212
213
214OUTPUT_ARCH(m68k)
215ENTRY(_start)
216
217MEMORY {
218#ifdef RAMVEC_START
219 ramvec : ORIGIN = RAMVEC_START, LENGTH = RAMVEC_LENGTH
220#endif
221 ram : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
222#ifdef RAM_END
223 eram : ORIGIN = RAM_END, LENGTH = 0
224#endif
225#ifdef ROM_START
226 romvec : ORIGIN = ROMVEC_START, LENGTH = ROMVEC_LENGTH
227 rom : ORIGIN = ROM_START, LENGTH = ROM_LENGTH
228 erom : ORIGIN = ROM_END, LENGTH = 0
229#endif
230}
231
232jiffies = jiffies_64 + 4;
233
234SECTIONS {
235
236#ifdef ROMVEC_START
237 . = ROMVEC_START ;
238 .romvec : {
239 __rom_start = . ;
240 _romvec = .;
241 *(.data.initvect)
242 } > romvec
243#endif
244
245 .text : {
246 _stext = . ;
247 *(.text)
248 SCHED_TEXT
249 *(.text.lock)
250
251 . = ALIGN(16); /* Exception table */
252 __start___ex_table = .;
253 *(__ex_table)
254 __stop___ex_table = .;
255
256 *(.rodata) *(.rodata.*)
257 *(__vermagic) /* Kernel version magic */
258 *(.rodata1)
259 *(.rodata.str1.1)
260
261 /* Kernel symbol table: Normal symbols */
262 . = ALIGN(4);
263 __start___ksymtab = .;
264 *(__ksymtab)
265 __stop___ksymtab = .;
266
267 /* Kernel symbol table: GPL-only symbols */
268 __start___ksymtab_gpl = .;
269 *(__ksymtab_gpl)
270 __stop___ksymtab_gpl = .;
271
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272 /* Kernel symbol table: GPL-future symbols */
273 __start___ksymtab_gpl_future = .;
274 *(__ksymtab_gpl_future)
275 __stop___ksymtab_gpl_future = .;
276
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277 /* Kernel symbol table: Normal symbols */
278 __start___kcrctab = .;
279 *(__kcrctab)
280 __stop___kcrctab = .;
281
282 /* Kernel symbol table: GPL-only symbols */
283 __start___kcrctab_gpl = .;
284 *(__kcrctab_gpl)
285 __stop___kcrctab_gpl = .;
286
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287 /* Kernel symbol table: GPL-future symbols */
288 __start___kcrctab_gpl_future = .;
289 *(__kcrctab_gpl_future)
290 __stop___kcrctab_gpl_future = .;
291
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292 /* Kernel symbol table: strings */
293 *(__ksymtab_strings)
294
295 /* Built-in module parameters */
124df2df 296 . = ALIGN(4) ;
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297 __start___param = .;
298 *(__param)
299 __stop___param = .;
300
301 . = ALIGN(4) ;
302 _etext = . ;
303 } > TEXT
304
305#ifdef ROM_END
306 . = ROM_END ;
307 .erom : {
308 __rom_end = . ;
309 } > erom
310#endif
311#ifdef RAMVEC_START
312 . = RAMVEC_START ;
313 .ramvec : {
314 __ramvec = .;
315 } > ramvec
316#endif
317
318 .data DATA_ADDR : {
319 . = ALIGN(4);
320 _sdata = . ;
321 *(.data)
322 . = ALIGN(8192) ;
323 *(.data.init_task)
324 _edata = . ;
325 } > DATA
326
327 .init : {
328 . = ALIGN(4096);
329 __init_begin = .;
330 _sinittext = .;
331 *(.init.text)
332 _einittext = .;
333 *(.init.data)
334 . = ALIGN(16);
335 __setup_start = .;
336 *(.init.setup)
337 __setup_end = .;
338 __initcall_start = .;
339 *(.initcall1.init)
340 *(.initcall2.init)
341 *(.initcall3.init)
342 *(.initcall4.init)
343 *(.initcall5.init)
344 *(.initcall6.init)
345 *(.initcall7.init)
346 __initcall_end = .;
347 __con_initcall_start = .;
348 *(.con_initcall.init)
349 __con_initcall_end = .;
350 __security_initcall_start = .;
351 *(.security_initcall.init)
352 __security_initcall_end = .;
353 . = ALIGN(4);
354 __initramfs_start = .;
355 *(.init.ramfs)
356 __initramfs_end = .;
357 . = ALIGN(4096);
358 __init_end = .;
359 } > INIT
360
361 /DISCARD/ : {
362 *(.exit.text)
363 *(.exit.data)
364 *(.exitcall.exit)
365 }
366
367 .bss : {
368 . = ALIGN(4);
369 _sbss = . ;
370 *(.bss)
371 *(COMMON)
372 . = ALIGN(4) ;
373 _ebss = . ;
374 } > BSS
375
376#ifdef RAM_END
377 . = RAM_END ;
378 .eram : {
379 __ramend = . ;
380 _ramend = . ;
381 } > eram
382#endif
383}
384
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