projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /***************************************************************************/ |
| 2 | ||
| 3 | /* | |
| 4 | * linux/arch/m68knommu/platform/5206/config.c | |
| 5 | * | |
| 6 | * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) | |
| 7 | * Copyright (C) 2000-2001, Lineo Inc. (www.lineo.com) | |
| 8 | */ | |
| 9 | ||
| 10 | /***************************************************************************/ | |
| 11 | ||
| 1da177e4 | 12 | #include <linux/kernel.h> |
| 1da177e4 LT |
13 | #include <linux/param.h> |
| 14 | #include <linux/init.h> | |
| 9685c43e | 15 | #include <linux/io.h> |
| 1da177e4 LT |
16 | #include <asm/machdep.h> |
| 17 | #include <asm/coldfire.h> | |
| 1da177e4 | 18 | #include <asm/mcfsim.h> |
| 9685c43e | 19 | #include <asm/mcfuart.h> |
| 1da177e4 LT |
20 | |
| 21 | /***************************************************************************/ | |
| 22 | ||
| 9685c43e GU |
23 | static struct mcf_platform_uart m5206_uart_platform[] = { |
| 24 | { | |
| 25 | .mapbase = MCF_MBAR + MCFUART_BASE1, | |
| 26 | .irq = 73, | |
| 27 | }, | |
| 28 | { | |
| 29 | .mapbase = MCF_MBAR + MCFUART_BASE2, | |
| 30 | .irq = 74, | |
| 31 | }, | |
| 32 | { }, | |
| 33 | }; | |
| 34 | ||
| 35 | static struct platform_device m5206_uart = { | |
| 36 | .name = "mcfuart", | |
| 37 | .id = 0, | |
| 38 | .dev.platform_data = m5206_uart_platform, | |
| 1da177e4 LT |
39 | }; |
| 40 | ||
| 9685c43e GU |
41 | static struct platform_device *m5206_devices[] __initdata = { |
| 42 | &m5206_uart, | |
| 43 | }; | |
| 44 | ||
| 45 | /***************************************************************************/ | |
| 46 | ||
| 47 | static void __init m5206_uart_init_line(int line, int irq) | |
| 48 | { | |
| 49 | if (line == 0) { | |
| 50 | writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); | |
| 51 | writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); | |
| 39f0fb6a | 52 | mcf_mapirq2imr(irq, MCFINTC_UART0); |
| 9685c43e GU |
53 | } else if (line == 1) { |
| 54 | writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); | |
| 55 | writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); | |
| 39f0fb6a | 56 | mcf_mapirq2imr(irq, MCFINTC_UART1); |
| 9685c43e GU |
57 | } |
| 58 | } | |
| 59 | ||
| 60 | static void __init m5206_uarts_init(void) | |
| 61 | { | |
| 62 | const int nrlines = ARRAY_SIZE(m5206_uart_platform); | |
| 63 | int line; | |
| 64 | ||
| 65 | for (line = 0; (line < nrlines); line++) | |
| 66 | m5206_uart_init_line(line, m5206_uart_platform[line].irq); | |
| 67 | } | |
| 1da177e4 LT |
68 | |
| 69 | /***************************************************************************/ | |
| 70 | ||
| 04b75b10 | 71 | static void __init m5206_timers_init(void) |
| 1da177e4 | 72 | { |
| 04b75b10 GU |
73 | /* Timer1 is always used as system timer */ |
| 74 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, | |
| 75 | MCF_MBAR + MCFSIM_TIMER1ICR); | |
| 39f0fb6a | 76 | mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); |
| 04b75b10 GU |
77 | |
| 78 | #ifdef CONFIG_HIGHPROFILE | |
| 79 | /* Timer2 is to be used as a high speed profile timer */ | |
| 80 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, | |
| 81 | MCF_MBAR + MCFSIM_TIMER2ICR); | |
| 39f0fb6a | 82 | mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); |
| 04b75b10 | 83 | #endif |
| 1da177e4 LT |
84 | } |
| 85 | ||
| 86 | /***************************************************************************/ | |
| 87 | ||
| 851377bc GU |
88 | void m5206_cpu_reset(void) |
| 89 | { | |
| 90 | local_irq_disable(); | |
| 91 | /* Set watchdog to soft reset, and enabled */ | |
| 92 | __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); | |
| 93 | for (;;) | |
| 94 | /* wait for watchdog to timeout */; | |
| 95 | } | |
| 96 | ||
| 97 | /***************************************************************************/ | |
| 98 | ||
| 9685c43e | 99 | void __init config_BSP(char *commandp, int size) |
| 1da177e4 | 100 | { |
| 851377bc | 101 | mach_reset = m5206_cpu_reset; |
| 04b75b10 | 102 | m5206_timers_init(); |
| 39f0fb6a GU |
103 | m5206_uarts_init(); |
| 104 | ||
| 105 | /* Only support the external interrupts on their primary level */ | |
| 106 | mcf_mapirq2imr(25, MCFINTC_EINT1); | |
| 107 | mcf_mapirq2imr(28, MCFINTC_EINT4); | |
| 108 | mcf_mapirq2imr(31, MCFINTC_EINT7); | |
| 1da177e4 LT |
109 | } |
| 110 | ||
| 111 | /***************************************************************************/ | |
| 9685c43e GU |
112 | |
| 113 | static int __init init_BSP(void) | |
| 114 | { | |
| 9685c43e GU |
115 | platform_add_devices(m5206_devices, ARRAY_SIZE(m5206_devices)); |
| 116 | return 0; | |
| 117 | } | |
| 118 | ||
| 119 | arch_initcall(init_BSP); | |
| 120 | ||
| 121 | /***************************************************************************/ |