[deliverable/linux.git] / arch / m68knommu / platform / 5206e / config.c

/***************************************************************************/

/*
 *	linux/arch/m68knommu/platform/5206e/config.c
 *
 *	Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
 */

/***************************************************************************/

#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfdma.h>

/***************************************************************************/

void coldfire_reset(void);

/***************************************************************************/

static struct mcf_platform_uart m5206e_uart_platform[] = {
	{
		.mapbase	= MCF_MBAR + MCFUART_BASE1,
		.irq		= 73,
	},
	{
		.mapbase 	= MCF_MBAR + MCFUART_BASE2,
		.irq		= 74,
	},
	{ },
};

static struct platform_device m5206e_uart = {
	.name			= "mcfuart",
	.id			= 0,
	.dev.platform_data	= m5206e_uart_platform,
};

static struct platform_device *m5206e_devices[] __initdata = {
	&m5206e_uart,
};

/***************************************************************************/

static void __init m5206e_uart_init_line(int line, int irq)
{
	if (line == 0) {
		writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
		writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
		mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
	} else if (line == 1) {
		writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
		writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
		mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
	}
}

static void __init m5206e_uarts_init(void)
{
	const int nrlines = ARRAY_SIZE(m5206e_uart_platform);
	int line;

	for (line = 0; (line < nrlines); line++)
		m5206e_uart_init_line(line, m5206e_uart_platform[line].irq);
}

/***************************************************************************/

void mcf_autovector(unsigned int vec)
{
	volatile unsigned char  *mbar;
	unsigned char		icr;

	if ((vec >= 25) && (vec <= 31)) {
		vec -= 25;
		mbar = (volatile unsigned char *) MCF_MBAR;
		icr = MCFSIM_ICR_AUTOVEC | (vec << 3);
		*(mbar + MCFSIM_ICR1 + vec) = icr;
		vec = 0x1 << (vec + 1);
		mcf_setimr(mcf_getimr() & ~vec);
	}
}

/***************************************************************************/

void mcf_settimericr(unsigned int timer, unsigned int level)
{
	volatile unsigned char *icrp;
	unsigned int icr, imr;

	if (timer <= 2) {
		switch (timer) {
		case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
		default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
		}

		icrp = (volatile unsigned char *) (MCF_MBAR + icr);
		*icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
		mcf_setimr(mcf_getimr() & ~imr);
	}
}

/***************************************************************************/

void __init config_BSP(char *commandp, int size)
{
	mcf_setimr(MCFSIM_IMR_MASKALL);

#if defined(CONFIG_NETtel)
	/* Copy command line from FLASH to local buffer... */
	memcpy(commandp, (char *) 0xf0004000, size);
	commandp[size-1] = 0;
#endif /* CONFIG_NETtel */

	mach_reset = coldfire_reset;
}

/***************************************************************************/

static int __init init_BSP(void)
{
	m5206e_uarts_init();
	platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));
	return 0;
}

arch_initcall(init_BSP);

/***************************************************************************/
Commit	Line	Data
1da177e4 LT	1	/***************************************************************************/
	2
	3	/*
	4	* linux/arch/m68knommu/platform/5206e/config.c
	5	*
	6	* Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
	7	*/
	8
	9	/***************************************************************************/
	10
1da177e4	11	#include <linux/kernel.h>
1da177e4	12	#include <linux/param.h>
cf64c233	13	#include <linux/init.h>
1da177e4	14	#include <linux/interrupt.h>
cf64c233	15	#include <linux/io.h>
1da177e4 LT	16	#include <asm/machdep.h>
1da177e4 LT	17	#include <asm/coldfire.h>
1da177e4 LT	18	#include <asm/mcfsim.h>
1da177e4 LT	19	#include <asm/mcfdma.h>
1da177e4 LT	20
	21	/***************************************************************************/
	22
1da177e4 LT	23	void coldfire_reset(void);
	24
	25	/***************************************************************************/
	26
cf64c233 GU	27	static struct mcf_platform_uart m5206e_uart_platform[] = {
	28	{
	29	.mapbase = MCF_MBAR + MCFUART_BASE1,
	30	.irq = 73,
	31	},
	32	{
	33	.mapbase = MCF_MBAR + MCFUART_BASE2,
	34	.irq = 74,
	35	},
	36	{ },
	37	};
	38
	39	static struct platform_device m5206e_uart = {
	40	.name = "mcfuart",
	41	.id = 0,
	42	.dev.platform_data = m5206e_uart_platform,
1da177e4 LT	43	};
1da177e4 LT	44
cf64c233 GU	45	static struct platform_device *m5206e_devices[] __initdata = {
	46	&m5206e_uart,
	47	};
	48
	49	/***************************************************************************/
	50
d259c329	51	static void __init m5206e_uart_init_line(int line, int irq)
cf64c233 GU	52	{
	53	if (line == 0) {
	54	writel(MCFSIM_ICR_LEVEL6 \| MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
	55	writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
	56	mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
	57	} else if (line == 1) {
	58	writel(MCFSIM_ICR_LEVEL6 \| MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
	59	writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
	60	mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
	61	}
	62	}
	63
	64	static void __init m5206e_uarts_init(void)
	65	{
	66	const int nrlines = ARRAY_SIZE(m5206e_uart_platform);
	67	int line;
	68
	69	for (line = 0; (line < nrlines); line++)
	70	m5206e_uart_init_line(line, m5206e_uart_platform[line].irq);
	71	}
1da177e4 LT	72
	73	/***************************************************************************/
	74
	75	void mcf_autovector(unsigned int vec)
	76	{
	77	volatile unsigned char *mbar;
	78	unsigned char icr;
	79
	80	if ((vec >= 25) && (vec <= 31)) {
	81	vec -= 25;
	82	mbar = (volatile unsigned char *) MCF_MBAR;
	83	icr = MCFSIM_ICR_AUTOVEC \| (vec << 3);
	84	*(mbar + MCFSIM_ICR1 + vec) = icr;
	85	vec = 0x1 << (vec + 1);
	86	mcf_setimr(mcf_getimr() & ~vec);
	87	}
	88	}
	89
	90	/***************************************************************************/
	91
	92	void mcf_settimericr(unsigned int timer, unsigned int level)
	93	{
	94	volatile unsigned char *icrp;
	95	unsigned int icr, imr;
	96
	97	if (timer <= 2) {
	98	switch (timer) {
	99	case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
	100	default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
	101	}
	102
	103	icrp = (volatile unsigned char *) (MCF_MBAR + icr);
	104	*icrp = MCFSIM_ICR_AUTOVEC \| (level << 2) \| MCFSIM_ICR_PRI3;
	105	mcf_setimr(mcf_getimr() & ~imr);
	106	}
	107	}
	108
	109	/***************************************************************************/
	110
cf64c233	111	void __init config_BSP(char *commandp, int size)
1da177e4 LT	112	{
	113	mcf_setimr(MCFSIM_IMR_MASKALL);
	114
bc72450a	115	#if defined(CONFIG_NETtel)
1da177e4 LT	116	/* Copy command line from FLASH to local buffer... */
	117	memcpy(commandp, (char *) 0xf0004000, size);
	118	commandp[size-1] = 0;
1da177e4 LT	119	#endif /* CONFIG_NETtel */
1da177e4 LT	120
1da177e4 LT	121	mach_reset = coldfire_reset;
	122	}
	123
	124	/***************************************************************************/
cf64c233 GU	125
	126	static int __init init_BSP(void)
	127	{
	128	m5206e_uarts_init();
	129	platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));
	130	return 0;
	131	}
	132
	133	arch_initcall(init_BSP);
	134
	135	/***************************************************************************/