Commit | Line | Data |
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1da177e4 LT |
1 | /***************************************************************************/ |
2 | ||
3 | /* | |
4 | * linux/arch/m68knommu/platform/528x/config.c | |
5 | * | |
980f9235 GU |
6 | * Sub-architcture dependant initialization code for the Freescale |
7 | * 5280, 5281 and 5282 CPUs. | |
1da177e4 LT |
8 | * |
9 | * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com) | |
10 | * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com) | |
11 | */ | |
12 | ||
13 | /***************************************************************************/ | |
14 | ||
1da177e4 | 15 | #include <linux/kernel.h> |
1da177e4 LT |
16 | #include <linux/param.h> |
17 | #include <linux/init.h> | |
eb49e907 | 18 | #include <linux/platform_device.h> |
eb49e907 | 19 | #include <linux/io.h> |
1da177e4 LT |
20 | #include <asm/machdep.h> |
21 | #include <asm/coldfire.h> | |
22 | #include <asm/mcfsim.h> | |
eb49e907 | 23 | #include <asm/mcfuart.h> |
1da177e4 LT |
24 | |
25 | /***************************************************************************/ | |
26 | ||
eb49e907 GU |
27 | static struct mcf_platform_uart m528x_uart_platform[] = { |
28 | { | |
29 | .mapbase = MCF_MBAR + MCFUART_BASE1, | |
30 | .irq = MCFINT_VECBASE + MCFINT_UART0, | |
31 | }, | |
32 | { | |
33 | .mapbase = MCF_MBAR + MCFUART_BASE2, | |
34 | .irq = MCFINT_VECBASE + MCFINT_UART0 + 1, | |
35 | }, | |
36 | { | |
37 | .mapbase = MCF_MBAR + MCFUART_BASE3, | |
38 | .irq = MCFINT_VECBASE + MCFINT_UART0 + 2, | |
39 | }, | |
40 | { }, | |
1da177e4 LT |
41 | }; |
42 | ||
eb49e907 GU |
43 | static struct platform_device m528x_uart = { |
44 | .name = "mcfuart", | |
45 | .id = 0, | |
46 | .dev.platform_data = m528x_uart_platform, | |
47 | }; | |
48 | ||
ffba3f48 GU |
49 | static struct resource m528x_fec_resources[] = { |
50 | { | |
51 | .start = MCF_MBAR + 0x1000, | |
52 | .end = MCF_MBAR + 0x1000 + 0x7ff, | |
53 | .flags = IORESOURCE_MEM, | |
54 | }, | |
55 | { | |
56 | .start = 64 + 23, | |
57 | .end = 64 + 23, | |
58 | .flags = IORESOURCE_IRQ, | |
59 | }, | |
60 | { | |
61 | .start = 64 + 27, | |
62 | .end = 64 + 27, | |
63 | .flags = IORESOURCE_IRQ, | |
64 | }, | |
65 | { | |
66 | .start = 64 + 29, | |
67 | .end = 64 + 29, | |
68 | .flags = IORESOURCE_IRQ, | |
69 | }, | |
70 | }; | |
71 | ||
72 | static struct platform_device m528x_fec = { | |
73 | .name = "fec", | |
74 | .id = 0, | |
75 | .num_resources = ARRAY_SIZE(m528x_fec_resources), | |
76 | .resource = m528x_fec_resources, | |
77 | }; | |
78 | ||
79 | ||
eb49e907 GU |
80 | static struct platform_device *m528x_devices[] __initdata = { |
81 | &m528x_uart, | |
ffba3f48 | 82 | &m528x_fec, |
eb49e907 GU |
83 | }; |
84 | ||
85 | /***************************************************************************/ | |
86 | ||
eb49e907 GU |
87 | static void __init m528x_uart_init_line(int line, int irq) |
88 | { | |
89 | u8 port; | |
eb49e907 GU |
90 | |
91 | if ((line < 0) || (line > 2)) | |
92 | return; | |
93 | ||
eb49e907 GU |
94 | /* make sure PUAPAR is set for UART0 and UART1 */ |
95 | if (line < 2) { | |
96 | port = readb(MCF_MBAR + MCF5282_GPIO_PUAPAR); | |
97 | port |= (0x03 << (line * 2)); | |
98 | writeb(port, MCF_MBAR + MCF5282_GPIO_PUAPAR); | |
99 | } | |
100 | } | |
101 | ||
102 | static void __init m528x_uarts_init(void) | |
103 | { | |
104 | const int nrlines = ARRAY_SIZE(m528x_uart_platform); | |
105 | int line; | |
106 | ||
107 | for (line = 0; (line < nrlines); line++) | |
108 | m528x_uart_init_line(line, m528x_uart_platform[line].irq); | |
109 | } | |
1da177e4 LT |
110 | |
111 | /***************************************************************************/ | |
112 | ||
ffba3f48 GU |
113 | static void __init m528x_fec_init(void) |
114 | { | |
ffba3f48 GU |
115 | u16 v16; |
116 | ||
ffba3f48 GU |
117 | /* Set multi-function pins to ethernet mode for fec0 */ |
118 | v16 = readw(MCF_IPSBAR + 0x100056); | |
119 | writew(v16 | 0xf00, MCF_IPSBAR + 0x100056); | |
120 | writeb(0xc0, MCF_IPSBAR + 0x100058); | |
121 | } | |
122 | ||
123 | /***************************************************************************/ | |
124 | ||
dd65b1de GU |
125 | static void m528x_cpu_reset(void) |
126 | { | |
127 | local_irq_disable(); | |
128 | __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR); | |
129 | } | |
130 | ||
131 | /***************************************************************************/ | |
132 | ||
188a9a48 SB |
133 | #ifdef CONFIG_WILDFIRE |
134 | void wildfire_halt(void) | |
135 | { | |
136 | writeb(0, 0x30000007); | |
137 | writeb(0x2, 0x30000007); | |
138 | } | |
139 | #endif | |
140 | ||
141 | #ifdef CONFIG_WILDFIREMOD | |
142 | void wildfiremod_halt(void) | |
143 | { | |
144 | printk(KERN_INFO "WildFireMod hibernating...\n"); | |
145 | ||
146 | /* Set portE.5 to Digital IO */ | |
147 | MCF5282_GPIO_PEPAR &= ~(1 << (5 * 2)); | |
148 | ||
149 | /* Make portE.5 an output */ | |
150 | MCF5282_GPIO_DDRE |= (1 << 5); | |
151 | ||
152 | /* Now toggle portE.5 from low to high */ | |
153 | MCF5282_GPIO_PORTE &= ~(1 << 5); | |
154 | MCF5282_GPIO_PORTE |= (1 << 5); | |
155 | ||
156 | printk(KERN_EMERG "Failed to hibernate. Halting!\n"); | |
157 | } | |
158 | #endif | |
159 | ||
eb49e907 | 160 | void __init config_BSP(char *commandp, int size) |
1da177e4 | 161 | { |
188a9a48 SB |
162 | #ifdef CONFIG_WILDFIRE |
163 | mach_halt = wildfire_halt; | |
164 | #endif | |
165 | #ifdef CONFIG_WILDFIREMOD | |
166 | mach_halt = wildfiremod_halt; | |
167 | #endif | |
1da177e4 LT |
168 | } |
169 | ||
170 | /***************************************************************************/ | |
eb49e907 GU |
171 | |
172 | static int __init init_BSP(void) | |
173 | { | |
dd65b1de | 174 | mach_reset = m528x_cpu_reset; |
eb49e907 | 175 | m528x_uarts_init(); |
ffba3f48 | 176 | m528x_fec_init(); |
eb49e907 GU |
177 | platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices)); |
178 | return 0; | |
179 | } | |
180 | ||
181 | arch_initcall(init_BSP); | |
182 | ||
183 | /***************************************************************************/ |