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1da177e4 LT |
1 | /* |
2 | * linux/arch/m68knommu/platform/68360/config.c | |
3 | * | |
4 | * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com> | |
5 | * Copyright (C) 1993 Hamish Macdonald | |
6 | * Copyright (C) 1999 D. Jeff Dionne <jeff@uclinux.org> | |
7 | * | |
8 | * This file is subject to the terms and conditions of the GNU General Public | |
9 | * License. See the file COPYING in the main directory of this archive | |
10 | * for more details. | |
11 | */ | |
12 | ||
13 | #include <stdarg.h> | |
1da177e4 LT |
14 | #include <linux/types.h> |
15 | #include <linux/kernel.h> | |
16 | #include <linux/mm.h> | |
b032fde9 | 17 | #include <linux/interrupt.h> |
aa1f1d10 | 18 | #include <linux/irq.h> |
1da177e4 LT |
19 | |
20 | #include <asm/setup.h> | |
21 | #include <asm/system.h> | |
22 | #include <asm/pgtable.h> | |
1da177e4 LT |
23 | #include <asm/machdep.h> |
24 | #include <asm/m68360.h> | |
25 | ||
26 | #ifdef CONFIG_UCQUICC | |
27 | #include <asm/bootstd.h> | |
28 | #endif | |
29 | ||
30 | extern void m360_cpm_reset(void); | |
31 | ||
32 | // Mask to select if the PLL prescaler is enabled. | |
33 | #define MCU_PREEN ((unsigned short)(0x0001 << 13)) | |
34 | ||
35 | #if defined(CONFIG_UCQUICC) | |
36 | #define OSCILLATOR (unsigned long int)33000000 | |
37 | #endif | |
38 | ||
39 | unsigned long int system_clock; | |
40 | ||
1da177e4 LT |
41 | extern QUICC *pquicc; |
42 | ||
43 | /* TODO DON"T Hard Code this */ | |
44 | /* calculate properly using the right PLL and prescaller */ | |
45 | // unsigned int system_clock = 33000000l; | |
46 | extern unsigned long int system_clock; //In kernel setup.c | |
47 | ||
7e6a3d40 GU |
48 | |
49 | static irqreturn_t hw_tick(int irq, void *dummy) | |
50 | { | |
51 | /* Reset Timer1 */ | |
52 | /* TSTAT &= 0; */ | |
53 | ||
54 | pquicc->timer_ter1 = 0x0002; /* clear timer event */ | |
55 | ||
56 | return arch_timer_interrupt(irq, dummy); | |
57 | } | |
1da177e4 | 58 | |
aa1f1d10 | 59 | static struct irqaction m68360_timer_irq = { |
7e6a3d40 GU |
60 | .name = "timer", |
61 | .flags = IRQF_DISABLED | IRQF_TIMER, | |
62 | .handler = hw_tick, | |
aa1f1d10 GU |
63 | }; |
64 | ||
7e6a3d40 | 65 | void hw_timer_init(void) |
1da177e4 LT |
66 | { |
67 | unsigned char prescaler; | |
68 | unsigned short tgcr_save; | |
1da177e4 LT |
69 | |
70 | #if 0 | |
71 | /* Restart mode, Enable int, 32KHz, Enable timer */ | |
72 | TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN; | |
73 | /* Set prescaler (Divide 32KHz by 32)*/ | |
74 | TPRER = 31; | |
75 | /* Set compare register 32Khz / 32 / 10 = 100 */ | |
76 | TCMP = 10; | |
77 | ||
4531dab4 | 78 | request_irq(IRQ_MACHSPEC | 1, timer_routine, 0, "timer", NULL); |
1da177e4 LT |
79 | #endif |
80 | ||
81 | /* General purpose quicc timers: MC68360UM p7-20 */ | |
82 | ||
83 | /* Set up timer 1 (in [1..4]) to do 100Hz */ | |
84 | tgcr_save = pquicc->timer_tgcr & 0xfff0; | |
85 | pquicc->timer_tgcr = tgcr_save; /* stop and reset timer 1 */ | |
86 | /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */ | |
87 | ||
88 | prescaler = 8; | |
89 | pquicc->timer_tmr1 = 0x001a | /* or=1, frr=1, iclk=01b */ | |
90 | (unsigned short)((prescaler - 1) << 8); | |
91 | ||
92 | pquicc->timer_tcn1 = 0x0000; /* initial count */ | |
93 | /* calculate interval for 100Hz based on the _system_clock: */ | |
94 | pquicc->timer_trr1 = (system_clock/ prescaler) / HZ; /* reference count */ | |
95 | ||
96 | pquicc->timer_ter1 = 0x0003; /* clear timer events */ | |
97 | ||
98 | /* enable timer 1 interrupt in CIMR */ | |
aa1f1d10 | 99 | setup_irq(CPMVEC_TIMER1, &m68360_timer_irq); |
1da177e4 LT |
100 | |
101 | /* Start timer 1: */ | |
102 | tgcr_save = (pquicc->timer_tgcr & 0xfff0) | 0x0001; | |
103 | pquicc->timer_tgcr = tgcr_save; | |
104 | } | |
105 | ||
1da177e4 LT |
106 | void BSP_gettod (int *yearp, int *monp, int *dayp, |
107 | int *hourp, int *minp, int *secp) | |
108 | { | |
109 | } | |
110 | ||
7e6a3d40 | 111 | int BSP_set_clock_mmss(unsigned long nowtime) |
1da177e4 LT |
112 | { |
113 | #if 0 | |
114 | short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; | |
115 | ||
116 | tod->second1 = real_seconds / 10; | |
117 | tod->second2 = real_seconds % 10; | |
118 | tod->minute1 = real_minutes / 10; | |
119 | tod->minute2 = real_minutes % 10; | |
120 | #endif | |
121 | return 0; | |
122 | } | |
123 | ||
124 | void BSP_reset (void) | |
125 | { | |
126 | local_irq_disable(); | |
bda65838 GU |
127 | asm volatile ( |
128 | "moveal #_start, %a0;\n" | |
129 | "moveb #0, 0xFFFFF300;\n" | |
130 | "moveal 0(%a0), %sp;\n" | |
131 | "moveal 4(%a0), %a0;\n" | |
132 | "jmp (%a0);\n" | |
133 | ); | |
1da177e4 LT |
134 | } |
135 | ||
136 | unsigned char *scc1_hwaddr; | |
137 | static int errno; | |
138 | ||
139 | #if defined (CONFIG_UCQUICC) | |
140 | _bsc0(char *, getserialnum) | |
141 | _bsc1(unsigned char *, gethwaddr, int, a) | |
142 | _bsc1(char *, getbenv, char *, a) | |
143 | #endif | |
144 | ||
145 | ||
146 | void config_BSP(char *command, int len) | |
147 | { | |
148 | unsigned char *p; | |
149 | ||
150 | m360_cpm_reset(); | |
151 | ||
152 | /* Calculate the real system clock value. */ | |
153 | { | |
154 | unsigned int local_pllcr = (unsigned int)(pquicc->sim_pllcr); | |
155 | if( local_pllcr & MCU_PREEN ) // If the prescaler is dividing by 128 | |
156 | { | |
157 | int mf = (int)(pquicc->sim_pllcr & 0x0fff); | |
158 | system_clock = (OSCILLATOR / 128) * (mf + 1); | |
159 | } | |
160 | else | |
161 | { | |
162 | int mf = (int)(pquicc->sim_pllcr & 0x0fff); | |
163 | system_clock = (OSCILLATOR) * (mf + 1); | |
164 | } | |
165 | } | |
166 | ||
167 | printk(KERN_INFO "\n68360 QUICC support (C) 2000 Lineo Inc.\n"); | |
168 | ||
169 | #if defined(CONFIG_UCQUICC) && 0 | |
170 | printk(KERN_INFO "uCquicc serial string [%s]\n",getserialnum()); | |
171 | p = scc1_hwaddr = gethwaddr(0); | |
172 | printk(KERN_INFO "uCquicc hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n", | |
173 | p[0], p[1], p[2], p[3], p[4], p[5]); | |
174 | ||
175 | p = getbenv("APPEND"); | |
176 | if (p) | |
177 | strcpy(p,command); | |
178 | else | |
179 | command[0] = 0; | |
180 | #else | |
181 | scc1_hwaddr = "\00\01\02\03\04\05"; | |
182 | #endif | |
183 | ||
1da177e4 | 184 | mach_gettod = BSP_gettod; |
1da177e4 LT |
185 | mach_reset = BSP_reset; |
186 | } |