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1da177e4 LT |
1 | /*****************************************************************************/ |
2 | ||
3 | /* | |
4 | * head.S -- common startup code for ColdFire CPUs. | |
5 | * | |
12ddae33 | 6 | * (C) Copyright 1999-2006, Greg Ungerer <gerg@snapgear.com>. |
1da177e4 LT |
7 | */ |
8 | ||
9 | /*****************************************************************************/ | |
10 | ||
1da177e4 LT |
11 | #include <linux/sys.h> |
12 | #include <linux/linkage.h> | |
9b0e7410 | 13 | #include <linux/init.h> |
1da177e4 LT |
14 | #include <asm/asm-offsets.h> |
15 | #include <asm/coldfire.h> | |
16 | #include <asm/mcfcache.h> | |
17 | #include <asm/mcfsim.h> | |
df9ee292 | 18 | #include <asm/thread_info.h> |
1da177e4 LT |
19 | |
20 | /*****************************************************************************/ | |
21 | ||
22 | /* | |
12ddae33 | 23 | * If we don't have a fixed memory size, then lets build in code |
1da177e4 | 24 | * to auto detect the DRAM size. Obviously this is the prefered |
12ddae33 GU |
25 | * method, and should work for most boards. It won't work for those |
26 | * that do not have their RAM starting at address 0, and it only | |
27 | * works on SDRAM (not boards fitted with SRAM). | |
1da177e4 | 28 | */ |
12ddae33 | 29 | #if CONFIG_RAMSIZE != 0 |
1da177e4 | 30 | .macro GET_MEM_SIZE |
12ddae33 | 31 | movel #CONFIG_RAMSIZE,%d0 /* hard coded memory size */ |
1da177e4 LT |
32 | .endm |
33 | ||
34 | #elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \ | |
35 | defined(CONFIG_M5249) || defined(CONFIG_M527x) || \ | |
36 | defined(CONFIG_M528x) || defined(CONFIG_M5307) || \ | |
37 | defined(CONFIG_M5407) | |
38 | /* | |
39 | * Not all these devices have exactly the same DRAM controller, | |
40 | * but the DCMR register is virtually identical - give or take | |
41 | * a couple of bits. The only exception is the 5272 devices, their | |
42 | * DRAM controller is quite different. | |
43 | */ | |
44 | .macro GET_MEM_SIZE | |
45 | movel MCF_MBAR+MCFSIM_DMR0,%d0 /* get mask for 1st bank */ | |
46 | btst #0,%d0 /* check if region enabled */ | |
47 | beq 1f | |
48 | andl #0xfffc0000,%d0 | |
49 | beq 1f | |
50 | addl #0x00040000,%d0 /* convert mask to size */ | |
51 | 1: | |
52 | movel MCF_MBAR+MCFSIM_DMR1,%d1 /* get mask for 2nd bank */ | |
53 | btst #0,%d1 /* check if region enabled */ | |
54 | beq 2f | |
55 | andl #0xfffc0000, %d1 | |
56 | beq 2f | |
57 | addl #0x00040000,%d1 | |
58 | addl %d1,%d0 /* total mem size in d0 */ | |
59 | 2: | |
60 | .endm | |
61 | ||
62 | #elif defined(CONFIG_M5272) | |
63 | .macro GET_MEM_SIZE | |
64 | movel MCF_MBAR+MCFSIM_CSOR7,%d0 /* get SDRAM address mask */ | |
65 | andil #0xfffff000,%d0 /* mask out chip select options */ | |
66 | negl %d0 /* negate bits */ | |
67 | .endm | |
55298405 MB |
68 | |
69 | #elif defined(CONFIG_M520x) | |
70 | .macro GET_MEM_SIZE | |
71 | clrl %d0 | |
72 | movel MCF_MBAR+MCFSIM_SDCS0, %d2 /* Get SDRAM chip select 0 config */ | |
73 | andl #0x1f, %d2 /* Get only the chip select size */ | |
74 | beq 3f /* Check if it is enabled */ | |
75 | addql #1, %d2 /* Form exponent */ | |
76 | moveql #1, %d0 | |
77 | lsll %d2, %d0 /* 2 ^ exponent */ | |
78 | 3: | |
79 | movel MCF_MBAR+MCFSIM_SDCS1, %d2 /* Get SDRAM chip select 1 config */ | |
80 | andl #0x1f, %d2 /* Get only the chip select size */ | |
81 | beq 4f /* Check if it is enabled */ | |
82 | addql #1, %d2 /* Form exponent */ | |
83 | moveql #1, %d1 | |
84 | lsll %d2, %d1 /* 2 ^ exponent */ | |
85 | addl %d1, %d0 /* Total size of SDRAM in d0 */ | |
86 | 4: | |
87 | .endm | |
1da177e4 LT |
88 | |
89 | #else | |
12ddae33 | 90 | #error "ERROR: I don't know how to probe your boards memory size?" |
1da177e4 LT |
91 | #endif |
92 | ||
93 | /*****************************************************************************/ | |
94 | ||
95 | /* | |
96 | * Boards and platforms can do specific early hardware setup if | |
97 | * they need to. Most don't need this, define away if not required. | |
98 | */ | |
99 | #ifndef PLATFORM_SETUP | |
100 | #define PLATFORM_SETUP | |
101 | #endif | |
102 | ||
103 | /*****************************************************************************/ | |
104 | ||
105 | .global _start | |
106 | .global _rambase | |
107 | .global _ramvec | |
108 | .global _ramstart | |
109 | .global _ramend | |
588baeac LS |
110 | #if defined(CONFIG_UBOOT) |
111 | .global _init_sp | |
112 | #endif | |
1da177e4 LT |
113 | |
114 | /*****************************************************************************/ | |
115 | ||
116 | .data | |
117 | ||
118 | /* | |
119 | * During startup we store away the RAM setup. These are not in the | |
120 | * bss, since their values are determined and written before the bss | |
121 | * has been cleared. | |
122 | */ | |
123 | _rambase: | |
124 | .long 0 | |
125 | _ramvec: | |
126 | .long 0 | |
127 | _ramstart: | |
128 | .long 0 | |
129 | _ramend: | |
130 | .long 0 | |
588baeac LS |
131 | #if defined(CONFIG_UBOOT) |
132 | _init_sp: | |
133 | .long 0 | |
134 | #endif | |
1da177e4 LT |
135 | |
136 | /*****************************************************************************/ | |
137 | ||
9b0e7410 | 138 | __HEAD |
1da177e4 LT |
139 | |
140 | /* | |
141 | * This is the codes first entry point. This is where it all | |
142 | * begins... | |
143 | */ | |
144 | ||
145 | _start: | |
146 | nop /* filler */ | |
147 | movew #0x2700, %sr /* no interrupts */ | |
588baeac LS |
148 | #if defined(CONFIG_UBOOT) |
149 | movel %sp,_init_sp /* save initial stack pointer */ | |
150 | #endif | |
1da177e4 LT |
151 | |
152 | /* | |
153 | * Do any platform or board specific setup now. Most boards | |
154 | * don't need anything. Those exceptions are define this in | |
155 | * their board specific includes. | |
156 | */ | |
157 | PLATFORM_SETUP | |
158 | ||
159 | /* | |
160 | * Create basic memory configuration. Set VBR accordingly, | |
161 | * and size memory. | |
162 | */ | |
12ddae33 | 163 | movel #CONFIG_VECTORBASE,%a7 |
1da177e4 LT |
164 | movec %a7,%VBR /* set vectors addr */ |
165 | movel %a7,_ramvec | |
166 | ||
12ddae33 | 167 | movel #CONFIG_RAMBASE,%a7 /* mark the base of RAM */ |
1da177e4 LT |
168 | movel %a7,_rambase |
169 | ||
170 | GET_MEM_SIZE /* macro code determines size */ | |
029fc137 | 171 | addl %a7,%d0 |
1da177e4 LT |
172 | movel %d0,_ramend /* set end ram addr */ |
173 | ||
174 | /* | |
175 | * Now that we know what the memory is, lets enable cache | |
176 | * and get things moving. This is Coldfire CPU specific. | |
177 | */ | |
178 | CACHE_ENABLE /* enable CPU cache */ | |
179 | ||
180 | ||
181 | #ifdef CONFIG_ROMFS_FS | |
182 | /* | |
183 | * Move ROM filesystem above bss :-) | |
184 | */ | |
185 | lea _sbss,%a0 /* get start of bss */ | |
186 | lea _ebss,%a1 /* set up destination */ | |
187 | movel %a0,%a2 /* copy of bss start */ | |
188 | ||
189 | movel 8(%a0),%d0 /* get size of ROMFS */ | |
190 | addql #8,%d0 /* allow for rounding */ | |
191 | andl #0xfffffffc, %d0 /* whole words */ | |
192 | ||
193 | addl %d0,%a0 /* copy from end */ | |
194 | addl %d0,%a1 /* copy from end */ | |
195 | movel %a1,_ramstart /* set start of ram */ | |
196 | ||
197 | _copy_romfs: | |
198 | movel -(%a0),%d0 /* copy dword */ | |
199 | movel %d0,-(%a1) | |
200 | cmpl %a0,%a2 /* check if at end */ | |
201 | bne _copy_romfs | |
202 | ||
203 | #else /* CONFIG_ROMFS_FS */ | |
204 | lea _ebss,%a1 | |
205 | movel %a1,_ramstart | |
206 | #endif /* CONFIG_ROMFS_FS */ | |
207 | ||
208 | ||
209 | /* | |
210 | * Zero out the bss region. | |
211 | */ | |
212 | lea _sbss,%a0 /* get start of bss */ | |
213 | lea _ebss,%a1 /* get end of bss */ | |
214 | clrl %d0 /* set value */ | |
215 | _clear_bss: | |
216 | movel %d0,(%a0)+ /* clear each word */ | |
217 | cmpl %a0,%a1 /* check if at end */ | |
218 | bne _clear_bss | |
219 | ||
220 | /* | |
221 | * Load the current task pointer and stack. | |
222 | */ | |
223 | lea init_thread_union,%a0 | |
224 | lea THREAD_SIZE(%a0),%sp | |
225 | ||
226 | /* | |
227 | * Assember start up done, start code proper. | |
228 | */ | |
229 | jsr start_kernel /* start Linux kernel */ | |
230 | ||
231 | _exit: | |
232 | jmp _exit /* should never get here */ | |
233 | ||
234 | /*****************************************************************************/ |