[deliverable/linux.git] / arch / microblaze / include / asm / io.h

/*
 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
 * Copyright (C) 2007-2009 PetaLogix
 * Copyright (C) 2006 Atmark Techno, Inc.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License. See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#ifndef _ASM_MICROBLAZE_IO_H
#define _ASM_MICROBLAZE_IO_H

#include <asm/byteorder.h>
#include <asm/page.h>
#include <linux/types.h>
#include <linux/mm.h>          /* Get struct page {...} */
#include <asm-generic/iomap.h>

#ifndef CONFIG_PCI
#define _IO_BASE	0
#define _ISA_MEM_BASE	0
#define PCI_DRAM_OFFSET	0
#else
#define _IO_BASE	isa_io_base
#define _ISA_MEM_BASE	isa_mem_base
#define PCI_DRAM_OFFSET	pci_dram_offset
#endif

extern unsigned long isa_io_base;
extern unsigned long pci_io_base;
extern unsigned long pci_dram_offset;

extern resource_size_t isa_mem_base;

#define IO_SPACE_LIMIT (0xFFFFFFFF)

/* the following is needed to support PCI with some drivers */

#define mmiowb()

static inline unsigned char __raw_readb(const volatile void __iomem *addr)
{
	return *(volatile unsigned char __force *)addr;
}
static inline unsigned short __raw_readw(const volatile void __iomem *addr)
{
	return *(volatile unsigned short __force *)addr;
}
static inline unsigned int __raw_readl(const volatile void __iomem *addr)
{
	return *(volatile unsigned int __force *)addr;
}
static inline unsigned long __raw_readq(const volatile void __iomem *addr)
{
	return *(volatile unsigned long __force *)addr;
}
static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
{
	*(volatile unsigned char __force *)addr = v;
}
static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
{
	*(volatile unsigned short __force *)addr = v;
}
static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
{
	*(volatile unsigned int __force *)addr = v;
}
static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
{
	*(volatile unsigned long __force *)addr = v;
}

/*
 * read (readb, readw, readl, readq) and write (writeb, writew,
 * writel, writeq) accessors are for PCI and thus little endian.
 * Linux 2.4 for Microblaze had this wrong.
 */
static inline unsigned char readb(const volatile void __iomem *addr)
{
	return *(volatile unsigned char __force *)addr;
}
static inline unsigned short readw(const volatile void __iomem *addr)
{
	return le16_to_cpu(*(volatile unsigned short __force *)addr);
}
static inline unsigned int readl(const volatile void __iomem *addr)
{
	return le32_to_cpu(*(volatile unsigned int __force *)addr);
}
#define readq readq
static inline u64 readq(const volatile void __iomem *addr)
{
	return le64_to_cpu(__raw_readq(addr));
}
static inline void writeb(unsigned char v, volatile void __iomem *addr)
{
	*(volatile unsigned char __force *)addr = v;
}
static inline void writew(unsigned short v, volatile void __iomem *addr)
{
	*(volatile unsigned short __force *)addr = cpu_to_le16(v);
}
static inline void writel(unsigned int v, volatile void __iomem *addr)
{
	*(volatile unsigned int __force *)addr = cpu_to_le32(v);
}
#define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr)

/* ioread and iowrite variants. thease are for now same as __raw_
 * variants of accessors. we might check for endianess in the feature
 */
#define ioread8(addr)		__raw_readb((u8 *)(addr))
#define ioread16(addr)		__raw_readw((u16 *)(addr))
#define ioread32(addr)		__raw_readl((u32 *)(addr))
#define iowrite8(v, addr)	__raw_writeb((u8)(v), (u8 *)(addr))
#define iowrite16(v, addr)	__raw_writew((u16)(v), (u16 *)(addr))
#define iowrite32(v, addr)	__raw_writel((u32)(v), (u32 *)(addr))

#define ioread16be(addr)	__raw_readw((u16 *)(addr))
#define ioread32be(addr)	__raw_readl((u32 *)(addr))
#define iowrite16be(v, addr)	__raw_writew((u16)(v), (u16 *)(addr))
#define iowrite32be(v, addr)	__raw_writel((u32)(v), (u32 *)(addr))

/* These are the definitions for the x86 IO instructions
 * inb/inw/inl/outb/outw/outl, the "string" versions
 * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
 * inb_p/inw_p/...
 * The macros don't do byte-swapping.
 */
#define inb(port)		readb((u8 *)((unsigned long)(port)))
#define outb(val, port)		writeb((val), (u8 *)((unsigned long)(port)))
#define inw(port)		readw((u16 *)((unsigned long)(port)))
#define outw(val, port)		writew((val), (u16 *)((unsigned long)(port)))
#define inl(port)		readl((u32 *)((unsigned long)(port)))
#define outl(val, port)		writel((val), (u32 *)((unsigned long)(port)))

#define inb_p(port)		inb((port))
#define outb_p(val, port)	outb((val), (port))
#define inw_p(port)		inw((port))
#define outw_p(val, port)	outw((val), (port))
#define inl_p(port)		inl((port))
#define outl_p(val, port)	outl((val), (port))

#define memset_io(a, b, c)	memset((void *)(a), (b), (c))
#define memcpy_fromio(a, b, c)	memcpy((a), (void *)(b), (c))
#define memcpy_toio(a, b, c)	memcpy((void *)(a), (b), (c))

#ifdef CONFIG_MMU

#define phys_to_virt(addr)	((void *)__phys_to_virt(addr))
#define virt_to_phys(addr)	((unsigned long)__virt_to_phys(addr))
#define virt_to_bus(addr)	((unsigned long)__virt_to_phys(addr))

#define page_to_bus(page)	(page_to_phys(page))
#define bus_to_virt(addr)	(phys_to_virt(addr))

extern void iounmap(void __iomem *addr);
/*extern void *__ioremap(phys_addr_t address, unsigned long size,
		unsigned long flags);*/
extern void __iomem *ioremap(phys_addr_t address, unsigned long size);
#define ioremap_writethrough(addr, size) ioremap((addr), (size))
#define ioremap_nocache(addr, size)      ioremap((addr), (size))
#define ioremap_fullcache(addr, size)    ioremap((addr), (size))

#else /* CONFIG_MMU */

/**
 *	virt_to_phys - map virtual addresses to physical
 *	@address: address to remap
 *
 *	The returned physical address is the physical (CPU) mapping for
 *	the memory address given. It is only valid to use this function on
 *	addresses directly mapped or allocated via kmalloc.
 *
 *	This function does not give bus mappings for DMA transfers. In
 *	almost all conceivable cases a device driver should not be using
 *	this function
 */
static inline unsigned long __iomem virt_to_phys(volatile void *address)
{
	return __pa((unsigned long)address);
}

#define virt_to_bus virt_to_phys

/**
 *	phys_to_virt - map physical address to virtual
 *	@address: address to remap
 *
 *	The returned virtual address is a current CPU mapping for
 *	the memory address given. It is only valid to use this function on
 *	addresses that have a kernel mapping
 *
 *	This function does not handle bus mappings for DMA transfers. In
 *	almost all conceivable cases a device driver should not be using
 *	this function
 */
static inline void *phys_to_virt(unsigned long address)
{
	return (void *)__va(address);
}

#define bus_to_virt(a) phys_to_virt(a)

static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
			unsigned long flags)
{
	return (void *)address;
}

#define ioremap(physaddr, size)	((void __iomem *)(unsigned long)(physaddr))
#define iounmap(addr)		((void)0)
#define ioremap_nocache(physaddr, size)	ioremap(physaddr, size)

#endif /* CONFIG_MMU */

/*
 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 * access
 */
#define xlate_dev_mem_ptr(p)	__va(p)

/*
 * Convert a virtual cached pointer to an uncached pointer
 */
#define xlate_dev_kmem_ptr(p)	p

/*
 * Big Endian
 */
#define out_be32(a, v) __raw_writel((v), (void __iomem __force *)(a))
#define out_be16(a, v) __raw_writew((v), (a))

#define in_be32(a) __raw_readl((const void __iomem __force *)(a))
#define in_be16(a) __raw_readw(a)

#define writel_be(v, a)	out_be32((__force unsigned *)a, v)
#define readl_be(a)	in_be32((__force unsigned *)a)

/*
 * Little endian
 */

#define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a))
#define out_le16(a, v) __raw_writew(__cpu_to_le16(v), (a))

#define in_le32(a) __le32_to_cpu(__raw_readl(a))
#define in_le16(a) __le16_to_cpu(__raw_readw(a))

/* Byte ops */
#define out_8(a, v) __raw_writeb((v), (a))
#define in_8(a) __raw_readb(a)

#define mmiowb()

#define ioport_map(port, nr)	((void __iomem *)(port))
#define ioport_unmap(addr)

/* from asm-generic/io.h */
#ifndef insb
static inline void insb(unsigned long addr, void *buffer, int count)
{
	if (count) {
		u8 *buf = buffer;
		do {
			u8 x = inb(addr);
			*buf++ = x;
		} while (--count);
	}
}
#endif

#ifndef insw
static inline void insw(unsigned long addr, void *buffer, int count)
{
	if (count) {
		u16 *buf = buffer;
		do {
			u16 x = inw(addr);
			*buf++ = x;
		} while (--count);
	}
}
#endif

#ifndef insl
static inline void insl(unsigned long addr, void *buffer, int count)
{
	if (count) {
		u32 *buf = buffer;
		do {
			u32 x = inl(addr);
			*buf++ = x;
		} while (--count);
	}
}
#endif

#ifndef outsb
static inline void outsb(unsigned long addr, const void *buffer, int count)
{
	if (count) {
		const u8 *buf = buffer;
		do {
			outb(*buf++, addr);
		} while (--count);
	}
}
#endif

#ifndef outsw
static inline void outsw(unsigned long addr, const void *buffer, int count)
{
	if (count) {
		const u16 *buf = buffer;
		do {
			outw(*buf++, addr);
		} while (--count);
	}
}
#endif

#ifndef outsl
static inline void outsl(unsigned long addr, const void *buffer, int count)
{
	if (count) {
		const u32 *buf = buffer;
		do {
			outl(*buf++, addr);
		} while (--count);
	}
}
#endif

#define ioread8_rep(p, dst, count) \
	insb((unsigned long) (p), (dst), (count))
#define ioread16_rep(p, dst, count) \
	insw((unsigned long) (p), (dst), (count))
#define ioread32_rep(p, dst, count) \
	insl((unsigned long) (p), (dst), (count))

#define iowrite8_rep(p, src, count) \
	outsb((unsigned long) (p), (src), (count))
#define iowrite16_rep(p, src, count) \
	outsw((unsigned long) (p), (src), (count))
#define iowrite32_rep(p, src, count) \
	outsl((unsigned long) (p), (src), (count))

#define readb_relaxed	readb
#define readw_relaxed	readw
#define readl_relaxed	readl

#define writeb_relaxed	writeb
#define writew_relaxed	writew
#define writel_relaxed	writel

#endif /* _ASM_MICROBLAZE_IO_H */
Commit	Line	Data
2c572c28	1	/*
dc95be1f MS	2	* Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
dc95be1f MS	3	* Copyright (C) 2007-2009 PetaLogix
2c572c28 MS	4	* Copyright (C) 2006 Atmark Techno, Inc.
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*/
	10
	11	#ifndef _ASM_MICROBLAZE_IO_H
	12	#define _ASM_MICROBLAZE_IO_H
	13
	14	#include <asm/byteorder.h>
	15	#include <asm/page.h>
	16	#include <linux/types.h>
dc95be1f	17	#include <linux/mm.h> /* Get struct page {...} */
2ddafeab	18	#include <asm-generic/iomap.h>
dc95be1f	19
a6475c13 MS	20	#ifndef CONFIG_PCI
	21	#define _IO_BASE 0
	22	#define _ISA_MEM_BASE 0
	23	#define PCI_DRAM_OFFSET 0
	24	#else
	25	#define _IO_BASE isa_io_base
	26	#define _ISA_MEM_BASE isa_mem_base
	27	#define PCI_DRAM_OFFSET pci_dram_offset
	28	#endif
	29
	30	extern unsigned long isa_io_base;
	31	extern unsigned long pci_io_base;
	32	extern unsigned long pci_dram_offset;
	33
	34	extern resource_size_t isa_mem_base;
2c572c28 MS	35
	36	#define IO_SPACE_LIMIT (0xFFFFFFFF)
	37
c74c8b1d JL	38	/* the following is needed to support PCI with some drivers */
	39
	40	#define mmiowb()
	41
2c572c28 MS	42	static inline unsigned char __raw_readb(const volatile void __iomem *addr)
	43	{
	44	return (volatile unsigned char __force )addr;
	45	}
	46	static inline unsigned short __raw_readw(const volatile void __iomem *addr)
	47	{
	48	return (volatile unsigned short __force )addr;
	49	}
	50	static inline unsigned int __raw_readl(const volatile void __iomem *addr)
	51	{
	52	return (volatile unsigned int __force )addr;
	53	}
	54	static inline unsigned long __raw_readq(const volatile void __iomem *addr)
	55	{
	56	return (volatile unsigned long __force )addr;
	57	}
	58	static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
	59	{
	60	(volatile unsigned char __force )addr = v;
	61	}
	62	static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
	63	{
	64	(volatile unsigned short __force )addr = v;
	65	}
	66	static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
	67	{
	68	(volatile unsigned int __force )addr = v;
	69	}
	70	static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
	71	{
	72	(volatile unsigned long __force )addr = v;
	73	}
	74
	75	/*
	76	* read (readb, readw, readl, readq) and write (writeb, writew,
25985edc	77	* writel, writeq) accessors are for PCI and thus little endian.
2c572c28 MS	78	* Linux 2.4 for Microblaze had this wrong.
	79	*/
	80	static inline unsigned char readb(const volatile void __iomem *addr)
	81	{
	82	return (volatile unsigned char __force )addr;
	83	}
	84	static inline unsigned short readw(const volatile void __iomem *addr)
	85	{
	86	return le16_to_cpu((volatile unsigned short __force )addr);
	87	}
	88	static inline unsigned int readl(const volatile void __iomem *addr)
	89	{
	90	return le32_to_cpu((volatile unsigned int __force )addr);
	91	}
4f3cbd79 MS	92	#define readq readq
	93	static inline u64 readq(const volatile void __iomem *addr)
	94	{
	95	return le64_to_cpu(__raw_readq(addr));
	96	}
2c572c28 MS	97	static inline void writeb(unsigned char v, volatile void __iomem *addr)
	98	{
	99	(volatile unsigned char __force )addr = v;
	100	}
	101	static inline void writew(unsigned short v, volatile void __iomem *addr)
	102	{
	103	(volatile unsigned short __force )addr = cpu_to_le16(v);
	104	}
	105	static inline void writel(unsigned int v, volatile void __iomem *addr)
	106	{
	107	(volatile unsigned int __force )addr = cpu_to_le32(v);
	108	}
4f3cbd79	109	#define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr)
2c572c28 MS	110
	111	/* ioread and iowrite variants. thease are for now same as __raw_
	112	* variants of accessors. we might check for endianess in the feature
	113	*/
	114	#define ioread8(addr) __raw_readb((u8 *)(addr))
	115	#define ioread16(addr) __raw_readw((u16 *)(addr))
	116	#define ioread32(addr) __raw_readl((u32 *)(addr))
	117	#define iowrite8(v, addr) __raw_writeb((u8)(v), (u8 *)(addr))
	118	#define iowrite16(v, addr) __raw_writew((u16)(v), (u16 *)(addr))
	119	#define iowrite32(v, addr) __raw_writel((u32)(v), (u32 *)(addr))
	120
7a325aa2 JL	121	#define ioread16be(addr) __raw_readw((u16 *)(addr))
	122	#define ioread32be(addr) __raw_readl((u32 *)(addr))
	123	#define iowrite16be(v, addr) __raw_writew((u16)(v), (u16 *)(addr))
	124	#define iowrite32be(v, addr) __raw_writel((u32)(v), (u32 *)(addr))
	125
2c572c28 MS	126	/* These are the definitions for the x86 IO instructions
	127	* inb/inw/inl/outb/outw/outl, the "string" versions
	128	* insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
	129	* inb_p/inw_p/...
	130	* The macros don't do byte-swapping.
	131	*/
b5dd0bb4	132	#define inb(port) readb((u8 *)((unsigned long)(port)))
2c572c28	133	#define outb(val, port) writeb((val), (u8 *)((unsigned long)(port)))
b5dd0bb4	134	#define inw(port) readw((u16 *)((unsigned long)(port)))
2c572c28	135	#define outw(val, port) writew((val), (u16 *)((unsigned long)(port)))
b5dd0bb4	136	#define inl(port) readl((u32 *)((unsigned long)(port)))
2c572c28 MS	137	#define outl(val, port) writel((val), (u32 *)((unsigned long)(port)))
	138
	139	#define inb_p(port) inb((port))
	140	#define outb_p(val, port) outb((val), (port))
	141	#define inw_p(port) inw((port))
	142	#define outw_p(val, port) outw((val), (port))
	143	#define inl_p(port) inl((port))
	144	#define outl_p(val, port) outl((val), (port))
	145
	146	#define memset_io(a, b, c) memset((void *)(a), (b), (c))
	147	#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
	148	#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
	149
dc95be1f MS	150	#ifdef CONFIG_MMU
dc95be1f MS	151
dc95be1f MS	152	#define phys_to_virt(addr) ((void *)__phys_to_virt(addr))
	153	#define virt_to_phys(addr) ((unsigned long)__virt_to_phys(addr))
	154	#define virt_to_bus(addr) ((unsigned long)__virt_to_phys(addr))
	155
dc95be1f MS	156	#define page_to_bus(page) (page_to_phys(page))
	157	#define bus_to_virt(addr) (phys_to_virt(addr))
	158
6bd55f0b	159	extern void iounmap(void __iomem *addr);
dc95be1f MS	160	/extern void __ioremap(phys_addr_t address, unsigned long size,
	161	unsigned long flags);*/
	162	extern void __iomem *ioremap(phys_addr_t address, unsigned long size);
	163	#define ioremap_writethrough(addr, size) ioremap((addr), (size))
	164	#define ioremap_nocache(addr, size) ioremap((addr), (size))
	165	#define ioremap_fullcache(addr, size) ioremap((addr), (size))
	166
	167	#else /* CONFIG_MMU */
	168
2c572c28 MS	169	/**
	170	* virt_to_phys - map virtual addresses to physical
	171	* @address: address to remap
	172	*
	173	* The returned physical address is the physical (CPU) mapping for
	174	* the memory address given. It is only valid to use this function on
	175	* addresses directly mapped or allocated via kmalloc.
	176	*
	177	* This function does not give bus mappings for DMA transfers. In
	178	* almost all conceivable cases a device driver should not be using
	179	* this function
	180	*/
	181	static inline unsigned long __iomem virt_to_phys(volatile void *address)
	182	{
	183	return __pa((unsigned long)address);
	184	}
	185
	186	#define virt_to_bus virt_to_phys
	187
	188	/**
	189	* phys_to_virt - map physical address to virtual
	190	* @address: address to remap
	191	*
	192	* The returned virtual address is a current CPU mapping for
	193	* the memory address given. It is only valid to use this function on
	194	* addresses that have a kernel mapping
	195	*
	196	* This function does not handle bus mappings for DMA transfers. In
	197	* almost all conceivable cases a device driver should not be using
	198	* this function
	199	*/
	200	static inline void *phys_to_virt(unsigned long address)
	201	{
	202	return (void *)__va(address);
	203	}
	204
	205	#define bus_to_virt(a) phys_to_virt(a)
	206
	207	static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
	208	unsigned long flags)
	209	{
	210	return (void *)address;
	211	}
	212
	213	#define ioremap(physaddr, size) ((void __iomem *)(unsigned long)(physaddr))
	214	#define iounmap(addr) ((void)0)
	215	#define ioremap_nocache(physaddr, size) ioremap(physaddr, size)
	216
dc95be1f MS	217	#endif /* CONFIG_MMU */
dc95be1f MS	218
2c572c28 MS	219	/*
	220	* Convert a physical pointer to a virtual kernel pointer for /dev/mem
	221	* access
	222	*/
	223	#define xlate_dev_mem_ptr(p) __va(p)
	224
	225	/*
	226	* Convert a virtual cached pointer to an uncached pointer
	227	*/
	228	#define xlate_dev_kmem_ptr(p) p
	229
	230	/*
	231	* Big Endian
	232	*/
	233	#define out_be32(a, v) __raw_writel((v), (void __iomem __force *)(a))
	234	#define out_be16(a, v) __raw_writew((v), (a))
	235
	236	#define in_be32(a) __raw_readl((const void __iomem __force *)(a))
	237	#define in_be16(a) __raw_readw(a)
	238
afc26cb3 JZ	239	#define writel_be(v, a) out_be32((__force unsigned *)a, v)
	240	#define readl_be(a) in_be32((__force unsigned *)a)
	241
2c572c28 MS	242	/*
	243	* Little endian
	244	*/
	245
83b4d17d	246	#define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a))
2c572c28 MS	247	#define out_le16(a, v) __raw_writew(__cpu_to_le16(v), (a))
	248
	249	#define in_le32(a) __le32_to_cpu(__raw_readl(a))
	250	#define in_le16(a) __le16_to_cpu(__raw_readw(a))
	251
	252	/* Byte ops */
	253	#define out_8(a, v) __raw_writeb((v), (a))
	254	#define in_8(a) __raw_readb(a)
	255
ac2e7c92 MS	256	#define mmiowb()
ac2e7c92 MS	257
2ddafeab MS	258	#define ioport_map(port, nr) ((void __iomem *)(port))
2ddafeab MS	259	#define ioport_unmap(addr)
2c572c28	260
9998517a MS	261	/* from asm-generic/io.h */
	262	#ifndef insb
	263	static inline void insb(unsigned long addr, void *buffer, int count)
	264	{
	265	if (count) {
	266	u8 *buf = buffer;
	267	do {
	268	u8 x = inb(addr);
	269	*buf++ = x;
	270	} while (--count);
	271	}
	272	}
	273	#endif
	274
	275	#ifndef insw
	276	static inline void insw(unsigned long addr, void *buffer, int count)
	277	{
	278	if (count) {
	279	u16 *buf = buffer;
	280	do {
	281	u16 x = inw(addr);
	282	*buf++ = x;
	283	} while (--count);
	284	}
	285	}
	286	#endif
	287
	288	#ifndef insl
	289	static inline void insl(unsigned long addr, void *buffer, int count)
	290	{
	291	if (count) {
	292	u32 *buf = buffer;
	293	do {
	294	u32 x = inl(addr);
	295	*buf++ = x;
	296	} while (--count);
	297	}
	298	}
	299	#endif
	300
	301	#ifndef outsb
	302	static inline void outsb(unsigned long addr, const void *buffer, int count)
	303	{
	304	if (count) {
	305	const u8 *buf = buffer;
	306	do {
	307	outb(*buf++, addr);
	308	} while (--count);
	309	}
	310	}
	311	#endif
	312
	313	#ifndef outsw
	314	static inline void outsw(unsigned long addr, const void *buffer, int count)
	315	{
	316	if (count) {
	317	const u16 *buf = buffer;
	318	do {
	319	outw(*buf++, addr);
	320	} while (--count);
	321	}
	322	}
	323	#endif
	324
325	#ifndef outsl
326	static inline void outsl(unsigned long addr, const void *buffer, int count)
327	{
328	if (count) {
329	const u32 *buf = buffer;
330	do {
331	outl(*buf++, addr);
332	} while (--count);
333	}
334	}
335	#endif
336
337	#define ioread8_rep(p, dst, count) \
338	insb((unsigned long) (p), (dst), (count))
339	#define ioread16_rep(p, dst, count) \
340	insw((unsigned long) (p), (dst), (count))
341	#define ioread32_rep(p, dst, count) \
342	insl((unsigned long) (p), (dst), (count))
343
344	#define iowrite8_rep(p, src, count) \
345	outsb((unsigned long) (p), (src), (count))
346	#define iowrite16_rep(p, src, count) \
347	outsw((unsigned long) (p), (src), (count))
348	#define iowrite32_rep(p, src, count) \
349	outsl((unsigned long) (p), (src), (count))
350
17578ea1 MS	351	#define readb_relaxed readb
	352	#define readw_relaxed readw
	353	#define readl_relaxed readl
	354
	355	#define writeb_relaxed writeb
	356	#define writew_relaxed writew
	357	#define writel_relaxed writel
	358
2c572c28	359	#endif /* _ASM_MICROBLAZE_IO_H */