Commit | Line | Data |
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ca54502b MS |
1 | /* |
2 | * Low-level system-call handling, trap handlers and context-switching | |
3 | * | |
4 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | |
5 | * Copyright (C) 2008-2009 PetaLogix | |
6 | * Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au> | |
7 | * Copyright (C) 2001,2002 NEC Corporation | |
8 | * Copyright (C) 2001,2002 Miles Bader <miles@gnu.org> | |
9 | * | |
10 | * This file is subject to the terms and conditions of the GNU General | |
11 | * Public License. See the file COPYING in the main directory of this | |
12 | * archive for more details. | |
13 | * | |
14 | * Written by Miles Bader <miles@gnu.org> | |
15 | * Heavily modified by John Williams for Microblaze | |
16 | */ | |
17 | ||
18 | #include <linux/sys.h> | |
19 | #include <linux/linkage.h> | |
20 | ||
21 | #include <asm/entry.h> | |
22 | #include <asm/current.h> | |
23 | #include <asm/processor.h> | |
24 | #include <asm/exceptions.h> | |
25 | #include <asm/asm-offsets.h> | |
26 | #include <asm/thread_info.h> | |
27 | ||
28 | #include <asm/page.h> | |
29 | #include <asm/unistd.h> | |
30 | ||
31 | #include <linux/errno.h> | |
32 | #include <asm/signal.h> | |
33 | ||
11d51360 MS |
34 | #undef DEBUG |
35 | ||
d8748e73 MS |
36 | #ifdef DEBUG |
37 | /* Create space for syscalls counting. */ | |
38 | .section .data | |
39 | .global syscall_debug_table | |
40 | .align 4 | |
41 | syscall_debug_table: | |
42 | .space (__NR_syscalls * 4) | |
43 | #endif /* DEBUG */ | |
44 | ||
ca54502b MS |
45 | #define C_ENTRY(name) .globl name; .align 4; name |
46 | ||
47 | /* | |
48 | * Various ways of setting and clearing BIP in flags reg. | |
49 | * This is mucky, but necessary using microblaze version that | |
50 | * allows msr ops to write to BIP | |
51 | */ | |
52 | #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR | |
53 | .macro clear_bip | |
66f7de86 | 54 | msrclr r0, MSR_BIP |
ca54502b MS |
55 | .endm |
56 | ||
57 | .macro set_bip | |
66f7de86 | 58 | msrset r0, MSR_BIP |
ca54502b MS |
59 | .endm |
60 | ||
61 | .macro clear_eip | |
66f7de86 | 62 | msrclr r0, MSR_EIP |
ca54502b MS |
63 | .endm |
64 | ||
65 | .macro set_ee | |
66f7de86 | 66 | msrset r0, MSR_EE |
ca54502b MS |
67 | .endm |
68 | ||
69 | .macro disable_irq | |
66f7de86 | 70 | msrclr r0, MSR_IE |
ca54502b MS |
71 | .endm |
72 | ||
73 | .macro enable_irq | |
66f7de86 | 74 | msrset r0, MSR_IE |
ca54502b MS |
75 | .endm |
76 | ||
77 | .macro set_ums | |
66f7de86 | 78 | msrset r0, MSR_UMS |
66f7de86 | 79 | msrclr r0, MSR_VMS |
ca54502b MS |
80 | .endm |
81 | ||
82 | .macro set_vms | |
66f7de86 | 83 | msrclr r0, MSR_UMS |
66f7de86 | 84 | msrset r0, MSR_VMS |
ca54502b MS |
85 | .endm |
86 | ||
b318067e | 87 | .macro clear_ums |
66f7de86 | 88 | msrclr r0, MSR_UMS |
b318067e MS |
89 | .endm |
90 | ||
ca54502b | 91 | .macro clear_vms_ums |
66f7de86 | 92 | msrclr r0, MSR_VMS | MSR_UMS |
ca54502b MS |
93 | .endm |
94 | #else | |
95 | .macro clear_bip | |
96 | mfs r11, rmsr | |
ca54502b MS |
97 | andi r11, r11, ~MSR_BIP |
98 | mts rmsr, r11 | |
ca54502b MS |
99 | .endm |
100 | ||
101 | .macro set_bip | |
102 | mfs r11, rmsr | |
ca54502b MS |
103 | ori r11, r11, MSR_BIP |
104 | mts rmsr, r11 | |
ca54502b MS |
105 | .endm |
106 | ||
107 | .macro clear_eip | |
108 | mfs r11, rmsr | |
ca54502b MS |
109 | andi r11, r11, ~MSR_EIP |
110 | mts rmsr, r11 | |
ca54502b MS |
111 | .endm |
112 | ||
113 | .macro set_ee | |
114 | mfs r11, rmsr | |
ca54502b MS |
115 | ori r11, r11, MSR_EE |
116 | mts rmsr, r11 | |
ca54502b MS |
117 | .endm |
118 | ||
119 | .macro disable_irq | |
120 | mfs r11, rmsr | |
ca54502b MS |
121 | andi r11, r11, ~MSR_IE |
122 | mts rmsr, r11 | |
ca54502b MS |
123 | .endm |
124 | ||
125 | .macro enable_irq | |
126 | mfs r11, rmsr | |
ca54502b MS |
127 | ori r11, r11, MSR_IE |
128 | mts rmsr, r11 | |
ca54502b MS |
129 | .endm |
130 | ||
131 | .macro set_ums | |
132 | mfs r11, rmsr | |
ca54502b MS |
133 | ori r11, r11, MSR_VMS |
134 | andni r11, r11, MSR_UMS | |
135 | mts rmsr, r11 | |
ca54502b MS |
136 | .endm |
137 | ||
138 | .macro set_vms | |
139 | mfs r11, rmsr | |
ca54502b MS |
140 | ori r11, r11, MSR_VMS |
141 | andni r11, r11, MSR_UMS | |
142 | mts rmsr, r11 | |
ca54502b MS |
143 | .endm |
144 | ||
b318067e MS |
145 | .macro clear_ums |
146 | mfs r11, rmsr | |
b318067e MS |
147 | andni r11, r11, MSR_UMS |
148 | mts rmsr,r11 | |
b318067e MS |
149 | .endm |
150 | ||
ca54502b MS |
151 | .macro clear_vms_ums |
152 | mfs r11, rmsr | |
ca54502b MS |
153 | andni r11, r11, (MSR_VMS|MSR_UMS) |
154 | mts rmsr,r11 | |
ca54502b MS |
155 | .endm |
156 | #endif | |
157 | ||
158 | /* Define how to call high-level functions. With MMU, virtual mode must be | |
159 | * enabled when calling the high-level function. Clobbers R11. | |
160 | * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL | |
161 | */ | |
162 | ||
163 | /* turn on virtual protected mode save */ | |
164 | #define VM_ON \ | |
a4a94dbf | 165 | set_ums; \ |
ca54502b | 166 | rted r0, 2f; \ |
a4a94dbf MS |
167 | nop; \ |
168 | 2: | |
ca54502b MS |
169 | |
170 | /* turn off virtual protected mode save and user mode save*/ | |
171 | #define VM_OFF \ | |
a4a94dbf | 172 | clear_vms_ums; \ |
ca54502b | 173 | rted r0, TOPHYS(1f); \ |
a4a94dbf MS |
174 | nop; \ |
175 | 1: | |
ca54502b MS |
176 | |
177 | #define SAVE_REGS \ | |
6e83557c MS |
178 | swi r2, r1, PT_R2; /* Save SDA */ \ |
179 | swi r3, r1, PT_R3; \ | |
180 | swi r4, r1, PT_R4; \ | |
181 | swi r5, r1, PT_R5; \ | |
182 | swi r6, r1, PT_R6; \ | |
183 | swi r7, r1, PT_R7; \ | |
184 | swi r8, r1, PT_R8; \ | |
185 | swi r9, r1, PT_R9; \ | |
186 | swi r10, r1, PT_R10; \ | |
187 | swi r11, r1, PT_R11; /* save clobbered regs after rval */\ | |
188 | swi r12, r1, PT_R12; \ | |
189 | swi r13, r1, PT_R13; /* Save SDA2 */ \ | |
190 | swi r14, r1, PT_PC; /* PC, before IRQ/trap */ \ | |
191 | swi r15, r1, PT_R15; /* Save LP */ \ | |
192 | swi r16, r1, PT_R16; \ | |
193 | swi r17, r1, PT_R17; \ | |
194 | swi r18, r1, PT_R18; /* Save asm scratch reg */ \ | |
195 | swi r19, r1, PT_R19; \ | |
196 | swi r20, r1, PT_R20; \ | |
197 | swi r21, r1, PT_R21; \ | |
198 | swi r22, r1, PT_R22; \ | |
199 | swi r23, r1, PT_R23; \ | |
200 | swi r24, r1, PT_R24; \ | |
201 | swi r25, r1, PT_R25; \ | |
202 | swi r26, r1, PT_R26; \ | |
203 | swi r27, r1, PT_R27; \ | |
204 | swi r28, r1, PT_R28; \ | |
205 | swi r29, r1, PT_R29; \ | |
206 | swi r30, r1, PT_R30; \ | |
207 | swi r31, r1, PT_R31; /* Save current task reg */ \ | |
ca54502b | 208 | mfs r11, rmsr; /* save MSR */ \ |
6e83557c | 209 | swi r11, r1, PT_MSR; |
ca54502b MS |
210 | |
211 | #define RESTORE_REGS \ | |
6e83557c | 212 | lwi r11, r1, PT_MSR; \ |
ca54502b | 213 | mts rmsr , r11; \ |
6e83557c MS |
214 | lwi r2, r1, PT_R2; /* restore SDA */ \ |
215 | lwi r3, r1, PT_R3; \ | |
216 | lwi r4, r1, PT_R4; \ | |
217 | lwi r5, r1, PT_R5; \ | |
218 | lwi r6, r1, PT_R6; \ | |
219 | lwi r7, r1, PT_R7; \ | |
220 | lwi r8, r1, PT_R8; \ | |
221 | lwi r9, r1, PT_R9; \ | |
222 | lwi r10, r1, PT_R10; \ | |
223 | lwi r11, r1, PT_R11; /* restore clobbered regs after rval */\ | |
224 | lwi r12, r1, PT_R12; \ | |
225 | lwi r13, r1, PT_R13; /* restore SDA2 */ \ | |
226 | lwi r14, r1, PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\ | |
227 | lwi r15, r1, PT_R15; /* restore LP */ \ | |
228 | lwi r16, r1, PT_R16; \ | |
229 | lwi r17, r1, PT_R17; \ | |
230 | lwi r18, r1, PT_R18; /* restore asm scratch reg */ \ | |
231 | lwi r19, r1, PT_R19; \ | |
232 | lwi r20, r1, PT_R20; \ | |
233 | lwi r21, r1, PT_R21; \ | |
234 | lwi r22, r1, PT_R22; \ | |
235 | lwi r23, r1, PT_R23; \ | |
236 | lwi r24, r1, PT_R24; \ | |
237 | lwi r25, r1, PT_R25; \ | |
238 | lwi r26, r1, PT_R26; \ | |
239 | lwi r27, r1, PT_R27; \ | |
240 | lwi r28, r1, PT_R28; \ | |
241 | lwi r29, r1, PT_R29; \ | |
242 | lwi r30, r1, PT_R30; \ | |
243 | lwi r31, r1, PT_R31; /* Restore cur task reg */ | |
ca54502b | 244 | |
e5d2af2b MS |
245 | #define SAVE_STATE \ |
246 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */ \ | |
247 | /* See if already in kernel mode.*/ \ | |
248 | mfs r1, rmsr; \ | |
e5d2af2b MS |
249 | andi r1, r1, MSR_UMS; \ |
250 | bnei r1, 1f; \ | |
251 | /* Kernel-mode state save. */ \ | |
252 | /* Reload kernel stack-ptr. */ \ | |
253 | lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ | |
287503fa MS |
254 | /* FIXME: I can add these two lines to one */ \ |
255 | /* tophys(r1,r1); */ \ | |
6e83557c MS |
256 | /* addik r1, r1, -PT_SIZE; */ \ |
257 | addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \ | |
e5d2af2b | 258 | SAVE_REGS \ |
e5d2af2b | 259 | brid 2f; \ |
6e83557c | 260 | swi r1, r1, PT_MODE; \ |
e5d2af2b MS |
261 | 1: /* User-mode state save. */ \ |
262 | lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\ | |
263 | tophys(r1,r1); \ | |
264 | lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ \ | |
287503fa MS |
265 | /* MS these three instructions can be added to one */ \ |
266 | /* addik r1, r1, THREAD_SIZE; */ \ | |
267 | /* tophys(r1,r1); */ \ | |
6e83557c MS |
268 | /* addik r1, r1, -PT_SIZE; */ \ |
269 | addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \ | |
e5d2af2b | 270 | SAVE_REGS \ |
e5d2af2b | 271 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ |
6e83557c MS |
272 | swi r11, r1, PT_R1; /* Store user SP. */ \ |
273 | swi r0, r1, PT_MODE; /* Was in user-mode. */ \ | |
e5d2af2b MS |
274 | /* MS: I am clearing UMS even in case when I come from kernel space */ \ |
275 | clear_ums; \ | |
276 | 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); | |
277 | ||
ca54502b MS |
278 | .text |
279 | ||
280 | /* | |
281 | * User trap. | |
282 | * | |
283 | * System calls are handled here. | |
284 | * | |
285 | * Syscall protocol: | |
286 | * Syscall number in r12, args in r5-r10 | |
287 | * Return value in r3 | |
288 | * | |
289 | * Trap entered via brki instruction, so BIP bit is set, and interrupts | |
290 | * are masked. This is nice, means we don't have to CLI before state save | |
291 | */ | |
292 | C_ENTRY(_user_exception): | |
0e41c909 | 293 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */ |
9da63458 MS |
294 | addi r14, r14, 4 /* return address is 4 byte after call */ |
295 | ||
ca54502b MS |
296 | lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ |
297 | tophys(r1,r1); | |
298 | lwi r1, r1, TS_THREAD_INFO; /* get stack from task_struct */ | |
9da63458 MS |
299 | /* calculate kernel stack pointer from task struct 8k */ |
300 | addik r1, r1, THREAD_SIZE; | |
301 | tophys(r1,r1); | |
302 | ||
6e83557c | 303 | addik r1, r1, -PT_SIZE; /* Make room on the stack. */ |
ca54502b | 304 | SAVE_REGS |
6e83557c MS |
305 | swi r0, r1, PT_R3 |
306 | swi r0, r1, PT_R4 | |
ca54502b | 307 | |
6e83557c | 308 | swi r0, r1, PT_MODE; /* Was in user-mode. */ |
ca54502b | 309 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); |
6e83557c | 310 | swi r11, r1, PT_R1; /* Store user SP. */ |
25f6e596 | 311 | clear_ums; |
9da63458 | 312 | 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); |
ca54502b | 313 | /* Save away the syscall number. */ |
6e83557c | 314 | swi r12, r1, PT_R0; |
ca54502b MS |
315 | tovirt(r1,r1) |
316 | ||
ca54502b MS |
317 | /* where the trap should return need -8 to adjust for rtsd r15, 8*/ |
318 | /* Jump to the appropriate function for the system call number in r12 | |
319 | * (r12 is not preserved), or return an error if r12 is not valid. The LP | |
320 | * register should point to the location where | |
321 | * the called function should return. [note that MAKE_SYS_CALL uses label 1] */ | |
23575483 | 322 | |
25f6e596 MS |
323 | /* Step into virtual mode */ |
324 | rtbd r0, 3f | |
23575483 MS |
325 | nop |
326 | 3: | |
b1d70c62 | 327 | lwi r11, CURRENT_TASK, TS_THREAD_INFO /* get thread info */ |
23575483 MS |
328 | lwi r11, r11, TI_FLAGS /* get flags in thread info */ |
329 | andi r11, r11, _TIF_WORK_SYSCALL_MASK | |
330 | beqi r11, 4f | |
331 | ||
332 | addik r3, r0, -ENOSYS | |
6e83557c | 333 | swi r3, r1, PT_R3 |
23575483 | 334 | brlid r15, do_syscall_trace_enter |
6e83557c | 335 | addik r5, r1, PT_R0 |
23575483 MS |
336 | |
337 | # do_syscall_trace_enter returns the new syscall nr. | |
338 | addk r12, r0, r3 | |
6e83557c MS |
339 | lwi r5, r1, PT_R5; |
340 | lwi r6, r1, PT_R6; | |
341 | lwi r7, r1, PT_R7; | |
342 | lwi r8, r1, PT_R8; | |
343 | lwi r9, r1, PT_R9; | |
344 | lwi r10, r1, PT_R10; | |
23575483 MS |
345 | 4: |
346 | /* Jump to the appropriate function for the system call number in r12 | |
347 | * (r12 is not preserved), or return an error if r12 is not valid. | |
348 | * The LP register should point to the location where the called function | |
349 | * should return. [note that MAKE_SYS_CALL uses label 1] */ | |
350 | /* See if the system call number is valid */ | |
ca54502b | 351 | addi r11, r12, -__NR_syscalls; |
23575483 | 352 | bgei r11,5f; |
ca54502b MS |
353 | /* Figure out which function to use for this system call. */ |
354 | /* Note Microblaze barrel shift is optional, so don't rely on it */ | |
355 | add r12, r12, r12; /* convert num -> ptr */ | |
356 | add r12, r12, r12; | |
357 | ||
11d51360 | 358 | #ifdef DEBUG |
d8748e73 MS |
359 | /* Trac syscalls and stored them to syscall_debug_table */ |
360 | /* The first syscall location stores total syscall number */ | |
361 | lwi r3, r0, syscall_debug_table | |
362 | addi r3, r3, 1 | |
363 | swi r3, r0, syscall_debug_table | |
364 | lwi r3, r12, syscall_debug_table | |
ca54502b | 365 | addi r3, r3, 1 |
d8748e73 | 366 | swi r3, r12, syscall_debug_table |
11d51360 | 367 | #endif |
23575483 MS |
368 | |
369 | # Find and jump into the syscall handler. | |
370 | lwi r12, r12, sys_call_table | |
371 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ | |
b9ea77e2 | 372 | addi r15, r0, ret_from_trap-8 |
23575483 | 373 | bra r12 |
ca54502b | 374 | |
ca54502b | 375 | /* The syscall number is invalid, return an error. */ |
23575483 | 376 | 5: |
9814cc11 | 377 | rtsd r15, 8; /* looks like a normal subroutine return */ |
ca54502b | 378 | addi r3, r0, -ENOSYS; |
ca54502b | 379 | |
23575483 | 380 | /* Entry point used to return from a syscall/trap */ |
ca54502b MS |
381 | /* We re-enable BIP bit before state restore */ |
382 | C_ENTRY(ret_from_trap): | |
6e83557c MS |
383 | swi r3, r1, PT_R3 |
384 | swi r4, r1, PT_R4 | |
b1d70c62 | 385 | |
6e83557c | 386 | lwi r11, r1, PT_MODE; |
9da63458 MS |
387 | /* See if returning to kernel mode, if so, skip resched &c. */ |
388 | bnei r11, 2f; | |
23575483 MS |
389 | /* We're returning to user mode, so check for various conditions that |
390 | * trigger rescheduling. */ | |
b1d70c62 MS |
391 | /* FIXME: Restructure all these flag checks. */ |
392 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ | |
23575483 MS |
393 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
394 | andi r11, r11, _TIF_WORK_SYSCALL_MASK | |
395 | beqi r11, 1f | |
396 | ||
23575483 | 397 | brlid r15, do_syscall_trace_leave |
6e83557c | 398 | addik r5, r1, PT_R0 |
23575483 | 399 | 1: |
ca54502b MS |
400 | /* We're returning to user mode, so check for various conditions that |
401 | * trigger rescheduling. */ | |
b1d70c62 MS |
402 | /* get thread info from current task */ |
403 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; | |
ca54502b MS |
404 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
405 | andi r11, r11, _TIF_NEED_RESCHED; | |
406 | beqi r11, 5f; | |
407 | ||
ca54502b MS |
408 | bralid r15, schedule; /* Call scheduler */ |
409 | nop; /* delay slot */ | |
ca54502b MS |
410 | |
411 | /* Maybe handle a signal */ | |
b1d70c62 MS |
412 | 5: /* get thread info from current task*/ |
413 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; | |
ca54502b | 414 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
969a9616 | 415 | andi r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; |
ca54502b MS |
416 | beqi r11, 1f; /* Signals to handle, handle them */ |
417 | ||
6e83557c | 418 | addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */ |
969a9616 | 419 | bralid r15, do_notify_resume; /* Handle any signals */ |
83140191 | 420 | addi r6, r0, 1; /* Arg 2: int in_syscall */ |
b1d70c62 MS |
421 | |
422 | /* Finally, return to user state. */ | |
96014cc3 | 423 | 1: set_bip; /* Ints masked for state restore */ |
8633bebc | 424 | swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ |
ca54502b MS |
425 | VM_OFF; |
426 | tophys(r1,r1); | |
427 | RESTORE_REGS; | |
6e83557c | 428 | addik r1, r1, PT_SIZE /* Clean up stack space. */ |
ca54502b | 429 | lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */ |
9da63458 MS |
430 | bri 6f; |
431 | ||
432 | /* Return to kernel state. */ | |
433 | 2: set_bip; /* Ints masked for state restore */ | |
434 | VM_OFF; | |
435 | tophys(r1,r1); | |
436 | RESTORE_REGS; | |
6e83557c | 437 | addik r1, r1, PT_SIZE /* Clean up stack space. */ |
9da63458 MS |
438 | tovirt(r1,r1); |
439 | 6: | |
ca54502b MS |
440 | TRAP_return: /* Make global symbol for debugging */ |
441 | rtbd r14, 0; /* Instructions to return from an IRQ */ | |
442 | nop; | |
443 | ||
444 | ||
ca54502b MS |
445 | /* This the initial entry point for a new child thread, with an appropriate |
446 | stack in place that makes it look the the child is in the middle of an | |
447 | syscall. This function is actually `returned to' from switch_thread | |
448 | (copy_thread makes ret_from_fork the return address in each new thread's | |
449 | saved context). */ | |
450 | C_ENTRY(ret_from_fork): | |
451 | bralid r15, schedule_tail; /* ...which is schedule_tail's arg */ | |
fd11ff73 | 452 | add r5, r3, r0; /* switch_thread returns the prev task */ |
ca54502b | 453 | /* ( in the delay slot ) */ |
ca54502b | 454 | brid ret_from_trap; /* Do normal trap return */ |
9814cc11 | 455 | add r3, r0, r0; /* Child's fork call should return 0. */ |
ca54502b | 456 | |
2319295d AV |
457 | C_ENTRY(ret_from_kernel_thread): |
458 | bralid r15, schedule_tail; /* ...which is schedule_tail's arg */ | |
459 | add r5, r3, r0; /* switch_thread returns the prev task */ | |
460 | /* ( in the delay slot ) */ | |
461 | brald r15, r20 /* fn was left in r20 */ | |
462 | addk r5, r0, r19 /* ... and argument - in r19 */ | |
99c59f60 AV |
463 | brid ret_from_trap |
464 | add r3, r0, r0 | |
2319295d | 465 | |
ca54502b | 466 | C_ENTRY(sys_rt_sigreturn_wrapper): |
791d0a16 | 467 | brid sys_rt_sigreturn /* Do real work */ |
6e83557c | 468 | addik r5, r1, 0; /* add user context as 1st arg */ |
ca54502b MS |
469 | |
470 | /* | |
471 | * HW EXCEPTION rutine start | |
472 | */ | |
ca54502b | 473 | C_ENTRY(full_exception_trap): |
ca54502b MS |
474 | /* adjust exception address for privileged instruction |
475 | * for finding where is it */ | |
476 | addik r17, r17, -4 | |
477 | SAVE_STATE /* Save registers */ | |
06a54604 | 478 | /* PC, before IRQ/trap - this is one instruction above */ |
6e83557c | 479 | swi r17, r1, PT_PC; |
06a54604 | 480 | tovirt(r1,r1) |
ca54502b MS |
481 | /* FIXME this can be store directly in PT_ESR reg. |
482 | * I tested it but there is a fault */ | |
483 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ | |
b9ea77e2 | 484 | addik r15, r0, ret_from_exc - 8 |
ca54502b | 485 | mfs r6, resr |
ca54502b | 486 | mfs r7, rfsr; /* save FSR */ |
131e4e97 | 487 | mts rfsr, r0; /* Clear sticky fsr */ |
c318d483 | 488 | rted r0, full_exception |
6e83557c | 489 | addik r5, r1, 0 /* parameter struct pt_regs * regs */ |
ca54502b MS |
490 | |
491 | /* | |
492 | * Unaligned data trap. | |
493 | * | |
494 | * Unaligned data trap last on 4k page is handled here. | |
495 | * | |
496 | * Trap entered via exception, so EE bit is set, and interrupts | |
497 | * are masked. This is nice, means we don't have to CLI before state save | |
498 | * | |
499 | * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S" | |
500 | */ | |
501 | C_ENTRY(unaligned_data_trap): | |
8b110d15 MS |
502 | /* MS: I have to save r11 value and then restore it because |
503 | * set_bit, clear_eip, set_ee use r11 as temp register if MSR | |
504 | * instructions are not used. We don't need to do if MSR instructions | |
505 | * are used and they use r0 instead of r11. | |
506 | * I am using ENTRY_SP which should be primary used only for stack | |
507 | * pointer saving. */ | |
508 | swi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); | |
509 | set_bip; /* equalize initial state for all possible entries */ | |
510 | clear_eip; | |
511 | set_ee; | |
512 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); | |
ca54502b | 513 | SAVE_STATE /* Save registers.*/ |
06a54604 | 514 | /* PC, before IRQ/trap - this is one instruction above */ |
6e83557c | 515 | swi r17, r1, PT_PC; |
06a54604 | 516 | tovirt(r1,r1) |
ca54502b | 517 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ |
b9ea77e2 | 518 | addik r15, r0, ret_from_exc-8 |
ca54502b | 519 | mfs r3, resr /* ESR */ |
ca54502b | 520 | mfs r4, rear /* EAR */ |
c318d483 | 521 | rtbd r0, _unaligned_data_exception |
6e83557c | 522 | addik r7, r1, 0 /* parameter struct pt_regs * regs */ |
ca54502b MS |
523 | |
524 | /* | |
525 | * Page fault traps. | |
526 | * | |
527 | * If the real exception handler (from hw_exception_handler.S) didn't find | |
528 | * the mapping for the process, then we're thrown here to handle such situation. | |
529 | * | |
530 | * Trap entered via exceptions, so EE bit is set, and interrupts | |
531 | * are masked. This is nice, means we don't have to CLI before state save | |
532 | * | |
533 | * Build a standard exception frame for TLB Access errors. All TLB exceptions | |
534 | * will bail out to this point if they can't resolve the lightweight TLB fault. | |
535 | * | |
536 | * The C function called is in "arch/microblaze/mm/fault.c", declared as: | |
537 | * void do_page_fault(struct pt_regs *regs, | |
538 | * unsigned long address, | |
539 | * unsigned long error_code) | |
540 | */ | |
541 | /* data and intruction trap - which is choose is resolved int fault.c */ | |
542 | C_ENTRY(page_fault_data_trap): | |
ca54502b | 543 | SAVE_STATE /* Save registers.*/ |
06a54604 | 544 | /* PC, before IRQ/trap - this is one instruction above */ |
6e83557c | 545 | swi r17, r1, PT_PC; |
06a54604 | 546 | tovirt(r1,r1) |
ca54502b | 547 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ |
b9ea77e2 | 548 | addik r15, r0, ret_from_exc-8 |
ca54502b | 549 | mfs r6, rear /* parameter unsigned long address */ |
ca54502b | 550 | mfs r7, resr /* parameter unsigned long error_code */ |
c318d483 | 551 | rted r0, do_page_fault |
6e83557c | 552 | addik r5, r1, 0 /* parameter struct pt_regs * regs */ |
ca54502b MS |
553 | |
554 | C_ENTRY(page_fault_instr_trap): | |
ca54502b | 555 | SAVE_STATE /* Save registers.*/ |
06a54604 | 556 | /* PC, before IRQ/trap - this is one instruction above */ |
6e83557c | 557 | swi r17, r1, PT_PC; |
06a54604 | 558 | tovirt(r1,r1) |
ca54502b | 559 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ |
b9ea77e2 | 560 | addik r15, r0, ret_from_exc-8 |
ca54502b | 561 | mfs r6, rear /* parameter unsigned long address */ |
ca54502b | 562 | ori r7, r0, 0 /* parameter unsigned long error_code */ |
9814cc11 | 563 | rted r0, do_page_fault |
6e83557c | 564 | addik r5, r1, 0 /* parameter struct pt_regs * regs */ |
ca54502b MS |
565 | |
566 | /* Entry point used to return from an exception. */ | |
567 | C_ENTRY(ret_from_exc): | |
6e83557c | 568 | lwi r11, r1, PT_MODE; |
ca54502b MS |
569 | bnei r11, 2f; /* See if returning to kernel mode, */ |
570 | /* ... if so, skip resched &c. */ | |
571 | ||
572 | /* We're returning to user mode, so check for various conditions that | |
573 | trigger rescheduling. */ | |
b1d70c62 | 574 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
ca54502b MS |
575 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
576 | andi r11, r11, _TIF_NEED_RESCHED; | |
577 | beqi r11, 5f; | |
578 | ||
579 | /* Call the scheduler before returning from a syscall/trap. */ | |
580 | bralid r15, schedule; /* Call scheduler */ | |
581 | nop; /* delay slot */ | |
582 | ||
583 | /* Maybe handle a signal */ | |
b1d70c62 | 584 | 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
ca54502b | 585 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
969a9616 | 586 | andi r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; |
ca54502b MS |
587 | beqi r11, 1f; /* Signals to handle, handle them */ |
588 | ||
589 | /* | |
590 | * Handle a signal return; Pending signals should be in r18. | |
591 | * | |
592 | * Not all registers are saved by the normal trap/interrupt entry | |
593 | * points (for instance, call-saved registers (because the normal | |
594 | * C-compiler calling sequence in the kernel makes sure they're | |
595 | * preserved), and call-clobbered registers in the case of | |
596 | * traps), but signal handlers may want to examine or change the | |
597 | * complete register state. Here we save anything not saved by | |
598 | * the normal entry sequence, so that it may be safely restored | |
969a9616 | 599 | * (in a possibly modified form) after do_notify_resume returns. */ |
6e83557c | 600 | addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */ |
969a9616 | 601 | bralid r15, do_notify_resume; /* Handle any signals */ |
83140191 | 602 | addi r6, r0, 0; /* Arg 2: int in_syscall */ |
ca54502b MS |
603 | |
604 | /* Finally, return to user state. */ | |
96014cc3 | 605 | 1: set_bip; /* Ints masked for state restore */ |
8633bebc | 606 | swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ |
ca54502b MS |
607 | VM_OFF; |
608 | tophys(r1,r1); | |
609 | ||
ca54502b | 610 | RESTORE_REGS; |
6e83557c | 611 | addik r1, r1, PT_SIZE /* Clean up stack space. */ |
ca54502b MS |
612 | |
613 | lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */ | |
614 | bri 6f; | |
615 | /* Return to kernel state. */ | |
96014cc3 MS |
616 | 2: set_bip; /* Ints masked for state restore */ |
617 | VM_OFF; | |
ca54502b | 618 | tophys(r1,r1); |
ca54502b | 619 | RESTORE_REGS; |
6e83557c | 620 | addik r1, r1, PT_SIZE /* Clean up stack space. */ |
ca54502b MS |
621 | |
622 | tovirt(r1,r1); | |
623 | 6: | |
624 | EXC_return: /* Make global symbol for debugging */ | |
625 | rtbd r14, 0; /* Instructions to return from an IRQ */ | |
626 | nop; | |
627 | ||
628 | /* | |
629 | * HW EXCEPTION rutine end | |
630 | */ | |
631 | ||
632 | /* | |
633 | * Hardware maskable interrupts. | |
634 | * | |
635 | * The stack-pointer (r1) should have already been saved to the memory | |
636 | * location PER_CPU(ENTRY_SP). | |
637 | */ | |
638 | C_ENTRY(_interrupt): | |
639 | /* MS: we are in physical address */ | |
640 | /* Save registers, switch to proper stack, convert SP to virtual.*/ | |
641 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) | |
ca54502b | 642 | /* MS: See if already in kernel mode. */ |
653e447e | 643 | mfs r1, rmsr |
5c0d72b1 | 644 | nop |
653e447e MS |
645 | andi r1, r1, MSR_UMS |
646 | bnei r1, 1f | |
ca54502b MS |
647 | |
648 | /* Kernel-mode state save. */ | |
653e447e MS |
649 | lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) |
650 | tophys(r1,r1); /* MS: I have in r1 physical address where stack is */ | |
ca54502b MS |
651 | /* save registers */ |
652 | /* MS: Make room on the stack -> activation record */ | |
6e83557c | 653 | addik r1, r1, -PT_SIZE; |
ca54502b | 654 | SAVE_REGS |
ca54502b | 655 | brid 2f; |
6e83557c | 656 | swi r1, r1, PT_MODE; /* 0 - user mode, 1 - kernel mode */ |
ca54502b MS |
657 | 1: |
658 | /* User-mode state save. */ | |
ca54502b MS |
659 | /* MS: get the saved current */ |
660 | lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); | |
661 | tophys(r1,r1); | |
662 | lwi r1, r1, TS_THREAD_INFO; | |
663 | addik r1, r1, THREAD_SIZE; | |
664 | tophys(r1,r1); | |
665 | /* save registers */ | |
6e83557c | 666 | addik r1, r1, -PT_SIZE; |
ca54502b MS |
667 | SAVE_REGS |
668 | /* calculate mode */ | |
6e83557c | 669 | swi r0, r1, PT_MODE; |
ca54502b | 670 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); |
6e83557c | 671 | swi r11, r1, PT_R1; |
80c5ff6b | 672 | clear_ums; |
ca54502b | 673 | 2: |
b1d70c62 | 674 | lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); |
ca54502b | 675 | tovirt(r1,r1) |
b9ea77e2 | 676 | addik r15, r0, irq_call; |
80c5ff6b | 677 | irq_call:rtbd r0, do_IRQ; |
6e83557c | 678 | addik r5, r1, 0; |
ca54502b MS |
679 | |
680 | /* MS: we are in virtual mode */ | |
681 | ret_from_irq: | |
6e83557c | 682 | lwi r11, r1, PT_MODE; |
ca54502b MS |
683 | bnei r11, 2f; |
684 | ||
b1d70c62 | 685 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; |
ca54502b MS |
686 | lwi r11, r11, TI_FLAGS; /* MS: get flags from thread info */ |
687 | andi r11, r11, _TIF_NEED_RESCHED; | |
688 | beqi r11, 5f | |
689 | bralid r15, schedule; | |
690 | nop; /* delay slot */ | |
691 | ||
692 | /* Maybe handle a signal */ | |
b1d70c62 | 693 | 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* MS: get thread info */ |
ca54502b | 694 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
969a9616 | 695 | andi r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; |
ca54502b MS |
696 | beqid r11, no_intr_resched |
697 | /* Handle a signal return; Pending signals should be in r18. */ | |
6e83557c | 698 | addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */ |
969a9616 | 699 | bralid r15, do_notify_resume; /* Handle any signals */ |
83140191 | 700 | addi r6, r0, 0; /* Arg 2: int in_syscall */ |
ca54502b MS |
701 | |
702 | /* Finally, return to user state. */ | |
703 | no_intr_resched: | |
704 | /* Disable interrupts, we are now committed to the state restore */ | |
705 | disable_irq | |
8633bebc | 706 | swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); |
ca54502b MS |
707 | VM_OFF; |
708 | tophys(r1,r1); | |
ca54502b | 709 | RESTORE_REGS |
6e83557c | 710 | addik r1, r1, PT_SIZE /* MS: Clean up stack space. */ |
ca54502b MS |
711 | lwi r1, r1, PT_R1 - PT_SIZE; |
712 | bri 6f; | |
713 | /* MS: Return to kernel state. */ | |
77753790 MS |
714 | 2: |
715 | #ifdef CONFIG_PREEMPT | |
b1d70c62 | 716 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; |
77753790 MS |
717 | /* MS: get preempt_count from thread info */ |
718 | lwi r5, r11, TI_PREEMPT_COUNT; | |
719 | bgti r5, restore; | |
720 | ||
721 | lwi r5, r11, TI_FLAGS; /* get flags in thread info */ | |
722 | andi r5, r5, _TIF_NEED_RESCHED; | |
723 | beqi r5, restore /* if zero jump over */ | |
724 | ||
725 | preempt: | |
726 | /* interrupts are off that's why I am calling preempt_chedule_irq */ | |
727 | bralid r15, preempt_schedule_irq | |
728 | nop | |
b1d70c62 | 729 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
77753790 MS |
730 | lwi r5, r11, TI_FLAGS; /* get flags in thread info */ |
731 | andi r5, r5, _TIF_NEED_RESCHED; | |
732 | bnei r5, preempt /* if non zero jump to resched */ | |
733 | restore: | |
734 | #endif | |
735 | VM_OFF /* MS: turn off MMU */ | |
ca54502b | 736 | tophys(r1,r1) |
ca54502b | 737 | RESTORE_REGS |
6e83557c | 738 | addik r1, r1, PT_SIZE /* MS: Clean up stack space. */ |
ca54502b MS |
739 | tovirt(r1,r1); |
740 | 6: | |
741 | IRQ_return: /* MS: Make global symbol for debugging */ | |
742 | rtid r14, 0 | |
743 | nop | |
744 | ||
745 | /* | |
2d5973cb MS |
746 | * Debug trap for KGDB. Enter to _debug_exception by brki r16, 0x18 |
747 | * and call handling function with saved pt_regs | |
ca54502b MS |
748 | */ |
749 | C_ENTRY(_debug_exception): | |
750 | /* BIP bit is set on entry, no interrupts can occur */ | |
751 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) | |
752 | ||
653e447e | 753 | mfs r1, rmsr |
5c0d72b1 | 754 | nop |
653e447e MS |
755 | andi r1, r1, MSR_UMS |
756 | bnei r1, 1f | |
2d5973cb | 757 | /* MS: Kernel-mode state save - kgdb */ |
653e447e | 758 | lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/ |
ca54502b | 759 | |
2d5973cb | 760 | /* BIP bit is set on entry, no interrupts can occur */ |
6e83557c | 761 | addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; |
ca54502b | 762 | SAVE_REGS; |
2d5973cb | 763 | /* save all regs to pt_reg structure */ |
6e83557c MS |
764 | swi r0, r1, PT_R0; /* R0 must be saved too */ |
765 | swi r14, r1, PT_R14 /* rewrite saved R14 value */ | |
766 | swi r16, r1, PT_PC; /* PC and r16 are the same */ | |
2d5973cb MS |
767 | /* save special purpose registers to pt_regs */ |
768 | mfs r11, rear; | |
6e83557c | 769 | swi r11, r1, PT_EAR; |
2d5973cb | 770 | mfs r11, resr; |
6e83557c | 771 | swi r11, r1, PT_ESR; |
2d5973cb | 772 | mfs r11, rfsr; |
6e83557c | 773 | swi r11, r1, PT_FSR; |
2d5973cb MS |
774 | |
775 | /* stack pointer is in physical address at it is decrease | |
6e83557c MS |
776 | * by PT_SIZE but we need to get correct R1 value */ |
777 | addik r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + PT_SIZE; | |
778 | swi r11, r1, PT_R1 | |
2d5973cb MS |
779 | /* MS: r31 - current pointer isn't changed */ |
780 | tovirt(r1,r1) | |
781 | #ifdef CONFIG_KGDB | |
6e83557c | 782 | addi r5, r1, 0 /* pass pt_reg address as the first arg */ |
cd341577 | 783 | addik r15, r0, dbtrap_call; /* return address */ |
2d5973cb MS |
784 | rtbd r0, microblaze_kgdb_break |
785 | nop; | |
786 | #endif | |
787 | /* MS: Place handler for brki from kernel space if KGDB is OFF. | |
788 | * It is very unlikely that another brki instruction is called. */ | |
789 | bri 0 | |
ca54502b | 790 | |
2d5973cb MS |
791 | /* MS: User-mode state save - gdb */ |
792 | 1: lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ | |
ca54502b MS |
793 | tophys(r1,r1); |
794 | lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ | |
795 | addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */ | |
796 | tophys(r1,r1); | |
797 | ||
6e83557c | 798 | addik r1, r1, -PT_SIZE; /* Make room on the stack. */ |
ca54502b | 799 | SAVE_REGS; |
6e83557c MS |
800 | swi r16, r1, PT_PC; /* Save LP */ |
801 | swi r0, r1, PT_MODE; /* Was in user-mode. */ | |
ca54502b | 802 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); |
6e83557c | 803 | swi r11, r1, PT_R1; /* Store user SP. */ |
2d5973cb | 804 | lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); |
ca54502b | 805 | tovirt(r1,r1) |
06b28640 | 806 | set_vms; |
6e83557c | 807 | addik r5, r1, 0; |
b9ea77e2 | 808 | addik r15, r0, dbtrap_call; |
2d5973cb | 809 | dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */ |
751f1605 MS |
810 | rtbd r0, sw_exception |
811 | nop | |
ca54502b | 812 | |
2d5973cb MS |
813 | /* MS: The first instruction for the second part of the gdb/kgdb */ |
814 | set_bip; /* Ints masked for state restore */ | |
6e83557c | 815 | lwi r11, r1, PT_MODE; |
ca54502b | 816 | bnei r11, 2f; |
2d5973cb | 817 | /* MS: Return to user space - gdb */ |
ca54502b | 818 | /* Get current task ptr into r11 */ |
b1d70c62 | 819 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
ca54502b MS |
820 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
821 | andi r11, r11, _TIF_NEED_RESCHED; | |
822 | beqi r11, 5f; | |
823 | ||
2d5973cb | 824 | /* Call the scheduler before returning from a syscall/trap. */ |
ca54502b MS |
825 | bralid r15, schedule; /* Call scheduler */ |
826 | nop; /* delay slot */ | |
ca54502b MS |
827 | |
828 | /* Maybe handle a signal */ | |
b1d70c62 | 829 | 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
ca54502b | 830 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
969a9616 | 831 | andi r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; |
ca54502b MS |
832 | beqi r11, 1f; /* Signals to handle, handle them */ |
833 | ||
6e83557c | 834 | addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */ |
969a9616 | 835 | bralid r15, do_notify_resume; /* Handle any signals */ |
83140191 | 836 | addi r6, r0, 0; /* Arg 2: int in_syscall */ |
ca54502b | 837 | |
ca54502b | 838 | /* Finally, return to user state. */ |
2d5973cb | 839 | 1: swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ |
ca54502b MS |
840 | VM_OFF; |
841 | tophys(r1,r1); | |
2d5973cb | 842 | /* MS: Restore all regs */ |
ca54502b | 843 | RESTORE_REGS |
6e83557c | 844 | addik r1, r1, PT_SIZE /* Clean up stack space */ |
2d5973cb MS |
845 | lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer */ |
846 | DBTRAP_return_user: /* MS: Make global symbol for debugging */ | |
847 | rtbd r16, 0; /* MS: Instructions to return from a debug trap */ | |
848 | nop; | |
ca54502b | 849 | |
2d5973cb | 850 | /* MS: Return to kernel state - kgdb */ |
ca54502b MS |
851 | 2: VM_OFF; |
852 | tophys(r1,r1); | |
2d5973cb | 853 | /* MS: Restore all regs */ |
ca54502b | 854 | RESTORE_REGS |
6e83557c MS |
855 | lwi r14, r1, PT_R14; |
856 | lwi r16, r1, PT_PC; | |
857 | addik r1, r1, PT_SIZE; /* MS: Clean up stack space */ | |
ca54502b | 858 | tovirt(r1,r1); |
2d5973cb MS |
859 | DBTRAP_return_kernel: /* MS: Make global symbol for debugging */ |
860 | rtbd r16, 0; /* MS: Instructions to return from a debug trap */ | |
ca54502b MS |
861 | nop; |
862 | ||
863 | ||
ca54502b MS |
864 | ENTRY(_switch_to) |
865 | /* prepare return value */ | |
b1d70c62 | 866 | addk r3, r0, CURRENT_TASK |
ca54502b MS |
867 | |
868 | /* save registers in cpu_context */ | |
869 | /* use r11 and r12, volatile registers, as temp register */ | |
870 | /* give start of cpu_context for previous process */ | |
871 | addik r11, r5, TI_CPU_CONTEXT | |
872 | swi r1, r11, CC_R1 | |
873 | swi r2, r11, CC_R2 | |
874 | /* skip volatile registers. | |
875 | * they are saved on stack when we jumped to _switch_to() */ | |
876 | /* dedicated registers */ | |
877 | swi r13, r11, CC_R13 | |
878 | swi r14, r11, CC_R14 | |
879 | swi r15, r11, CC_R15 | |
880 | swi r16, r11, CC_R16 | |
881 | swi r17, r11, CC_R17 | |
882 | swi r18, r11, CC_R18 | |
883 | /* save non-volatile registers */ | |
884 | swi r19, r11, CC_R19 | |
885 | swi r20, r11, CC_R20 | |
886 | swi r21, r11, CC_R21 | |
887 | swi r22, r11, CC_R22 | |
888 | swi r23, r11, CC_R23 | |
889 | swi r24, r11, CC_R24 | |
890 | swi r25, r11, CC_R25 | |
891 | swi r26, r11, CC_R26 | |
892 | swi r27, r11, CC_R27 | |
893 | swi r28, r11, CC_R28 | |
894 | swi r29, r11, CC_R29 | |
895 | swi r30, r11, CC_R30 | |
896 | /* special purpose registers */ | |
897 | mfs r12, rmsr | |
ca54502b MS |
898 | swi r12, r11, CC_MSR |
899 | mfs r12, rear | |
ca54502b MS |
900 | swi r12, r11, CC_EAR |
901 | mfs r12, resr | |
ca54502b MS |
902 | swi r12, r11, CC_ESR |
903 | mfs r12, rfsr | |
ca54502b MS |
904 | swi r12, r11, CC_FSR |
905 | ||
b1d70c62 MS |
906 | /* update r31, the current-give me pointer to task which will be next */ |
907 | lwi CURRENT_TASK, r6, TI_TASK | |
ca54502b | 908 | /* stored it to current_save too */ |
b1d70c62 | 909 | swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE) |
ca54502b MS |
910 | |
911 | /* get new process' cpu context and restore */ | |
912 | /* give me start where start context of next task */ | |
913 | addik r11, r6, TI_CPU_CONTEXT | |
914 | ||
915 | /* non-volatile registers */ | |
916 | lwi r30, r11, CC_R30 | |
917 | lwi r29, r11, CC_R29 | |
918 | lwi r28, r11, CC_R28 | |
919 | lwi r27, r11, CC_R27 | |
920 | lwi r26, r11, CC_R26 | |
921 | lwi r25, r11, CC_R25 | |
922 | lwi r24, r11, CC_R24 | |
923 | lwi r23, r11, CC_R23 | |
924 | lwi r22, r11, CC_R22 | |
925 | lwi r21, r11, CC_R21 | |
926 | lwi r20, r11, CC_R20 | |
927 | lwi r19, r11, CC_R19 | |
928 | /* dedicated registers */ | |
929 | lwi r18, r11, CC_R18 | |
930 | lwi r17, r11, CC_R17 | |
931 | lwi r16, r11, CC_R16 | |
932 | lwi r15, r11, CC_R15 | |
933 | lwi r14, r11, CC_R14 | |
934 | lwi r13, r11, CC_R13 | |
935 | /* skip volatile registers */ | |
936 | lwi r2, r11, CC_R2 | |
937 | lwi r1, r11, CC_R1 | |
938 | ||
939 | /* special purpose registers */ | |
940 | lwi r12, r11, CC_FSR | |
941 | mts rfsr, r12 | |
ca54502b MS |
942 | lwi r12, r11, CC_MSR |
943 | mts rmsr, r12 | |
ca54502b MS |
944 | |
945 | rtsd r15, 8 | |
946 | nop | |
947 | ||
948 | ENTRY(_reset) | |
7574349c | 949 | brai 0; /* Jump to reset vector */ |
ca54502b | 950 | |
ca54502b MS |
951 | /* These are compiled and loaded into high memory, then |
952 | * copied into place in mach_early_setup */ | |
953 | .section .init.ivt, "ax" | |
0b9b0200 | 954 | #if CONFIG_MANUAL_RESET_VECTOR |
ca54502b | 955 | .org 0x0 |
0b9b0200 MS |
956 | brai CONFIG_MANUAL_RESET_VECTOR |
957 | #endif | |
626afa35 | 958 | .org 0x8 |
ca54502b | 959 | brai TOPHYS(_user_exception); /* syscall handler */ |
626afa35 | 960 | .org 0x10 |
ca54502b | 961 | brai TOPHYS(_interrupt); /* Interrupt handler */ |
626afa35 | 962 | .org 0x18 |
751f1605 | 963 | brai TOPHYS(_debug_exception); /* debug trap handler */ |
626afa35 | 964 | .org 0x20 |
ca54502b MS |
965 | brai TOPHYS(_hw_exception_handler); /* HW exception handler */ |
966 | ||
ca54502b MS |
967 | .section .rodata,"a" |
968 | #include "syscall_table.S" | |
969 | ||
970 | syscall_table_size=(.-sys_call_table) | |
971 | ||
ce3266c0 SM |
972 | type_SYSCALL: |
973 | .ascii "SYSCALL\0" | |
974 | type_IRQ: | |
975 | .ascii "IRQ\0" | |
976 | type_IRQ_PREEMPT: | |
977 | .ascii "IRQ (PREEMPTED)\0" | |
978 | type_SYSCALL_PREEMPT: | |
979 | .ascii " SYSCALL (PREEMPTED)\0" | |
980 | ||
981 | /* | |
982 | * Trap decoding for stack unwinder | |
983 | * Tuples are (start addr, end addr, string) | |
984 | * If return address lies on [start addr, end addr], | |
985 | * unwinder displays 'string' | |
986 | */ | |
987 | ||
988 | .align 4 | |
989 | .global microblaze_trap_handlers | |
990 | microblaze_trap_handlers: | |
991 | /* Exact matches come first */ | |
992 | .word ret_from_trap; .word ret_from_trap ; .word type_SYSCALL | |
993 | .word ret_from_irq ; .word ret_from_irq ; .word type_IRQ | |
994 | /* Fuzzy matches go here */ | |
995 | .word ret_from_irq ; .word no_intr_resched ; .word type_IRQ_PREEMPT | |
996 | .word ret_from_trap; .word TRAP_return ; .word type_SYSCALL_PREEMPT | |
997 | /* End of table */ | |
998 | .word 0 ; .word 0 ; .word 0 |