[deliverable/linux.git] / arch / microblaze / kernel / process.c

/*
 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
 * Copyright (C) 2008-2009 PetaLogix
 * Copyright (C) 2006 Atmark Techno, Inc.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License. See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/module.h>
#include <linux/sched.h>
#include <linux/pm.h>
#include <linux/tick.h>
#include <linux/bitops.h>
#include <asm/pgalloc.h>
#include <asm/uaccess.h> /* for USER_DS macros */
#include <asm/cacheflush.h>

void show_regs(struct pt_regs *regs)
{
	printk(KERN_INFO " Registers dump: mode=%X\r\n", regs->pt_mode);
	printk(KERN_INFO " r1=%08lX, r2=%08lX, r3=%08lX, r4=%08lX\n",
				regs->r1, regs->r2, regs->r3, regs->r4);
	printk(KERN_INFO " r5=%08lX, r6=%08lX, r7=%08lX, r8=%08lX\n",
				regs->r5, regs->r6, regs->r7, regs->r8);
	printk(KERN_INFO " r9=%08lX, r10=%08lX, r11=%08lX, r12=%08lX\n",
				regs->r9, regs->r10, regs->r11, regs->r12);
	printk(KERN_INFO " r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n",
				regs->r13, regs->r14, regs->r15, regs->r16);
	printk(KERN_INFO " r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n",
				regs->r17, regs->r18, regs->r19, regs->r20);
	printk(KERN_INFO " r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n",
				regs->r21, regs->r22, regs->r23, regs->r24);
	printk(KERN_INFO " r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n",
				regs->r25, regs->r26, regs->r27, regs->r28);
	printk(KERN_INFO " r29=%08lX, r30=%08lX, r31=%08lX, rPC=%08lX\n",
				regs->r29, regs->r30, regs->r31, regs->pc);
	printk(KERN_INFO " msr=%08lX, ear=%08lX, esr=%08lX, fsr=%08lX\n",
				regs->msr, regs->ear, regs->esr, regs->fsr);
}

void (*pm_idle)(void);
void (*pm_power_off)(void) = NULL;
EXPORT_SYMBOL(pm_power_off);

static int hlt_counter = 1;

void disable_hlt(void)
{
	hlt_counter++;
}
EXPORT_SYMBOL(disable_hlt);

void enable_hlt(void)
{
	hlt_counter--;
}
EXPORT_SYMBOL(enable_hlt);

static int __init nohlt_setup(char *__unused)
{
	hlt_counter = 1;
	return 1;
}
__setup("nohlt", nohlt_setup);

static int __init hlt_setup(char *__unused)
{
	hlt_counter = 0;
	return 1;
}
__setup("hlt", hlt_setup);

void default_idle(void)
{
	if (likely(hlt_counter)) {
		local_irq_disable();
		stop_critical_timings();
		cpu_relax();
		start_critical_timings();
		local_irq_enable();
	} else {
		clear_thread_flag(TIF_POLLING_NRFLAG);
		smp_mb__after_clear_bit();
		local_irq_disable();
		while (!need_resched())
			cpu_sleep();
		local_irq_enable();
		set_thread_flag(TIF_POLLING_NRFLAG);
	}
}

void cpu_idle(void)
{
	set_thread_flag(TIF_POLLING_NRFLAG);

	/* endless idle loop with no priority at all */
	while (1) {
		void (*idle)(void) = pm_idle;

		if (!idle)
			idle = default_idle;

		tick_nohz_idle_enter();
		rcu_idle_enter();
		while (!need_resched())
			idle();
		rcu_idle_exit();
		tick_nohz_idle_exit();

		schedule_preempt_disabled();
		check_pgt_cache();
	}
}

void flush_thread(void)
{
}

int copy_thread(unsigned long clone_flags, unsigned long usp,
		unsigned long arg,
		struct task_struct *p, struct pt_regs *regs)
{
	struct pt_regs *childregs = task_pt_regs(p);
	struct thread_info *ti = task_thread_info(p);

	if (unlikely(p->flags & PF_KTHREAD)) {
		/* if we're creating a new kernel thread then just zeroing all
		 * the registers. That's OK for a brand new thread.*/
		memset(childregs, 0, sizeof(struct pt_regs));
		memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
		ti->cpu_context.r1  = (unsigned long)childregs;
		ti->cpu_context.r20 = (unsigned long)usp; /* fn */
		ti->cpu_context.r19 = (unsigned long)arg;
		childregs->pt_mode = 1;
		local_save_flags(childregs->msr);
#ifdef CONFIG_MMU
		ti->cpu_context.msr = childregs->msr & ~MSR_IE;
#endif
		ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8;
		return 0;
	}
	*childregs = *regs;
	childregs->r1 = usp;

	memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
	ti->cpu_context.r1 = (unsigned long)childregs;
#ifndef CONFIG_MMU
	ti->cpu_context.msr = (unsigned long)childregs->msr;
#else
	childregs->msr |= MSR_UMS;

	/* we should consider the fact that childregs is a copy of the parent
	 * regs which were saved immediately after entering the kernel state
	 * before enabling VM. This MSR will be restored in switch_to and
	 * RETURN() and we want to have the right machine state there
	 * specifically this state must have INTs disabled before and enabled
	 * after performing rtbd
	 * compose the right MSR for RETURN(). It will work for switch_to also
	 * excepting for VM and UMS
	 * don't touch UMS , CARRY and cache bits
	 * right now MSR is a copy of parent one */
	childregs->msr |= MSR_BIP;
	childregs->msr &= ~MSR_EIP;
	childregs->msr |= MSR_IE;
	childregs->msr &= ~MSR_VM;
	childregs->msr |= MSR_VMS;
	childregs->msr |= MSR_EE; /* exceptions will be enabled*/

	ti->cpu_context.msr = (childregs->msr|MSR_VM);
	ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
	ti->cpu_context.msr &= ~MSR_IE;
#endif
	ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;

	/*
	 *  r21 is the thread reg, r10 is 6th arg to clone
	 *  which contains TLS area
	 */
	if (clone_flags & CLONE_SETTLS)
		childregs->r21 = childregs->r10;

	return 0;
}

#ifndef CONFIG_MMU
/*
 * Return saved PC of a blocked thread.
 */
unsigned long thread_saved_pc(struct task_struct *tsk)
{
	struct cpu_context *ctx =
		&(((struct thread_info *)(tsk->stack))->cpu_context);

	/* Check whether the thread is blocked in resume() */
	if (in_sched_functions(ctx->r15))
		return (unsigned long)ctx->r15;
	else
		return ctx->r14;
}
#endif

unsigned long get_wchan(struct task_struct *p)
{
/* TBD (used by procfs) */
	return 0;
}

/* Set up a thread for executing a new program */
void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
{
	regs->pc = pc;
	regs->r1 = usp;
	regs->pt_mode = 0;
#ifdef CONFIG_MMU
	regs->msr |= MSR_UMS;
	regs->msr &= ~MSR_VM;
#endif
}

#ifdef CONFIG_MMU
#include <linux/elfcore.h>
/*
 * Set up a thread for executing a new program
 */
int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
{
	return 0; /* MicroBlaze has no separate FPU registers */
}
#endif /* CONFIG_MMU */
Commit	Line	Data
6496a23a MS	1	/*
	2	* Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
	3	* Copyright (C) 2008-2009 PetaLogix
	4	* Copyright (C) 2006 Atmark Techno, Inc.
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*/
	10
	11	#include <linux/module.h>
	12	#include <linux/sched.h>
	13	#include <linux/pm.h>
	14	#include <linux/tick.h>
	15	#include <linux/bitops.h>
6496a23a	16	#include <asm/pgalloc.h>
40db0834	17	#include <asm/uaccess.h> /* for USER_DS macros */
a1f55113	18	#include <asm/cacheflush.h>
6496a23a MS	19
	20	void show_regs(struct pt_regs *regs)
	21	{
ac3efab5	22	printk(KERN_INFO " Registers dump: mode=%X\r\n", regs->pt_mode);
6496a23a MS	23	printk(KERN_INFO " r1=%08lX, r2=%08lX, r3=%08lX, r4=%08lX\n",
	24	regs->r1, regs->r2, regs->r3, regs->r4);
	25	printk(KERN_INFO " r5=%08lX, r6=%08lX, r7=%08lX, r8=%08lX\n",
	26	regs->r5, regs->r6, regs->r7, regs->r8);
	27	printk(KERN_INFO " r9=%08lX, r10=%08lX, r11=%08lX, r12=%08lX\n",
	28	regs->r9, regs->r10, regs->r11, regs->r12);
	29	printk(KERN_INFO " r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n",
	30	regs->r13, regs->r14, regs->r15, regs->r16);
	31	printk(KERN_INFO " r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n",
	32	regs->r17, regs->r18, regs->r19, regs->r20);
	33	printk(KERN_INFO " r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n",
	34	regs->r21, regs->r22, regs->r23, regs->r24);
	35	printk(KERN_INFO " r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n",
	36	regs->r25, regs->r26, regs->r27, regs->r28);
	37	printk(KERN_INFO " r29=%08lX, r30=%08lX, r31=%08lX, rPC=%08lX\n",
	38	regs->r29, regs->r30, regs->r31, regs->pc);
	39	printk(KERN_INFO " msr=%08lX, ear=%08lX, esr=%08lX, fsr=%08lX\n",
	40	regs->msr, regs->ear, regs->esr, regs->fsr);
6496a23a MS	41	}
	42
	43	void (*pm_idle)(void);
	44	void (*pm_power_off)(void) = NULL;
	45	EXPORT_SYMBOL(pm_power_off);
	46
	47	static int hlt_counter = 1;
	48
	49	void disable_hlt(void)
	50	{
	51	hlt_counter++;
	52	}
	53	EXPORT_SYMBOL(disable_hlt);
	54
	55	void enable_hlt(void)
	56	{
	57	hlt_counter--;
	58	}
	59	EXPORT_SYMBOL(enable_hlt);
	60
	61	static int __init nohlt_setup(char *__unused)
	62	{
	63	hlt_counter = 1;
	64	return 1;
	65	}
	66	__setup("nohlt", nohlt_setup);
	67
	68	static int __init hlt_setup(char *__unused)
	69	{
	70	hlt_counter = 0;
	71	return 1;
	72	}
	73	__setup("hlt", hlt_setup);
	74
	75	void default_idle(void)
	76	{
78ebfa88	77	if (likely(hlt_counter)) {
d0f140e0 MS	78	local_irq_disable();
	79	stop_critical_timings();
	80	cpu_relax();
	81	start_critical_timings();
	82	local_irq_enable();
78ebfa88	83	} else {
6496a23a MS	84	clear_thread_flag(TIF_POLLING_NRFLAG);
	85	smp_mb__after_clear_bit();
	86	local_irq_disable();
	87	while (!need_resched())
	88	cpu_sleep();
	89	local_irq_enable();
	90	set_thread_flag(TIF_POLLING_NRFLAG);
78ebfa88	91	}
6496a23a MS	92	}
	93
	94	void cpu_idle(void)
	95	{
	96	set_thread_flag(TIF_POLLING_NRFLAG);
	97
	98	/* endless idle loop with no priority at all */
	99	while (1) {
	100	void (*idle)(void) = pm_idle;
	101
	102	if (!idle)
	103	idle = default_idle;
	104
1268fbc7 FW	105	tick_nohz_idle_enter();
1268fbc7 FW	106	rcu_idle_enter();
6496a23a MS	107	while (!need_resched())
6496a23a MS	108	idle();
1268fbc7 FW	109	rcu_idle_exit();
1268fbc7 FW	110	tick_nohz_idle_exit();
6496a23a	111
bd2f5536	112	schedule_preempt_disabled();
6496a23a MS	113	check_pgt_cache();
	114	}
	115	}
	116
	117	void flush_thread(void)
	118	{
	119	}
	120
a8fb748e	121	int copy_thread(unsigned long clone_flags, unsigned long usp,
2319295d	122	unsigned long arg,
6496a23a MS	123	struct task_struct p, struct pt_regs regs)
	124	{
	125	struct pt_regs *childregs = task_pt_regs(p);
	126	struct thread_info *ti = task_thread_info(p);
	127
2319295d AV	128	if (unlikely(p->flags & PF_KTHREAD)) {
	129	/* if we're creating a new kernel thread then just zeroing all
	130	* the registers. That's OK for a brand new thread.*/
	131	memset(childregs, 0, sizeof(struct pt_regs));
	132	memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
	133	ti->cpu_context.r1 = (unsigned long)childregs;
	134	ti->cpu_context.r20 = (unsigned long)usp; /* fn */
	135	ti->cpu_context.r19 = (unsigned long)arg;
	136	childregs->pt_mode = 1;
	137	local_save_flags(childregs->msr);
	138	#ifdef CONFIG_MMU
	139	ti->cpu_context.msr = childregs->msr & ~MSR_IE;
	140	#endif
	141	ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8;
	142	return 0;
	143	}
6496a23a	144	childregs = regs;
2319295d	145	childregs->r1 = usp;
6496a23a MS	146
	147	memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
	148	ti->cpu_context.r1 = (unsigned long)childregs;
2319295d	149	#ifndef CONFIG_MMU
6496a23a	150	ti->cpu_context.msr = (unsigned long)childregs->msr;
5233806d	151	#else
2319295d	152	childregs->msr \|= MSR_UMS;
5233806d	153
5233806d MS	154	/* we should consider the fact that childregs is a copy of the parent
	155	* regs which were saved immediately after entering the kernel state
	156	* before enabling VM. This MSR will be restored in switch_to and
	157	* RETURN() and we want to have the right machine state there
	158	* specifically this state must have INTs disabled before and enabled
	159	* after performing rtbd
	160	* compose the right MSR for RETURN(). It will work for switch_to also
	161	* excepting for VM and UMS
	162	* don't touch UMS , CARRY and cache bits
	163	* right now MSR is a copy of parent one */
	164	childregs->msr \|= MSR_BIP;
	165	childregs->msr &= ~MSR_EIP;
	166	childregs->msr \|= MSR_IE;
	167	childregs->msr &= ~MSR_VM;
	168	childregs->msr \|= MSR_VMS;
	169	childregs->msr \|= MSR_EE; /* exceptions will be enabled*/
	170
	171	ti->cpu_context.msr = (childregs->msr\|MSR_VM);
	172	ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
84ac218f	173	ti->cpu_context.msr &= ~MSR_IE;
5233806d	174	#endif
6496a23a MS	175	ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;
6496a23a MS	176
d5c15f17 EI	177	/*
	178	* r21 is the thread reg, r10 is 6th arg to clone
	179	* which contains TLS area
	180	*/
6496a23a	181	if (clone_flags & CLONE_SETTLS)
d5c15f17	182	childregs->r21 = childregs->r10;
6496a23a MS	183
	184	return 0;
	185	}
	186
5233806d	187	#ifndef CONFIG_MMU
6496a23a MS	188	/*
	189	* Return saved PC of a blocked thread.
	190	*/
	191	unsigned long thread_saved_pc(struct task_struct *tsk)
	192	{
	193	struct cpu_context *ctx =
	194	&(((struct thread_info *)(tsk->stack))->cpu_context);
	195
	196	/* Check whether the thread is blocked in resume() */
	197	if (in_sched_functions(ctx->r15))
	198	return (unsigned long)ctx->r15;
	199	else
	200	return ctx->r14;
	201	}
5233806d	202	#endif
6496a23a	203
6496a23a MS	204	unsigned long get_wchan(struct task_struct *p)
	205	{
	206	/* TBD (used by procfs) */
	207	return 0;
	208	}
e1c4bd08 MS	209
	210	/* Set up a thread for executing a new program */
	211	void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
	212	{
e1c4bd08 MS	213	regs->pc = pc;
	214	regs->r1 = usp;
	215	regs->pt_mode = 0;
f1ae3f69	216	#ifdef CONFIG_MMU
866d7229	217	regs->msr \|= MSR_UMS;
99c59f60	218	regs->msr &= ~MSR_VM;
f1ae3f69	219	#endif
e1c4bd08	220	}
5233806d MS	221
	222	#ifdef CONFIG_MMU
	223	#include <linux/elfcore.h>
	224	/*
	225	* Set up a thread for executing a new program
	226	*/
	227	int dump_fpu(struct pt_regs regs, elf_fpregset_t fpregs)
	228	{
	229	return 0; /* MicroBlaze has no separate FPU registers */
	230	}
	231	#endif /* CONFIG_MMU */