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[MIPS] Use __ffs() instead of ffs() in ip32_irq0().
[deliverable/linux.git] / arch / mips / Makefile
CommitLineData
1da177e4
LT		 1#
2# This file is subject to the terms and conditions of the GNU General Public
3# License. See the file "COPYING" in the main directory of this archive
4# for more details.
5#
6# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7# DECStation modifications by Paul M. Antoine, 1996
8# Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
9#
10# This file is included by the global makefile so that you can add your own
11# architecture-specific flags and dependencies. Remember to do have actions
12# for "archclean" cleaning up for this architecture.
13#
14
1da177e4
LT		 15cflags-y :=
16
17#
18# Select the object file format to substitute into the linker script.
19#
20ifdef CONFIG_CPU_LITTLE_ENDIAN
2132bit-tool-prefix = mipsel-linux-
2264bit-tool-prefix = mips64el-linux-
2332bit-bfd = elf32-tradlittlemips
2464bit-bfd = elf64-tradlittlemips
2532bit-emul = elf32ltsmip
2664bit-emul = elf64ltsmip
27else
2832bit-tool-prefix = mips-linux-
2964bit-tool-prefix = mips64-linux-
3032bit-bfd = elf32-tradbigmips
3164bit-bfd = elf64-tradbigmips
3232bit-emul = elf32btsmip
3364bit-emul = elf64btsmip
34endif
35
875d43e7 36ifdef CONFIG_32BIT
1da177e4
LT		 37tool-prefix = $(32bit-tool-prefix)
38UTS_MACHINE := mips
39endif
875d43e7 40ifdef CONFIG_64BIT
1da177e4
LT		 41tool-prefix = $(64bit-tool-prefix)
42UTS_MACHINE := mips64
43endif
44
45ifdef CONFIG_CROSSCOMPILE
46CROSS_COMPILE := $(tool-prefix)
47endif
48
8145095c 49ifdef CONFIG_32BIT
1da177e4
LT		 50ld-emul = $(32bit-emul)
51vmlinux-32 = vmlinux
52vmlinux-64 = vmlinux.64
59b3e8e9
RB		 53
54cflags-y += -mabi=32
8145095c 55endif
1da177e4 56
8145095c 57ifdef CONFIG_64BIT
8145095c
RB		 58ld-emul = $(64bit-emul)
59vmlinux-32 = vmlinux.32
60vmlinux-64 = vmlinux
61
59b3e8e9
RB		 62cflags-y += -mabi=64
63ifdef CONFIG_BUILD_ELF64
8145095c 64cflags-y += $(call cc-option,-mno-explicit-relocs)
59b3e8e9
RB		 65else
66cflags-y += $(call cc-option,-msym32)
67endif
1da177e4
LT		 68endif
69
59b3e8e9 70
1da177e4
LT		 71#
72# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
73# code since it only slows down the whole thing. At some point we might make
74# use of global pointer optimizations but their use of $28 conflicts with
75# the current pointer optimization.
76#
77# The DECStation requires an ECOFF kernel for remote booting, other MIPS
78# machines may also. Since BFD is incredibly buggy with respect to
79# crossformat linking we rely on the elf2ecoff tool for format conversion.
80#
1da177e4 81cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
6218cf44 82cflags-y += -msoft-float
9f83d839 83LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
1da177e4
LT		 84MODFLAGS += -mlong-calls
85
f425a6dc
TS		 86#
87# We explicitly add the endianness specifier if needed, this allows
88# to compile kernels with a toolchain for the other endianness. We
89# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
90# when fed the toolchain default!
91#
59b3e8e9
RB		 92cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB -D__MIPSEB__)
93cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL -D__MIPSEL__)
f425a6dc 94
9007c9a2
RB		 95cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
96 -fno-omit-frame-pointer
1da177e4 97
1da177e4
LT		 98#
99# CPU-dependent compiler/assembler options for optimization.
100#
59b3e8e9
RB		 101cflags-$(CONFIG_CPU_R3000) += -march=r3000
102cflags-$(CONFIG_CPU_TX39XX) += -march=r3900
103cflags-$(CONFIG_CPU_R6000) += -march=r6000 -Wa,--trap
104cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap
105cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
106cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
107cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
9200c0b2 108cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
59b3e8e9 109 -Wa,-mips32 -Wa,--trap
9200c0b2 110cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
59b3e8e9 111 -Wa,-mips32r2 -Wa,--trap
9200c0b2 112cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
59b3e8e9 113 -Wa,-mips64 -Wa,--trap
9200c0b2 114cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
59b3e8e9
RB		 115 -Wa,-mips64r2 -Wa,--trap
116cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap
c9e321e0 117cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \
1da177e4 118 -Wa,--trap
c9e321e0 119cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \
1da177e4 120 -Wa,--trap
59b3e8e9 121cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \
1da177e4 122 -Wa,--trap
59b3e8e9 123cflags-$(CONFIG_CPU_RM9000) += $(call cc-option,-march=rm9000,-march=r5000) \
1da177e4 124 -Wa,--trap
59b3e8e9 125cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=r5000) \
1da177e4 126 -Wa,--trap
59b3e8e9
RB		 127cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap
128cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \
1da177e4
LT		 129 -Wa,--trap
130
131ifdef CONFIG_CPU_SB1
132ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
133MODFLAGS += -msb1-pass1-workarounds
134endif
135endif
136
137#
138# Firmware support
139#
140libs-$(CONFIG_ARC) += arch/mips/arc/
141libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
142
143#
144# Board-dependent options and extra files
145#
146
147#
148# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
149#
150core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
151cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
152load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
153
154#
155# Common Alchemy Au1x00 stuff
156#
157core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
158cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
159
160#
161# AMD Alchemy Pb1000 eval board
162#
163libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
164cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
165load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
166
167#
168# AMD Alchemy Pb1100 eval board
169#
170libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
171cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
172load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
173
174#
175# AMD Alchemy Pb1500 eval board
176#
177libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
178cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
179load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
180
181#
182# AMD Alchemy Pb1550 eval board
183#
184libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
185cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
186load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
187
e3ad1c23
PP		 188#
189# AMD Alchemy Pb1200 eval board
190#
191libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
192cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
193load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
194
1da177e4
LT		 195#
196# AMD Alchemy Db1000 eval board
197#
198libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
199cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
200load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
201
202#
203# AMD Alchemy Db1100 eval board
204#
205libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
206cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
207load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
208
209#
210# AMD Alchemy Db1500 eval board
211#
212libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
213cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
214load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
215
216#
217# AMD Alchemy Db1550 eval board
218#
219libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
220cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
221load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
222
e3ad1c23
PP		 223#
224# AMD Alchemy Db1200 eval board
225#
226libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
227cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
228load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
229
1da177e4
LT		 230#
231# AMD Alchemy Bosporus eval board
232#
233libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
234cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
235load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
236
237#
238# AMD Alchemy Mirage eval board
239#
240libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
241cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
242load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
243
244#
245# 4G-Systems eval board
246#
247libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
248load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
249
250#
251# MyCable eval board
252#
253libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
254load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
255
256#
257# Cobalt Server
258#
259core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
11ed6d5b 260cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
1da177e4
LT		 261load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
262
263#
264# DECstation family
265#
266core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
267cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
268libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
269load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
270CLEAN_FILES += drivers/tc/lk201-map.c
271
272#
273# Galileo EV64120 Board
274#
275core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
276core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
277cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
278load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
279
280#
281# Galileo EV96100 Board
282#
283core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
284cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
285load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000
286
287#
288# Globespan IVR eval board with QED 5231 CPU
289#
290core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/
291core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/
292load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000
293
294#
295# ITE 8172 eval board with QED 5231 CPU
296#
297core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/
298load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000
299
300#
301# For all MIPS, Inc. eval boards
302#
303core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
304
305#
306# MIPS Atlas board
307#
308core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
309cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
310cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
311load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
312
313#
314# MIPS Malta board
315#
316core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
317cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
318load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
319
320#
321# MIPS SEAD board
322#
323core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
324load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
325
c78cbf49
RB		 326#
327# MIPS SIM
328#
329core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
330cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
331load-$(CONFIG_MIPS_SIM) += 0x80100000
332
1da177e4
LT		 333#
334# Momentum Ocelot board
335#
336# The Ocelot setup.o must be linked early - it does the ioremap() for the
337# mips_io_port_base.
338#
339core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
340 arch/mips/gt64120/momenco_ocelot/
341cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
342load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
343
344#
345# Momentum Ocelot-G board
346#
347# The Ocelot-G setup.o must be linked early - it does the ioremap() for the
348# mips_io_port_base.
349#
350core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
351load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000
352
353#
354# Momentum Ocelot-C and -CS boards
355#
356# The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
357# mips_io_port_base.
358core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
359load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
360
361#
362# PMC-Sierra Yosemite
363#
364core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
365cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
366load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
367
07119621
RB		 368# Qemu simulating MIPS32 4Kc
369#
370core-$(CONFIG_QEMU) += arch/mips/qemu/
371cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
372load-$(CONFIG_QEMU) += 0xffffffff80010000
373
1da177e4
LT		 374#
375# Momentum Ocelot-3
376#
377core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
378cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
379load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
380
381#
382# Momentum Jaguar ATX
383#
384core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
385cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja
386#ifdef CONFIG_JAGUAR_DMALOW
387#load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
388#else
389load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000
390#endif
391
392#
393# NEC DDB
394#
395core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
396
397#
398# NEC DDB Vrc-5074
399#
400core-$(CONFIG_DDB5074) += arch/mips/ddb5xxx/ddb5074/
401load-$(CONFIG_DDB5074) += 0xffffffff80080000
402
403#
404# NEC DDB Vrc-5476
405#
406core-$(CONFIG_DDB5476) += arch/mips/ddb5xxx/ddb5476/
407load-$(CONFIG_DDB5476) += 0xffffffff80080000
408
409#
410# NEC DDB Vrc-5477
411#
412core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
413load-$(CONFIG_DDB5477) += 0xffffffff80100000
414
415core-$(CONFIG_LASAT) += arch/mips/lasat/
416cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
417load-$(CONFIG_LASAT) += 0xffffffff80000000
418
1da177e4
LT		 419#
420# Common VR41xx
421#
422core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
423cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
424
425#
426# NEC VR4133
427#
428core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
429load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
430
431#
432# ZAO Networks Capcella (VR4131)
433#
1da177e4
LT		 434load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
435
436#
437# Victor MP-C303/304 (VR4122)
438#
1da177e4
LT		 439load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
440
441#
442# IBM WorkPad z50 (VR4121)
443#
444core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
445load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
446
447#
448# CASIO CASSIPEIA E-55/65 (VR4111)
449#
450core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
451load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
452
453#
63b799f9 454# TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
1da177e4 455#
63b799f9 456load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
1da177e4 457
bdf21b18
PP		 458#
459# Common Philips PNX8550
460#
461core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
462cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
463
464#
465# Philips PNX8550 JBS board
466#
467libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
468#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
469load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
470
1da177e4
LT		 471#
472# SGI IP22 (Indy/Indigo2)
473#
474# Set the load address to >= 0xffffffff88069000 if you want to leave space for
475# symmon, 0xffffffff80002000 for production kernels. Note that the value must
476# be aligned to a multiple of the kernel stack size or the handling of the
477# current variable will break so for 64-bit kernels we have to raise the start
478# address by 8kb.
479#
480core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
481cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
875d43e7 482ifdef CONFIG_32BIT
1da177e4
LT		 483load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
484endif
875d43e7 485ifdef CONFIG_64BIT
1da177e4
LT		 486load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
487endif
488
489#
490# SGI-IP27 (Origin200/2000)
491#
492# Set the load address to >= 0xc000000000300000 if you want to leave space for
493# symmon, 0xc00000000001c000 for production kernels. Note that the value must
494# be 16kb aligned or the handling of the current variable will break.
495#
496ifdef CONFIG_SGI_IP27
497core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
498cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
1da177e4
LT		 499ifdef CONFIG_MAPPED_KERNEL
500load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
501OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
502dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
503else
504load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
505OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
506endif
1da177e4
LT		 507endif
508
509#
510# SGI-IP32 (O2)
511#
512# Set the load address to >= 80069000 if you want to leave space for symmon,
513# 0xffffffff80004000 for production kernels. Note that the value must be aligned to
514# a multiple of the kernel stack size or the handling of the current variable
515# will break.
516#
517core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
518cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
519load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
520
521#
522# Sibyte SB1250 SOC
523#
524# This is a LIB so that it links at the end, and initcalls are later
525# the sequence; but it is built as an object so that modules don't get
526# removed (as happens, even if they have __initcall/module_init)
527#
528core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
f137e463
AI		 529cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
530 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
1da177e4
LT		 531
532core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
f137e463
AI		 533cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
534 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
535
536core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
537cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
538 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
539
540core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
541cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
542 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
1da177e4
LT		 543
544#
545# Sibyte BCM91120x (Carmel) board
546# Sibyte BCM91120C (CRhine) board
547# Sibyte BCM91125C (CRhone) board
548# Sibyte BCM91125E (Rhone) board
549# Sibyte SWARM board
9a6dcea1 550# Sibyte BCM91x80 (BigSur) board
1da177e4
LT		 551#
552libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
553load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
554libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
555load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
556libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
557load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
558libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
559load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
560libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
561load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
562libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
563load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
9a6dcea1
AI		 564libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
565load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
1da177e4
LT		 566
567#
568# SNI RM200 PCI
569#
570core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
571cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
572load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000
573
574#
575# Toshiba JMR-TX3927 board
576#
577core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
578 arch/mips/jmr3927/common/
5135b0cd 579cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
1da177e4
LT		 580load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
581
582#
583# Toshiba RBTX4927 board or
584# Toshiba RBTX4937 board
585#
586core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
587core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
588load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
589
23fbee9d
RB		 590#
591# Toshiba RBTX4938 board
592#
593core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
594core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
595load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
596
1da177e4
LT		 597cflags-y += -Iinclude/asm-mips/mach-generic
598drivers-$(CONFIG_PCI) += arch/mips/pci/
599
875d43e7 600ifdef CONFIG_32BIT
1da177e4
LT		 601ifdef CONFIG_CPU_LITTLE_ENDIAN
602JIFFIES = jiffies_64
603else
604JIFFIES = jiffies_64 + 4
605endif
606else
607JIFFIES = jiffies_64
608endif
609
610AFLAGS += $(cflags-y)
611CFLAGS += $(cflags-y)
612
613LDFLAGS += -m $(ld-emul)
614
59b3e8e9
RB		 615ifdef CONFIG_MIPS
616CHECKFLAGS += $(shell $(CC) $(CFLAGS) -dM -E -xc /dev/null | \
617 egrep -vw '__GNUC_(MAJOR|MINOR|PATCHLEVEL)__' | \
618 sed -e 's/^\#define /-D/' -e 's/ /="/' -e 's/$$/"/')
619endif
620
1da177e4
LT		 621OBJCOPYFLAGS += --remove-section=.reginfo
622
623#
624# Choosing incompatible machines durings configuration will result in
625# error messages during linking. Select a default linkscript if
626# none has been choosen above.
627#
628
629CPPFLAGS_vmlinux.lds := \
630 $(CFLAGS) \
631 -D"LOADADDR=$(load-y)" \
632 -D"JIFFIES=$(JIFFIES)" \
633 -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
634
635head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
636
637libs-y += arch/mips/lib/
875d43e7
RB		 638libs-$(CONFIG_32BIT) += arch/mips/lib-32/
639libs-$(CONFIG_64BIT) += arch/mips/lib-64/
1da177e4
LT		 640
641core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
642
643drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
644
645ifdef CONFIG_LASAT
646rom.bin rom.sw: vmlinux
7c6b155f 647 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
1da177e4
LT		 648endif
649
650#
651# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
652# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
653# convert to ECOFF using elf2ecoff.
654#
655vmlinux.32: vmlinux
656 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
657
658#
659# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
660# ELF files from 32-bit files by conversion.
661#
662vmlinux.64: vmlinux
663 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
664
665makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
666
667ifdef CONFIG_BOOT_ELF32
668all: $(vmlinux-32)
669endif
670
671ifdef CONFIG_BOOT_ELF64
672all: $(vmlinux-64)
673endif
674
149f60b3
RB		 675ifdef CONFIG_MIPS_ATLAS
676all: vmlinux.srec
677endif
678
679ifdef CONFIG_MIPS_MALTA
680all: vmlinux.srec
681endif
682
683ifdef CONFIG_MIPS_SEAD
684all: vmlinux.srec
685endif
686
154b500b
RB		 687ifdef CONFIG_QEMU
688all: vmlinux.bin
689endif
690
1da177e4
LT		 691ifdef CONFIG_SNI_RM200_PCI
692all: vmlinux.ecoff
693endif
694
154b500b
RB		 695vmlinux.bin: $(vmlinux-32)
696 +@$(call makeboot,$@)
697
1da177e4
LT		 698vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
699 +@$(call makeboot,$@)
700
701vmlinux.srec: $(vmlinux-32)
702 +@$(call makeboot,$@)
703
704CLEAN_FILES += vmlinux.ecoff \
705 vmlinux.srec \
706 vmlinux.rm200.tmp \
707 vmlinux.rm200
708
709archclean:
710 @$(MAKE) $(clean)=arch/mips/boot
711 @$(MAKE) $(clean)=arch/mips/lasat
712
048eb582 713CLEAN_FILES += vmlinux.32 \
1da177e4
LT		 714 vmlinux.64 \
715 vmlinux.ecoff
Linux kernel - Deliverables
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