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[MIPS] Replace use of stext with _stext.
[deliverable/linux.git] / arch / mips / Makefile
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1da177e4
LT		 1#
2# This file is subject to the terms and conditions of the GNU General Public
3# License. See the file "COPYING" in the main directory of this archive
4# for more details.
5#
6# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7# DECStation modifications by Paul M. Antoine, 1996
8# Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
9#
10# This file is included by the global makefile so that you can add your own
11# architecture-specific flags and dependencies. Remember to do have actions
12# for "archclean" cleaning up for this architecture.
13#
14
1da177e4
LT		 15cflags-y :=
16
17#
18# Select the object file format to substitute into the linker script.
19#
20ifdef CONFIG_CPU_LITTLE_ENDIAN
2132bit-tool-prefix = mipsel-linux-
2264bit-tool-prefix = mips64el-linux-
2332bit-bfd = elf32-tradlittlemips
2464bit-bfd = elf64-tradlittlemips
2532bit-emul = elf32ltsmip
2664bit-emul = elf64ltsmip
27else
2832bit-tool-prefix = mips-linux-
2964bit-tool-prefix = mips64-linux-
3032bit-bfd = elf32-tradbigmips
3164bit-bfd = elf64-tradbigmips
3232bit-emul = elf32btsmip
3364bit-emul = elf64btsmip
34endif
35
875d43e7 36ifdef CONFIG_32BIT
1da177e4
LT		 37tool-prefix = $(32bit-tool-prefix)
38UTS_MACHINE := mips
39endif
875d43e7 40ifdef CONFIG_64BIT
1da177e4
LT		 41tool-prefix = $(64bit-tool-prefix)
42UTS_MACHINE := mips64
43endif
44
45ifdef CONFIG_CROSSCOMPILE
46CROSS_COMPILE := $(tool-prefix)
47endif
48
8145095c 49ifdef CONFIG_32BIT
1da177e4
LT		 50ld-emul = $(32bit-emul)
51vmlinux-32 = vmlinux
52vmlinux-64 = vmlinux.64
59b3e8e9
RB		 53
54cflags-y += -mabi=32
8145095c 55endif
1da177e4 56
8145095c 57ifdef CONFIG_64BIT
8145095c
RB		 58ld-emul = $(64bit-emul)
59vmlinux-32 = vmlinux.32
60vmlinux-64 = vmlinux
61
59b3e8e9
RB		 62cflags-y += -mabi=64
63ifdef CONFIG_BUILD_ELF64
8145095c 64cflags-y += $(call cc-option,-mno-explicit-relocs)
59b3e8e9 65else
656be92f 66cflags-y += $(call cc-option,-msym32)
59b3e8e9 67endif
1da177e4
LT		 68endif
69
59b3e8e9 70
1da177e4
LT		 71#
72# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
73# code since it only slows down the whole thing. At some point we might make
74# use of global pointer optimizations but their use of $28 conflicts with
75# the current pointer optimization.
76#
77# The DECStation requires an ECOFF kernel for remote booting, other MIPS
78# machines may also. Since BFD is incredibly buggy with respect to
79# crossformat linking we rely on the elf2ecoff tool for format conversion.
80#
1da177e4 81cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
6218cf44 82cflags-y += -msoft-float
9f83d839 83LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
1da177e4
LT		 84MODFLAGS += -mlong-calls
85
72fbfb26
RB		 86cflags-y += -ffreestanding
87
f425a6dc
TS		 88#
89# We explicitly add the endianness specifier if needed, this allows
90# to compile kernels with a toolchain for the other endianness. We
91# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
92# when fed the toolchain default!
93#
f9405412 94# Certain gcc versions upto gcc 4.1.1 (probably 4.2-subversion as of
59c51591 95# 2006-10-10 don't properly change the predefined symbols if -EB / -EL
f9405412
RB		 96# are used, so we kludge that here. A bug has been filed at
97# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29413.
98#
99undef-all += -UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__
100undef-all += -UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__
101predef-be += -DMIPSEB -D_MIPSEB -D__MIPSEB -D__MIPSEB__
102predef-le += -DMIPSEL -D_MIPSEL -D__MIPSEL -D__MIPSEL__
103cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB $(undef-all) $(predef-be))
104cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL $(undef-all) $(predef-le))
f425a6dc 105
9693a853
FBH		 106cflags-$(CONFIG_CPU_HAS_SMARTMIPS) += $(call cc-option,-msmartmips)
107
9007c9a2
RB		 108cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
109 -fno-omit-frame-pointer
1da177e4 110
1da177e4
LT		 111#
112# CPU-dependent compiler/assembler options for optimization.
113#
59b3e8e9
RB		 114cflags-$(CONFIG_CPU_R3000) += -march=r3000
115cflags-$(CONFIG_CPU_TX39XX) += -march=r3900
116cflags-$(CONFIG_CPU_R6000) += -march=r6000 -Wa,--trap
117cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap
118cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
119cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
120cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
2a21c730 121cflags-$(CONFIG_CPU_LOONGSON2) += -march=r4600 -Wa,--trap
9200c0b2 122cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
59b3e8e9 123 -Wa,-mips32 -Wa,--trap
9200c0b2 124cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
59b3e8e9 125 -Wa,-mips32r2 -Wa,--trap
9200c0b2 126cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
59b3e8e9 127 -Wa,-mips64 -Wa,--trap
9200c0b2 128cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
59b3e8e9
RB		 129 -Wa,-mips64r2 -Wa,--trap
130cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap
c9e321e0 131cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \
1da177e4 132 -Wa,--trap
c9e321e0 133cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \
1da177e4 134 -Wa,--trap
59b3e8e9 135cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \
1da177e4 136 -Wa,--trap
59b3e8e9 137cflags-$(CONFIG_CPU_RM9000) += $(call cc-option,-march=rm9000,-march=r5000) \
1da177e4 138 -Wa,--trap
59b3e8e9 139cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=r5000) \
1da177e4 140 -Wa,--trap
59b3e8e9
RB		 141cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap
142cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \
1da177e4
LT		 143 -Wa,--trap
144
145ifdef CONFIG_CPU_SB1
146ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
147MODFLAGS += -msb1-pass1-workarounds
148endif
149endif
150
151#
152# Firmware support
153#
154libs-$(CONFIG_ARC) += arch/mips/arc/
155libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
156
157#
158# Board-dependent options and extra files
159#
160
161#
162# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
163#
164core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
165cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
166load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
167
168#
169# Common Alchemy Au1x00 stuff
170#
171core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
172cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
173
174#
175# AMD Alchemy Pb1000 eval board
176#
177libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
178cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
179load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
180
181#
182# AMD Alchemy Pb1100 eval board
183#
184libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
185cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
186load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
187
188#
189# AMD Alchemy Pb1500 eval board
190#
191libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
192cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
193load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
194
195#
196# AMD Alchemy Pb1550 eval board
197#
198libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
199cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
200load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
201
e3ad1c23
PP		 202#
203# AMD Alchemy Pb1200 eval board
204#
205libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
206cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
207load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
208
1da177e4
LT		 209#
210# AMD Alchemy Db1000 eval board
211#
212libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
213cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
214load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
215
216#
217# AMD Alchemy Db1100 eval board
218#
219libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
220cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
221load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
222
223#
224# AMD Alchemy Db1500 eval board
225#
226libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
227cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
228load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
229
230#
231# AMD Alchemy Db1550 eval board
232#
233libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
234cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
235load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
236
e3ad1c23
PP		 237#
238# AMD Alchemy Db1200 eval board
239#
240libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
241cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
242load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
243
1da177e4
LT		 244#
245# AMD Alchemy Bosporus eval board
246#
247libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
248cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
249load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
250
251#
252# AMD Alchemy Mirage eval board
253#
254libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
255cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
256load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
257
258#
259# 4G-Systems eval board
260#
261libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
262load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
263
264#
265# MyCable eval board
266#
267libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
268load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
269
270#
271# Cobalt Server
272#
273core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
11ed6d5b 274cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
1da177e4
LT		 275load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
276
277#
278# DECstation family
279#
280core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
281cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
282libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
283load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
284CLEAN_FILES += drivers/tc/lk201-map.c
285
a240a469
MZ		 286#
287# Wind River PPMC Board (4KC + GT64120)
288#
289core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/
290cflags-$(CONFIG_WR_PPMC) += -Iinclude/asm-mips/mach-wrppmc
291load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
292
42d226c7
ST		 293#
294# lemote fulong mini-PC board
295#
296core-$(CONFIG_LEMOTE_FULONG) +=arch/mips/lemote/lm2e/
297load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000
298cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote
299
1da177e4
LT		 300#
301# For all MIPS, Inc. eval boards
302#
303core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
304
305#
306# MIPS Atlas board
307#
308core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
309cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
310cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
311load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
312
313#
314# MIPS Malta board
315#
316core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
317cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
318load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
319
320#
321# MIPS SEAD board
322#
323core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
09f451bf 324cflags-$(CONFIG_MIPS_SEAD) += -Iinclude/asm-mips/mach-mips
1da177e4
LT		 325load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
326
c78cbf49
RB		 327#
328# MIPS SIM
329#
f6e2373a 330core-$(CONFIG_MIPS_SIM) += arch/mips/mipssim/
9a0f3b73 331cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-mipssim
c78cbf49
RB		 332load-$(CONFIG_MIPS_SIM) += 0x80100000
333
1da177e4
LT		 334#
335# Momentum Ocelot board
336#
337# The Ocelot setup.o must be linked early - it does the ioremap() for the
338# mips_io_port_base.
339#
340core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
341 arch/mips/gt64120/momenco_ocelot/
342cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
343load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
344
9267a30d
MSJ		 345#
346# PMC-Sierra MSP SOCs
347#
348core-$(CONFIG_PMC_MSP) += arch/mips/pmc-sierra/msp71xx/
349cflags-$(CONFIG_PMC_MSP) += -Iinclude/asm-mips/pmc-sierra/msp71xx \
350 -mno-branch-likely
351load-$(CONFIG_PMC_MSP) += 0xffffffff80100000
352
1da177e4
LT		 353#
354# PMC-Sierra Yosemite
355#
356core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
357cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
358load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
359
14cd8015 360#
07119621
RB		 361# Qemu simulating MIPS32 4Kc
362#
363core-$(CONFIG_QEMU) += arch/mips/qemu/
364cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
365load-$(CONFIG_QEMU) += 0xffffffff80010000
366
35189fad
RB		 367#
368# Basler eXcite
369#
370core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/
371cflags-$(CONFIG_BASLER_EXCITE) += -Iinclude/asm-mips/mach-excite
372load-$(CONFIG_BASLER_EXCITE) += 0x80100000
373
1da177e4
LT		 374#
375# NEC DDB
376#
377core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
378
1da177e4
LT		 379#
380# NEC DDB Vrc-5477
381#
382core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
383load-$(CONFIG_DDB5477) += 0xffffffff80100000
384
1da177e4
LT		 385#
386# Common VR41xx
387#
388core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
389cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
390
391#
392# NEC VR4133
393#
394core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
395load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
396
397#
398# ZAO Networks Capcella (VR4131)
399#
1da177e4
LT		 400load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
401
402#
403# Victor MP-C303/304 (VR4122)
404#
1da177e4
LT		 405load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
406
407#
408# IBM WorkPad z50 (VR4121)
409#
410core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
411load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
412
413#
414# CASIO CASSIPEIA E-55/65 (VR4111)
415#
416core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
417load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
418
419#
63b799f9 420# TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
1da177e4 421#
63b799f9 422load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
1da177e4 423
bdf21b18
PP		 424#
425# Common Philips PNX8550
426#
427core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
428cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
429
430#
431# Philips PNX8550 JBS board
432#
433libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
434#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
435load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
436
f0647a52
VW		 437# Philips PNX8550 STB810 board
438#
439libs-$(CONFIG_PNX8550_STB810) += arch/mips/philips/pnx8550/stb810/
440load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000
441
355c471f 442# NEC EMMA2RH boards
443#
444core-$(CONFIG_EMMA2RH) += arch/mips/emma2rh/common/
445cflags-$(CONFIG_EMMA2RH) += -Iinclude/asm-mips/mach-emma2rh
446
447# NEC EMMA2RH Mark-eins
448core-$(CONFIG_MARKEINS) += arch/mips/emma2rh/markeins/
449load-$(CONFIG_MARKEINS) += 0xffffffff88100000
450
1da177e4
LT		 451#
452# SGI IP22 (Indy/Indigo2)
453#
454# Set the load address to >= 0xffffffff88069000 if you want to leave space for
455# symmon, 0xffffffff80002000 for production kernels. Note that the value must
456# be aligned to a multiple of the kernel stack size or the handling of the
457# current variable will break so for 64-bit kernels we have to raise the start
458# address by 8kb.
459#
460core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
461cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
875d43e7 462ifdef CONFIG_32BIT
1da177e4
LT		 463load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
464endif
875d43e7 465ifdef CONFIG_64BIT
1da177e4
LT		 466load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
467endif
468
469#
470# SGI-IP27 (Origin200/2000)
471#
472# Set the load address to >= 0xc000000000300000 if you want to leave space for
473# symmon, 0xc00000000001c000 for production kernels. Note that the value must
474# be 16kb aligned or the handling of the current variable will break.
475#
476ifdef CONFIG_SGI_IP27
477core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
478cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
1da177e4
LT		 479ifdef CONFIG_MAPPED_KERNEL
480load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
481OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
482dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
483else
484load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
485OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
486endif
1da177e4
LT		 487endif
488
489#
490# SGI-IP32 (O2)
491#
492# Set the load address to >= 80069000 if you want to leave space for symmon,
493# 0xffffffff80004000 for production kernels. Note that the value must be aligned to
494# a multiple of the kernel stack size or the handling of the current variable
495# will break.
496#
497core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
498cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
499load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
500
501#
d619f38f 502# Sibyte SB1250/BCM1480 SOC
1da177e4
LT		 503#
504# This is a LIB so that it links at the end, and initcalls are later
505# the sequence; but it is built as an object so that modules don't get
506# removed (as happens, even if they have __initcall/module_init)
507#
508core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
d619f38f 509core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/common/
f137e463
AI		 510cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
511 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
1da177e4
LT		 512
513core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
d619f38f 514core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/common/
f137e463
AI		 515cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
516 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
517
518core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
d619f38f 519core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/common/
f137e463
AI		 520cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
521 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
522
523core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
d619f38f 524core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/common/
f137e463
AI		 525cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
526 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
1da177e4
LT		 527
528#
529# Sibyte BCM91120x (Carmel) board
530# Sibyte BCM91120C (CRhine) board
531# Sibyte BCM91125C (CRhone) board
532# Sibyte BCM91125E (Rhone) board
533# Sibyte SWARM board
9a6dcea1 534# Sibyte BCM91x80 (BigSur) board
1da177e4
LT		 535#
536libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
537load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
538libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
539load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
540libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
541load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
542libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
543load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
544libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
545load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
546libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
547load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
9a6dcea1
AI		 548libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
549load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
1da177e4
LT		 550
551#
14b36af4 552# SNI RM
1da177e4 553#
14b36af4
TB		 554core-$(CONFIG_SNI_RM) += arch/mips/sni/
555cflags-$(CONFIG_SNI_RM) += -Iinclude/asm-mips/mach-rm
556load-$(CONFIG_SNI_RM) += 0xffffffff80600000
1da177e4
LT		 557
558#
559# Toshiba JMR-TX3927 board
560#
561core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
562 arch/mips/jmr3927/common/
5135b0cd 563cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
1da177e4
LT		 564load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
565
566#
567# Toshiba RBTX4927 board or
568# Toshiba RBTX4937 board
569#
570core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
571core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
5ddcb3c3 572cflags-$(CONFIG_TOSHIBA_RBTX4927) += -Iinclude/asm-mips/mach-tx49xx
1da177e4
LT		 573load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
574
23fbee9d
RB		 575#
576# Toshiba RBTX4938 board
577#
578core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
579core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
5ddcb3c3 580cflags-$(CONFIG_TOSHIBA_RBTX4938) += -Iinclude/asm-mips/mach-tx49xx
23fbee9d
RB		 581load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
582
1da177e4
LT		 583cflags-y += -Iinclude/asm-mips/mach-generic
584drivers-$(CONFIG_PCI) += arch/mips/pci/
585
875d43e7 586ifdef CONFIG_32BIT
1da177e4
LT		 587ifdef CONFIG_CPU_LITTLE_ENDIAN
588JIFFIES = jiffies_64
589else
590JIFFIES = jiffies_64 + 4
591endif
592else
593JIFFIES = jiffies_64
594endif
595
596AFLAGS += $(cflags-y)
9267a30d
MSJ		 597CFLAGS += $(cflags-y) \
598 -D"VMLINUX_LOAD_ADDRESS=$(load-y)"
1da177e4
LT		 599
600LDFLAGS += -m $(ld-emul)
601
59b3e8e9
RB		 602ifdef CONFIG_MIPS
603CHECKFLAGS += $(shell $(CC) $(CFLAGS) -dM -E -xc /dev/null | \
48c35b2d 604 egrep -vw '__GNUC_(|MINOR_|PATCHLEVEL_)_' | \
2a2c3e45
AN		 605 sed -e 's/^\#define /-D/' -e "s/ /='/" -e "s/$$/'/")
606ifdef CONFIG_64BIT
607CHECKFLAGS += -m64
608endif
59b3e8e9
RB		 609endif
610
1da177e4
LT		 611OBJCOPYFLAGS += --remove-section=.reginfo
612
613#
614# Choosing incompatible machines durings configuration will result in
615# error messages during linking. Select a default linkscript if
616# none has been choosen above.
617#
618
619CPPFLAGS_vmlinux.lds := \
620 $(CFLAGS) \
621 -D"LOADADDR=$(load-y)" \
622 -D"JIFFIES=$(JIFFIES)" \
623 -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
624
625head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
626
627libs-y += arch/mips/lib/
1da177e4
LT		 628
629core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
630
631drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
632
1da177e4
LT		 633#
634# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
635# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
636# convert to ECOFF using elf2ecoff.
637#
638vmlinux.32: vmlinux
639 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
640
641#
642# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
643# ELF files from 32-bit files by conversion.
644#
645vmlinux.64: vmlinux
646 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
647
648makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
649
650ifdef CONFIG_BOOT_ELF32
651all: $(vmlinux-32)
652endif
653
654ifdef CONFIG_BOOT_ELF64
655all: $(vmlinux-64)
656endif
657
149f60b3
RB		 658ifdef CONFIG_MIPS_ATLAS
659all: vmlinux.srec
660endif
661
662ifdef CONFIG_MIPS_MALTA
663all: vmlinux.srec
664endif
665
666ifdef CONFIG_MIPS_SEAD
667all: vmlinux.srec
668endif
669
154b500b
RB		 670ifdef CONFIG_QEMU
671all: vmlinux.bin
672endif
673
14b36af4 674ifdef CONFIG_SNI_RM
1da177e4
LT		 675all: vmlinux.ecoff
676endif
677
154b500b
RB		 678vmlinux.bin: $(vmlinux-32)
679 +@$(call makeboot,$@)
680
b8828d3e 681vmlinux.ecoff: $(vmlinux-32)
1da177e4
LT		 682 +@$(call makeboot,$@)
683
684vmlinux.srec: $(vmlinux-32)
685 +@$(call makeboot,$@)
686
687CLEAN_FILES += vmlinux.ecoff \
b8828d3e 688 vmlinux.srec
1da177e4 689
e48ce6b8
AN		 690archprepare:
691ifdef CONFIG_MIPS32_N32
692 @echo ' Checking missing-syscalls for N32'
693 $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=n32"
694endif
695ifdef CONFIG_MIPS32_O32
696 @echo ' Checking missing-syscalls for O32'
697 $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32"
698endif
699
1da177e4
LT		 700archclean:
701 @$(MAKE) $(clean)=arch/mips/boot
1da177e4 702
048eb582 703CLEAN_FILES += vmlinux.32 \
1da177e4
LT		 704 vmlinux.64 \
705 vmlinux.ecoff
Linux kernel - Deliverables
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