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[MIPS] Fix timer setup for Jazz
[deliverable/linux.git] / arch / mips / Makefile
CommitLineData
1da177e4
LT		 1#
2# This file is subject to the terms and conditions of the GNU General Public
3# License. See the file "COPYING" in the main directory of this archive
4# for more details.
5#
6# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7# DECStation modifications by Paul M. Antoine, 1996
8# Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
9#
10# This file is included by the global makefile so that you can add your own
11# architecture-specific flags and dependencies. Remember to do have actions
12# for "archclean" cleaning up for this architecture.
13#
14
1da177e4
LT		 15cflags-y :=
16
17#
18# Select the object file format to substitute into the linker script.
19#
20ifdef CONFIG_CPU_LITTLE_ENDIAN
2132bit-tool-prefix = mipsel-linux-
2264bit-tool-prefix = mips64el-linux-
2332bit-bfd = elf32-tradlittlemips
2464bit-bfd = elf64-tradlittlemips
2532bit-emul = elf32ltsmip
2664bit-emul = elf64ltsmip
27else
2832bit-tool-prefix = mips-linux-
2964bit-tool-prefix = mips64-linux-
3032bit-bfd = elf32-tradbigmips
3164bit-bfd = elf64-tradbigmips
3232bit-emul = elf32btsmip
3364bit-emul = elf64btsmip
34endif
35
875d43e7 36ifdef CONFIG_32BIT
1da177e4
LT		 37tool-prefix = $(32bit-tool-prefix)
38UTS_MACHINE := mips
39endif
875d43e7 40ifdef CONFIG_64BIT
1da177e4
LT		 41tool-prefix = $(64bit-tool-prefix)
42UTS_MACHINE := mips64
43endif
44
45ifdef CONFIG_CROSSCOMPILE
46CROSS_COMPILE := $(tool-prefix)
47endif
48
8145095c 49ifdef CONFIG_32BIT
1da177e4
LT		 50ld-emul = $(32bit-emul)
51vmlinux-32 = vmlinux
52vmlinux-64 = vmlinux.64
59b3e8e9
RB		 53
54cflags-y += -mabi=32
8145095c 55endif
1da177e4 56
8145095c 57ifdef CONFIG_64BIT
8145095c
RB		 58ld-emul = $(64bit-emul)
59vmlinux-32 = vmlinux.32
60vmlinux-64 = vmlinux
61
59b3e8e9
RB		 62cflags-y += -mabi=64
63ifdef CONFIG_BUILD_ELF64
8145095c 64cflags-y += $(call cc-option,-mno-explicit-relocs)
59b3e8e9
RB		 65else
66cflags-y += $(call cc-option,-msym32)
67endif
1da177e4
LT		 68endif
69
59b3e8e9 70
1da177e4
LT		 71#
72# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
73# code since it only slows down the whole thing. At some point we might make
74# use of global pointer optimizations but their use of $28 conflicts with
75# the current pointer optimization.
76#
77# The DECStation requires an ECOFF kernel for remote booting, other MIPS
78# machines may also. Since BFD is incredibly buggy with respect to
79# crossformat linking we rely on the elf2ecoff tool for format conversion.
80#
1da177e4 81cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
6218cf44 82cflags-y += -msoft-float
9f83d839 83LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
1da177e4
LT		 84MODFLAGS += -mlong-calls
85
72fbfb26
RB		 86cflags-y += -ffreestanding
87
f425a6dc
TS		 88#
89# We explicitly add the endianness specifier if needed, this allows
90# to compile kernels with a toolchain for the other endianness. We
91# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
92# when fed the toolchain default!
93#
59b3e8e9
RB		 94cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB -D__MIPSEB__)
95cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL -D__MIPSEL__)
f425a6dc 96
9007c9a2
RB		 97cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
98 -fno-omit-frame-pointer
1da177e4 99
1da177e4
LT		 100#
101# CPU-dependent compiler/assembler options for optimization.
102#
59b3e8e9
RB		 103cflags-$(CONFIG_CPU_R3000) += -march=r3000
104cflags-$(CONFIG_CPU_TX39XX) += -march=r3900
105cflags-$(CONFIG_CPU_R6000) += -march=r6000 -Wa,--trap
106cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap
107cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
108cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
109cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
9200c0b2 110cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
59b3e8e9 111 -Wa,-mips32 -Wa,--trap
9200c0b2 112cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
59b3e8e9 113 -Wa,-mips32r2 -Wa,--trap
9200c0b2 114cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
59b3e8e9 115 -Wa,-mips64 -Wa,--trap
9200c0b2 116cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
59b3e8e9
RB		 117 -Wa,-mips64r2 -Wa,--trap
118cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap
c9e321e0 119cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \
1da177e4 120 -Wa,--trap
c9e321e0 121cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \
1da177e4 122 -Wa,--trap
59b3e8e9 123cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \
1da177e4 124 -Wa,--trap
59b3e8e9 125cflags-$(CONFIG_CPU_RM9000) += $(call cc-option,-march=rm9000,-march=r5000) \
1da177e4 126 -Wa,--trap
59b3e8e9 127cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=r5000) \
1da177e4 128 -Wa,--trap
59b3e8e9
RB		 129cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap
130cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \
1da177e4
LT		 131 -Wa,--trap
132
133ifdef CONFIG_CPU_SB1
134ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
135MODFLAGS += -msb1-pass1-workarounds
136endif
137endif
138
139#
140# Firmware support
141#
142libs-$(CONFIG_ARC) += arch/mips/arc/
143libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
144
145#
146# Board-dependent options and extra files
147#
148
149#
150# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
151#
152core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
153cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
154load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
155
156#
157# Common Alchemy Au1x00 stuff
158#
159core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
160cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
161
162#
163# AMD Alchemy Pb1000 eval board
164#
165libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
166cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
167load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
168
169#
170# AMD Alchemy Pb1100 eval board
171#
172libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
173cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
174load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
175
176#
177# AMD Alchemy Pb1500 eval board
178#
179libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
180cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
181load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
182
183#
184# AMD Alchemy Pb1550 eval board
185#
186libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
187cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
188load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
189
e3ad1c23
PP		 190#
191# AMD Alchemy Pb1200 eval board
192#
193libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
194cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
195load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
196
1da177e4
LT		 197#
198# AMD Alchemy Db1000 eval board
199#
200libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
201cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
202load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
203
204#
205# AMD Alchemy Db1100 eval board
206#
207libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
208cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
209load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
210
211#
212# AMD Alchemy Db1500 eval board
213#
214libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
215cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
216load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
217
218#
219# AMD Alchemy Db1550 eval board
220#
221libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
222cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
223load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
224
e3ad1c23
PP		 225#
226# AMD Alchemy Db1200 eval board
227#
228libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
229cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
230load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
231
1da177e4
LT		 232#
233# AMD Alchemy Bosporus eval board
234#
235libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
236cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
237load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
238
239#
240# AMD Alchemy Mirage eval board
241#
242libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
243cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
244load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
245
246#
247# 4G-Systems eval board
248#
249libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
250load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
251
252#
253# MyCable eval board
254#
255libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
256load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
257
258#
259# Cobalt Server
260#
261core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
11ed6d5b 262cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
1da177e4
LT		 263load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
264
265#
266# DECstation family
267#
268core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
269cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
270libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
271load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
272CLEAN_FILES += drivers/tc/lk201-map.c
273
274#
275# Galileo EV64120 Board
276#
277core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
278core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
279cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
280load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
281
a240a469
MZ		 282#
283# Wind River PPMC Board (4KC + GT64120)
284#
285core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/
286cflags-$(CONFIG_WR_PPMC) += -Iinclude/asm-mips/mach-wrppmc
287load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
288
1da177e4
LT		 289#
290# For all MIPS, Inc. eval boards
291#
292core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
293
294#
295# MIPS Atlas board
296#
297core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
298cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
299cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
300load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
301
302#
303# MIPS Malta board
304#
305core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
306cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
307load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
308
309#
310# MIPS SEAD board
311#
312core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
09f451bf 313cflags-$(CONFIG_MIPS_SEAD) += -Iinclude/asm-mips/mach-mips
1da177e4
LT		 314load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
315
c78cbf49
RB		 316#
317# MIPS SIM
318#
319core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
320cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
321load-$(CONFIG_MIPS_SIM) += 0x80100000
322
1da177e4
LT		 323#
324# Momentum Ocelot board
325#
326# The Ocelot setup.o must be linked early - it does the ioremap() for the
327# mips_io_port_base.
328#
329core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
330 arch/mips/gt64120/momenco_ocelot/
331cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
332load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
333
334#
335# Momentum Ocelot-G board
336#
337# The Ocelot-G setup.o must be linked early - it does the ioremap() for the
338# mips_io_port_base.
339#
340core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
341load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000
342
343#
344# Momentum Ocelot-C and -CS boards
345#
346# The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
347# mips_io_port_base.
348core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
349load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
350
351#
352# PMC-Sierra Yosemite
353#
354core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
355cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
356load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
357
14cd8015 358#
07119621
RB		 359# Qemu simulating MIPS32 4Kc
360#
361core-$(CONFIG_QEMU) += arch/mips/qemu/
362cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
363load-$(CONFIG_QEMU) += 0xffffffff80010000
364
1da177e4
LT		 365#
366# Momentum Ocelot-3
367#
368core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
369cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
370load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
371
35189fad
RB		 372#
373# Basler eXcite
374#
375core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/
376cflags-$(CONFIG_BASLER_EXCITE) += -Iinclude/asm-mips/mach-excite
377load-$(CONFIG_BASLER_EXCITE) += 0x80100000
378
1da177e4
LT		 379#
380# Momentum Jaguar ATX
381#
382core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
383cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja
384#ifdef CONFIG_JAGUAR_DMALOW
385#load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
386#else
387load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000
388#endif
389
390#
391# NEC DDB
392#
393core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
394
1da177e4
LT		 395#
396# NEC DDB Vrc-5477
397#
398core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
399load-$(CONFIG_DDB5477) += 0xffffffff80100000
400
401core-$(CONFIG_LASAT) += arch/mips/lasat/
402cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
403load-$(CONFIG_LASAT) += 0xffffffff80000000
404
1da177e4
LT		 405#
406# Common VR41xx
407#
408core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
409cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
410
411#
412# NEC VR4133
413#
414core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
415load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
416
417#
418# ZAO Networks Capcella (VR4131)
419#
1da177e4
LT		 420load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
421
422#
423# Victor MP-C303/304 (VR4122)
424#
1da177e4
LT		 425load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
426
427#
428# IBM WorkPad z50 (VR4121)
429#
430core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
431load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
432
433#
434# CASIO CASSIPEIA E-55/65 (VR4111)
435#
436core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
437load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
438
439#
63b799f9 440# TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
1da177e4 441#
63b799f9 442load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
1da177e4 443
bdf21b18
PP		 444#
445# Common Philips PNX8550
446#
447core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
448cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
449
450#
451# Philips PNX8550 JBS board
452#
453libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
454#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
455load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
456
355c471f 457# NEC EMMA2RH boards
458#
459core-$(CONFIG_EMMA2RH) += arch/mips/emma2rh/common/
460cflags-$(CONFIG_EMMA2RH) += -Iinclude/asm-mips/mach-emma2rh
461
462# NEC EMMA2RH Mark-eins
463core-$(CONFIG_MARKEINS) += arch/mips/emma2rh/markeins/
464load-$(CONFIG_MARKEINS) += 0xffffffff88100000
465
1da177e4
LT		 466#
467# SGI IP22 (Indy/Indigo2)
468#
469# Set the load address to >= 0xffffffff88069000 if you want to leave space for
470# symmon, 0xffffffff80002000 for production kernels. Note that the value must
471# be aligned to a multiple of the kernel stack size or the handling of the
472# current variable will break so for 64-bit kernels we have to raise the start
473# address by 8kb.
474#
475core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
476cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
875d43e7 477ifdef CONFIG_32BIT
1da177e4
LT		 478load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
479endif
875d43e7 480ifdef CONFIG_64BIT
1da177e4
LT		 481load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
482endif
483
484#
485# SGI-IP27 (Origin200/2000)
486#
487# Set the load address to >= 0xc000000000300000 if you want to leave space for
488# symmon, 0xc00000000001c000 for production kernels. Note that the value must
489# be 16kb aligned or the handling of the current variable will break.
490#
491ifdef CONFIG_SGI_IP27
492core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
493cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
1da177e4
LT		 494ifdef CONFIG_MAPPED_KERNEL
495load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
496OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
497dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
498else
499load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
500OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
501endif
1da177e4
LT		 502endif
503
504#
505# SGI-IP32 (O2)
506#
507# Set the load address to >= 80069000 if you want to leave space for symmon,
508# 0xffffffff80004000 for production kernels. Note that the value must be aligned to
509# a multiple of the kernel stack size or the handling of the current variable
510# will break.
511#
512core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
513cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
514load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
515
516#
517# Sibyte SB1250 SOC
518#
519# This is a LIB so that it links at the end, and initcalls are later
520# the sequence; but it is built as an object so that modules don't get
521# removed (as happens, even if they have __initcall/module_init)
522#
523core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
f137e463
AI		 524cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
525 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
1da177e4
LT		 526
527core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
f137e463
AI		 528cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
529 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
530
531core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
532cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
533 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
534
535core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
536cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
537 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
1da177e4
LT		 538
539#
540# Sibyte BCM91120x (Carmel) board
541# Sibyte BCM91120C (CRhine) board
542# Sibyte BCM91125C (CRhone) board
543# Sibyte BCM91125E (Rhone) board
544# Sibyte SWARM board
9a6dcea1 545# Sibyte BCM91x80 (BigSur) board
1da177e4
LT		 546#
547libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
548load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
549libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
550load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
551libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
552load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
553libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
554load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
555libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
556load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
557libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
558load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
9a6dcea1
AI		 559libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
560load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
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LT		 561
562#
563# SNI RM200 PCI
564#
565core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
566cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
567load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000
568
569#
570# Toshiba JMR-TX3927 board
571#
572core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
573 arch/mips/jmr3927/common/
5135b0cd 574cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
1da177e4
LT		 575load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
576
577#
578# Toshiba RBTX4927 board or
579# Toshiba RBTX4937 board
580#
581core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
582core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
583load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
584
23fbee9d
RB		 585#
586# Toshiba RBTX4938 board
587#
588core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
589core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
590load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
591
1da177e4
LT		 592cflags-y += -Iinclude/asm-mips/mach-generic
593drivers-$(CONFIG_PCI) += arch/mips/pci/
594
875d43e7 595ifdef CONFIG_32BIT
1da177e4
LT		 596ifdef CONFIG_CPU_LITTLE_ENDIAN
597JIFFIES = jiffies_64
598else
599JIFFIES = jiffies_64 + 4
600endif
601else
602JIFFIES = jiffies_64
603endif
604
605AFLAGS += $(cflags-y)
606CFLAGS += $(cflags-y)
607
608LDFLAGS += -m $(ld-emul)
609
59b3e8e9
RB		 610ifdef CONFIG_MIPS
611CHECKFLAGS += $(shell $(CC) $(CFLAGS) -dM -E -xc /dev/null | \
612 egrep -vw '__GNUC_(MAJOR|MINOR|PATCHLEVEL)__' | \
2a2c3e45
AN		 613 sed -e 's/^\#define /-D/' -e "s/ /='/" -e "s/$$/'/")
614ifdef CONFIG_64BIT
615CHECKFLAGS += -m64
616endif
59b3e8e9
RB		 617endif
618
1da177e4
LT		 619OBJCOPYFLAGS += --remove-section=.reginfo
620
621#
622# Choosing incompatible machines durings configuration will result in
623# error messages during linking. Select a default linkscript if
624# none has been choosen above.
625#
626
627CPPFLAGS_vmlinux.lds := \
628 $(CFLAGS) \
629 -D"LOADADDR=$(load-y)" \
630 -D"JIFFIES=$(JIFFIES)" \
631 -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
632
633head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
634
635libs-y += arch/mips/lib/
875d43e7
RB		 636libs-$(CONFIG_32BIT) += arch/mips/lib-32/
637libs-$(CONFIG_64BIT) += arch/mips/lib-64/
1da177e4
LT		 638
639core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
640
641drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
642
643ifdef CONFIG_LASAT
644rom.bin rom.sw: vmlinux
7c6b155f 645 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
1da177e4
LT		 646endif
647
648#
649# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
650# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
651# convert to ECOFF using elf2ecoff.
652#
653vmlinux.32: vmlinux
654 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
655
656#
657# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
658# ELF files from 32-bit files by conversion.
659#
660vmlinux.64: vmlinux
661 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
662
663makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
664
665ifdef CONFIG_BOOT_ELF32
666all: $(vmlinux-32)
667endif
668
669ifdef CONFIG_BOOT_ELF64
670all: $(vmlinux-64)
671endif
672
149f60b3
RB		 673ifdef CONFIG_MIPS_ATLAS
674all: vmlinux.srec
675endif
676
677ifdef CONFIG_MIPS_MALTA
678all: vmlinux.srec
679endif
680
681ifdef CONFIG_MIPS_SEAD
682all: vmlinux.srec
683endif
684
154b500b
RB		 685ifdef CONFIG_QEMU
686all: vmlinux.bin
687endif
688
1da177e4
LT		 689ifdef CONFIG_SNI_RM200_PCI
690all: vmlinux.ecoff
691endif
692
154b500b
RB		 693vmlinux.bin: $(vmlinux-32)
694 +@$(call makeboot,$@)
695
b8828d3e 696vmlinux.ecoff: $(vmlinux-32)
1da177e4
LT		 697 +@$(call makeboot,$@)
698
699vmlinux.srec: $(vmlinux-32)
700 +@$(call makeboot,$@)
701
702CLEAN_FILES += vmlinux.ecoff \
b8828d3e 703 vmlinux.srec
1da177e4
LT		 704
705archclean:
706 @$(MAKE) $(clean)=arch/mips/boot
707 @$(MAKE) $(clean)=arch/mips/lasat
708
048eb582 709CLEAN_FILES += vmlinux.32 \
1da177e4
LT		 710 vmlinux.64 \
711 vmlinux.ecoff
Linux kernel - Deliverables
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