MIPS: Alchemy: Stop IRQ name sharing
[deliverable/linux.git] / arch / mips / alchemy / devboards / db1x00 / platform.c
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1/*
2 * DBAu1xxx board platform device registration
3 *
4 * Copyright (C) 2009 Manuel Lauss
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/init.h>
22#include <linux/platform_device.h>
23
24#include <asm/mach-au1x00/au1xxx.h>
25#include "../platform.h"
26
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27/* DB1xxx PCMCIA interrupt sources:
28 * CD0/1 GPIO0/3
29 * STSCHG0/1 GPIO1/4
30 * CARD0/1 GPIO2/5
31 * Db1550: 0/1, 21/22, 3/5
32 */
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33
34#define DB1XXX_HAS_PCMCIA
35
36#if defined(CONFIG_MIPS_DB1000)
37#define DB1XXX_PCMCIA_CD0 AU1000_GPIO0_INT
38#define DB1XXX_PCMCIA_STSCHG0 AU1000_GPIO1_INT
39#define DB1XXX_PCMCIA_CARD0 AU1000_GPIO2_INT
40#define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT
41#define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT
42#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT
43#elif defined(CONFIG_MIPS_DB1100)
44#define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT
45#define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT
46#define DB1XXX_PCMCIA_CARD0 AU1100_GPIO2_INT
47#define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT
48#define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT
49#define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT
50#elif defined(CONFIG_MIPS_DB1500)
51#define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT
52#define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT
53#define DB1XXX_PCMCIA_CARD0 AU1500_GPIO2_INT
54#define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT
55#define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT
56#define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT
57#elif defined(CONFIG_MIPS_DB1550)
58#define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT
59#define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT
60#define DB1XXX_PCMCIA_CARD0 AU1550_GPIO3_INT
61#define DB1XXX_PCMCIA_CD1 AU1550_GPIO1_INT
62#define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT
63#define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT
27dd65ac 64#else
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65/* other board: no PCMCIA */
66#undef DB1XXX_HAS_PCMCIA
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67#endif
68
69static int __init db1xxx_dev_init(void)
70{
71#ifdef DB1XXX_HAS_PCMCIA
72 db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS,
73 PCMCIA_ATTR_PSEUDO_PHYS + 0x00040000 - 1,
74 PCMCIA_MEM_PSEUDO_PHYS,
75 PCMCIA_MEM_PSEUDO_PHYS + 0x00040000 - 1,
76 PCMCIA_IO_PSEUDO_PHYS,
77 PCMCIA_IO_PSEUDO_PHYS + 0x00001000 - 1,
78 DB1XXX_PCMCIA_CARD0,
79 DB1XXX_PCMCIA_CD0,
80 /*DB1XXX_PCMCIA_STSCHG0*/0,
81 0,
82 0);
83
84 db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS + 0x00400000,
85 PCMCIA_ATTR_PSEUDO_PHYS + 0x00440000 - 1,
86 PCMCIA_MEM_PSEUDO_PHYS + 0x00400000,
87 PCMCIA_MEM_PSEUDO_PHYS + 0x00440000 - 1,
88 PCMCIA_IO_PSEUDO_PHYS + 0x00400000,
89 PCMCIA_IO_PSEUDO_PHYS + 0x00401000 - 1,
90 DB1XXX_PCMCIA_CARD1,
91 DB1XXX_PCMCIA_CD1,
92 /*DB1XXX_PCMCIA_STSCHG1*/0,
93 0,
94 1);
95#endif
96 return 0;
97}
98device_initcall(db1xxx_dev_init);
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