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1da177e4 | 1 | /* |
be1c3c1e SS |
2 | * Copyright 2002, 2008 MontaVista Software Inc. |
3 | * Author: MontaVista Software, Inc. <source@mvista.com> | |
1da177e4 LT |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License as published by the | |
7 | * Free Software Foundation; either version 2 of the License, or (at your | |
8 | * option) any later version. | |
9 | * | |
10 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | |
11 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
12 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | |
13 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
14 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
15 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | |
16 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
17 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
18 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
19 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along | |
22 | * with this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | */ | |
ce28f94c | 25 | |
1da177e4 | 26 | #include <linux/init.h> |
1da177e4 LT |
27 | #include <linux/delay.h> |
28 | ||
1da177e4 LT |
29 | #include <asm/mach-au1x00/au1000.h> |
30 | #include <asm/mach-pb1x00/pb1100.h> | |
31 | ||
23ba25d5 ML |
32 | |
33 | struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { | |
34 | { AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card Fully_Inserted# */ | |
35 | { AU1000_GPIO_10, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card STSCHG# */ | |
36 | { AU1000_GPIO_11, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card IRQ# */ | |
37 | { AU1000_GPIO_13, INTC_INT_LOW_LEVEL, 0 }, /* DC_IRQ# */ | |
38 | }; | |
39 | ||
40 | int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map); | |
41 | ||
42 | ||
43 | const char *get_system_type(void) | |
44 | { | |
45 | return "Alchemy Pb1100"; | |
46 | } | |
47 | ||
49a89efb | 48 | void board_reset(void) |
1da177e4 | 49 | { |
be1c3c1e SS |
50 | /* Hit BCSR.RST_VDDI[SOFT_RESET] */ |
51 | au_writel(0x00000000, PB1100_RST_VDDI); | |
1da177e4 LT |
52 | } |
53 | ||
54 | void __init board_setup(void) | |
55 | { | |
be1c3c1e | 56 | volatile void __iomem *base = (volatile void __iomem *)0xac000000UL; |
1da177e4 | 57 | |
be1c3c1e | 58 | /* Set AUX clock to 12 MHz * 8 = 96 MHz */ |
1da177e4 LT |
59 | au_writel(8, SYS_AUXPLL); |
60 | au_writel(0, SYS_PININPUTEN); | |
61 | udelay(100); | |
62 | ||
f708631a | 63 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
3f21cdee RB |
64 | { |
65 | u32 pin_func, sys_freqctrl, sys_clksrc; | |
66 | ||
be1c3c1e SS |
67 | /* Configure pins GPIO[14:9] as GPIO */ |
68 | pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3; | |
3f21cdee | 69 | |
be1c3c1e | 70 | /* Zero and disable FREQ2 */ |
3f21cdee RB |
71 | sys_freqctrl = au_readl(SYS_FREQCTRL0); |
72 | sys_freqctrl &= ~0xFFF00000; | |
73 | au_writel(sys_freqctrl, SYS_FREQCTRL0); | |
74 | ||
be1c3c1e | 75 | /* Zero and disable USBH/USBD/IrDA clock */ |
3f21cdee | 76 | sys_clksrc = au_readl(SYS_CLKSRC); |
be1c3c1e | 77 | sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK); |
3f21cdee RB |
78 | au_writel(sys_clksrc, SYS_CLKSRC); |
79 | ||
80 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | |
81 | sys_freqctrl &= ~0xFFF00000; | |
82 | ||
83 | sys_clksrc = au_readl(SYS_CLKSRC); | |
be1c3c1e | 84 | sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK); |
3f21cdee | 85 | |
be1c3c1e SS |
86 | /* FREQ2 = aux / 2 = 48 MHz */ |
87 | sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | | |
88 | SYS_FC_FE2 | SYS_FC_FS2; | |
3f21cdee RB |
89 | au_writel(sys_freqctrl, SYS_FREQCTRL0); |
90 | ||
91 | /* | |
be1c3c1e | 92 | * Route 48 MHz FREQ2 into USBH/USBD/IrDA |
3f21cdee | 93 | */ |
be1c3c1e | 94 | sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MIR_BIT; |
3f21cdee RB |
95 | au_writel(sys_clksrc, SYS_CLKSRC); |
96 | ||
be1c3c1e | 97 | /* Setup the static bus controller */ |
3f21cdee RB |
98 | au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ |
99 | au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ | |
100 | au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ | |
101 | ||
be1c3c1e SS |
102 | /* |
103 | * Get USB Functionality pin state (device vs host drive pins). | |
104 | */ | |
105 | pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB; | |
106 | /* 2nd USB port is USB host. */ | |
107 | pin_func |= SYS_PF_USB; | |
3f21cdee RB |
108 | au_writel(pin_func, SYS_PINFUNC); |
109 | } | |
f708631a | 110 | #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ |
1da177e4 LT |
111 | |
112 | /* Enable sys bus clock divider when IDLE state or no bus activity. */ | |
113 | au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); | |
114 | ||
be1c3c1e | 115 | /* Enable the RTC if not already enabled. */ |
3f21cdee RB |
116 | if (!(readb(base + 0x28) & 0x20)) { |
117 | writeb(readb(base + 0x28) | 0x20, base + 0x28); | |
1da177e4 LT |
118 | au_sync(); |
119 | } | |
be1c3c1e | 120 | /* Put the clock in BCD mode. */ |
3f21cdee RB |
121 | if (readb(base + 0x2C) & 0x4) { /* reg B */ |
122 | writeb(readb(base + 0x2c) & ~0x4, base + 0x2c); | |
1da177e4 LT |
123 | au_sync(); |
124 | } | |
125 | } |