[deliverable/linux.git] / arch / mips / alchemy / mtx-1 / board_setup.c

/*
 *
 * BRIEF MODULE DESCRIPTION
 *	4G Systems MTX-1 board setup.
 *
 * Copyright 2003, 2008 MontaVista Software Inc.
 * Author: MontaVista Software, Inc. <source@mvista.com>
 *         Bruno Randolf <bruno.randolf@4g-systems.biz>
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 *
 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *  You should have received a copy of the  GNU General Public License along
 *  with this program; if not, write  to the Free Software Foundation, Inc.,
 *  675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/interrupt.h>

#include <asm/mach-au1x00/au1000.h>

#include <prom.h>

char irq_tab_alchemy[][5] __initdata = {
	[0] = { -1, INTA, INTA, INTX, INTX }, /* IDSEL 00 - AdapterA-Slot0 (top) */
	[1] = { -1, INTB, INTA, INTX, INTX }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
	[2] = { -1, INTC, INTD, INTX, INTX }, /* IDSEL 02 - AdapterB-Slot0 (top) */
	[3] = { -1, INTD, INTC, INTX, INTX }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */
	[4] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 04 - AdapterC-Slot0 (top) */
	[5] = { -1, INTB, INTA, INTX, INTX }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */
	[6] = { -1, INTC, INTD, INTX, INTX }, /* IDSEL 06 - AdapterD-Slot0 (top) */
	[7] = { -1, INTD, INTC, INTX, INTX }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */
};

extern int (*board_pci_idsel)(unsigned int devsel, int assert);
int mtx1_pci_idsel(unsigned int devsel, int assert);

void board_reset(void)
{
	/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
	au_writel(0x00000000, 0xAE00001C);
}

void __init board_setup(void)
{
#ifdef CONFIG_SERIAL_8250_CONSOLE
	char *argptr;
	argptr = prom_getcmdline();
	argptr = strstr(argptr, "console=");
	if (argptr == NULL) {
		argptr = prom_getcmdline();
		strcat(argptr, " console=ttyS0,115200");
	}
#endif

	alchemy_gpio2_enable();

#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
	/* Enable USB power switch */
	alchemy_gpio_direction_output(204, 0);
#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */

#ifdef CONFIG_PCI
#if defined(__MIPSEB__)
	au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
#else
	au_writel(0xf, Au1500_PCI_CFG);
#endif
	board_pci_idsel = mtx1_pci_idsel;
#endif

	/* Initialize sys_pinfunc */
	au_writel(SYS_PF_NI2, SYS_PINFUNC);

	/* Initialize GPIO */
	au_writel(0xFFFFFFFF, SYS_TRIOUTCLR);
	alchemy_gpio_direction_output(0, 0);	/* Disable M66EN (PCI 66MHz) */
	alchemy_gpio_direction_output(3, 1);	/* Disable PCI CLKRUN# */
	alchemy_gpio_direction_output(1, 1);	/* Enable EXT_IO3 */
	alchemy_gpio_direction_output(5, 0);	/* Disable eth PHY TX_ER */

	/* Enable LED and set it to green */
	alchemy_gpio_direction_output(211, 1);	/* green on */
	alchemy_gpio_direction_output(212, 0);	/* red off */

	printk(KERN_INFO "4G Systems MTX-1 Board\n");
}

int
mtx1_pci_idsel(unsigned int devsel, int assert)
{
#define MTX_IDSEL_ONLY_0_AND_3 0
#if MTX_IDSEL_ONLY_0_AND_3
	if (devsel != 0 && devsel != 3) {
		printk(KERN_ERR "*** not 0 or 3\n");
		return 0;
	}
#endif

	if (assert && devsel != 0)
		/* Suppress signal to Cardbus */
		gpio_set_value(1, 0);	/* set EXT_IO3 OFF */
	else
		gpio_set_value(1, 1);	/* set EXT_IO3 ON */

	au_sync_udelay(1);
	return 1;
}

static int __init mtx1_init_irq(void)
{
	set_irq_type(AU1500_GPIO_204, IRQF_TRIGGER_HIGH);
	set_irq_type(AU1500_GPIO_201, IRQF_TRIGGER_LOW);
	set_irq_type(AU1500_GPIO_202, IRQF_TRIGGER_LOW);
	set_irq_type(AU1500_GPIO_203, IRQF_TRIGGER_LOW);
	set_irq_type(AU1500_GPIO_205, IRQF_TRIGGER_LOW);

	return 0;
}
arch_initcall(mtx1_init_irq);
Commit	Line	Data
1da177e4 LT	1	/*
	2	*
	3	* BRIEF MODULE DESCRIPTION
	4	* 4G Systems MTX-1 board setup.
	5	*
1ff1a78c SS	6	* Copyright 2003, 2008 MontaVista Software Inc.
1ff1a78c SS	7	* Author: MontaVista Software, Inc. <source@mvista.com>
1da177e4 LT	8	* Bruno Randolf <bruno.randolf@4g-systems.biz>
	9	*
	10	* This program is free software; you can redistribute it and/or modify it
	11	* under the terms of the GNU General Public License as published by the
	12	* Free Software Foundation; either version 2 of the License, or (at your
	13	* option) any later version.
	14	*
	15	* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
	16	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	17	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	18	* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
	19	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	20	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	21	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	22	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	23	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	24	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	25	*
	26	* You should have received a copy of the GNU General Public License along
	27	* with this program; if not, write to the Free Software Foundation, Inc.,
	28	* 675 Mass Ave, Cambridge, MA 02139, USA.
	29	*/
ce28f94c	30
bb706b28	31	#include <linux/gpio.h>
1da177e4	32	#include <linux/init.h>
7e50b2b7	33	#include <linux/interrupt.h>
1da177e4	34
1da177e4 LT	35	#include <asm/mach-au1x00/au1000.h>
1da177e4 LT	36
7179380e ML	37	#include <prom.h>
7179380e ML	38
7e50b2b7 ML	39	char irq_tab_alchemy[][5] __initdata = {
	40	[0] = { -1, INTA, INTA, INTX, INTX }, /* IDSEL 00 - AdapterA-Slot0 (top) */
	41	[1] = { -1, INTB, INTA, INTX, INTX }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
	42	[2] = { -1, INTC, INTD, INTX, INTX }, /* IDSEL 02 - AdapterB-Slot0 (top) */
	43	[3] = { -1, INTD, INTC, INTX, INTX }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */
	44	[4] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 04 - AdapterC-Slot0 (top) */
	45	[5] = { -1, INTB, INTA, INTX, INTX }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */
	46	[6] = { -1, INTC, INTD, INTX, INTX }, /* IDSEL 06 - AdapterD-Slot0 (top) */
	47	[7] = { -1, INTD, INTC, INTX, INTX }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */
	48	};
	49
baa545fd	50	extern int (*board_pci_idsel)(unsigned int devsel, int assert);
1ff1a78c	51	int mtx1_pci_idsel(unsigned int devsel, int assert);
baa545fd	52
49a89efb	53	void board_reset(void)
1da177e4 LT	54	{
	55	/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
	56	au_writel(0x00000000, 0xAE00001C);
	57	}
	58
	59	void __init board_setup(void)
	60	{
7179380e ML	61	#ifdef CONFIG_SERIAL_8250_CONSOLE
	62	char *argptr;
	63	argptr = prom_getcmdline();
	64	argptr = strstr(argptr, "console=");
	65	if (argptr == NULL) {
	66	argptr = prom_getcmdline();
	67	strcat(argptr, " console=ttyS0,115200");
	68	}
	69	#endif
	70
bb706b28 ML	71	alchemy_gpio2_enable();
bb706b28 ML	72
f708631a	73	#if defined(CONFIG_USB_OHCI_HCD) \|\| defined(CONFIG_USB_OHCI_HCD_MODULE)
1ff1a78c	74	/* Enable USB power switch */
bb706b28	75	alchemy_gpio_direction_output(204, 0);
f708631a	76	#endif /* defined(CONFIG_USB_OHCI_HCD) \|\| defined(CONFIG_USB_OHCI_HCD_MODULE) */
1da177e4 LT	77
	78	#ifdef CONFIG_PCI
	79	#if defined(__MIPSEB__)
1ff1a78c	80	au_writel(0xf \| (2 << 6) \| (1 << 4), Au1500_PCI_CFG);
1da177e4 LT	81	#else
	82	au_writel(0xf, Au1500_PCI_CFG);
	83	#endif
39d2211d	84	board_pci_idsel = mtx1_pci_idsel;
1da177e4 LT	85	#endif
1da177e4 LT	86
1ff1a78c SS	87	/* Initialize sys_pinfunc */
1ff1a78c SS	88	au_writel(SYS_PF_NI2, SYS_PINFUNC);
1da177e4	89
1ff1a78c SS	90	/* Initialize GPIO */
1ff1a78c SS	91	au_writel(0xFFFFFFFF, SYS_TRIOUTCLR);
bb706b28 ML	92	alchemy_gpio_direction_output(0, 0); /* Disable M66EN (PCI 66MHz) */
	93	alchemy_gpio_direction_output(3, 1); /* Disable PCI CLKRUN# */
	94	alchemy_gpio_direction_output(1, 1); /* Enable EXT_IO3 */
	95	alchemy_gpio_direction_output(5, 0); /* Disable eth PHY TX_ER */
1da177e4	96
1ff1a78c	97	/* Enable LED and set it to green */
bb706b28 ML	98	alchemy_gpio_direction_output(211, 1); /* green on */
bb706b28 ML	99	alchemy_gpio_direction_output(212, 0); /* red off */
1da177e4	100
1ff1a78c	101	printk(KERN_INFO "4G Systems MTX-1 Board\n");
1da177e4	102	}
baa545fd FF	103
	104	int
	105	mtx1_pci_idsel(unsigned int devsel, int assert)
	106	{
	107	#define MTX_IDSEL_ONLY_0_AND_3 0
	108	#if MTX_IDSEL_ONLY_0_AND_3
1ff1a78c SS	109	if (devsel != 0 && devsel != 3) {
	110	printk(KERN_ERR "*** not 0 or 3\n");
	111	return 0;
	112	}
baa545fd FF	113	#endif
baa545fd FF	114
1ff1a78c SS	115	if (assert && devsel != 0)
1ff1a78c SS	116	/* Suppress signal to Cardbus */
bb706b28	117	gpio_set_value(1, 0); /* set EXT_IO3 OFF */
1ff1a78c	118	else
bb706b28 ML	119	gpio_set_value(1, 1); /* set EXT_IO3 ON */
bb706b28 ML	120
1ff1a78c SS	121	au_sync_udelay(1);
1ff1a78c SS	122	return 1;
baa545fd	123	}
7e50b2b7 ML	124
	125	static int __init mtx1_init_irq(void)
	126	{
	127	set_irq_type(AU1500_GPIO_204, IRQF_TRIGGER_HIGH);
	128	set_irq_type(AU1500_GPIO_201, IRQF_TRIGGER_LOW);
	129	set_irq_type(AU1500_GPIO_202, IRQF_TRIGGER_LOW);
	130	set_irq_type(AU1500_GPIO_203, IRQF_TRIGGER_LOW);
	131	set_irq_type(AU1500_GPIO_205, IRQF_TRIGGER_LOW);
	132
	133	return 0;
	134	}
	135	arch_initcall(mtx1_init_irq);