Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * | |
3 | * BRIEF MODULE DESCRIPTION | |
4 | * 4G Systems MTX-1 board setup. | |
5 | * | |
1ff1a78c SS |
6 | * Copyright 2003, 2008 MontaVista Software Inc. |
7 | * Author: MontaVista Software, Inc. <source@mvista.com> | |
1da177e4 LT |
8 | * Bruno Randolf <bruno.randolf@4g-systems.biz> |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License as published by the | |
12 | * Free Software Foundation; either version 2 of the License, or (at your | |
13 | * option) any later version. | |
14 | * | |
15 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | |
16 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
17 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | |
18 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
19 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
20 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | |
21 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
22 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
24 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
25 | * | |
26 | * You should have received a copy of the GNU General Public License along | |
27 | * with this program; if not, write to the Free Software Foundation, Inc., | |
28 | * 675 Mass Ave, Cambridge, MA 02139, USA. | |
29 | */ | |
ce28f94c | 30 | |
bb706b28 | 31 | #include <linux/gpio.h> |
1da177e4 | 32 | #include <linux/init.h> |
7e50b2b7 | 33 | #include <linux/interrupt.h> |
32fd6901 | 34 | #include <linux/pm.h> |
1da177e4 | 35 | |
32fd6901 | 36 | #include <asm/reboot.h> |
1da177e4 LT |
37 | #include <asm/mach-au1x00/au1000.h> |
38 | ||
7179380e ML |
39 | #include <prom.h> |
40 | ||
7e50b2b7 | 41 | char irq_tab_alchemy[][5] __initdata = { |
78814465 ML |
42 | [0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 00 - AdapterA-Slot0 (top) */ |
43 | [1] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */ | |
44 | [2] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 02 - AdapterB-Slot0 (top) */ | |
45 | [3] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */ | |
46 | [4] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 04 - AdapterC-Slot0 (top) */ | |
47 | [5] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */ | |
48 | [6] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 06 - AdapterD-Slot0 (top) */ | |
49 | [7] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */ | |
7e50b2b7 ML |
50 | }; |
51 | ||
baa545fd | 52 | extern int (*board_pci_idsel)(unsigned int devsel, int assert); |
1ff1a78c | 53 | int mtx1_pci_idsel(unsigned int devsel, int assert); |
baa545fd | 54 | |
32fd6901 | 55 | static void mtx1_reset(char *c) |
1da177e4 LT |
56 | { |
57 | /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ | |
58 | au_writel(0x00000000, 0xAE00001C); | |
59 | } | |
60 | ||
32fd6901 ML |
61 | static void mtx1_power_off(void) |
62 | { | |
32fd6901 | 63 | while (1) |
36f217d9 RB |
64 | asm volatile ( |
65 | " .set mips32 \n" | |
66 | " wait \n" | |
67 | " .set mips0 \n"); | |
32fd6901 ML |
68 | } |
69 | ||
1da177e4 LT |
70 | void __init board_setup(void) |
71 | { | |
f708631a | 72 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
1ff1a78c | 73 | /* Enable USB power switch */ |
bb706b28 | 74 | alchemy_gpio_direction_output(204, 0); |
f708631a | 75 | #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ |
1da177e4 LT |
76 | |
77 | #ifdef CONFIG_PCI | |
78 | #if defined(__MIPSEB__) | |
1ff1a78c | 79 | au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG); |
1da177e4 LT |
80 | #else |
81 | au_writel(0xf, Au1500_PCI_CFG); | |
82 | #endif | |
39d2211d | 83 | board_pci_idsel = mtx1_pci_idsel; |
1da177e4 LT |
84 | #endif |
85 | ||
1ff1a78c SS |
86 | /* Initialize sys_pinfunc */ |
87 | au_writel(SYS_PF_NI2, SYS_PINFUNC); | |
1da177e4 | 88 | |
1ff1a78c SS |
89 | /* Initialize GPIO */ |
90 | au_writel(0xFFFFFFFF, SYS_TRIOUTCLR); | |
bb706b28 ML |
91 | alchemy_gpio_direction_output(0, 0); /* Disable M66EN (PCI 66MHz) */ |
92 | alchemy_gpio_direction_output(3, 1); /* Disable PCI CLKRUN# */ | |
93 | alchemy_gpio_direction_output(1, 1); /* Enable EXT_IO3 */ | |
94 | alchemy_gpio_direction_output(5, 0); /* Disable eth PHY TX_ER */ | |
1da177e4 | 95 | |
1ff1a78c | 96 | /* Enable LED and set it to green */ |
bb706b28 ML |
97 | alchemy_gpio_direction_output(211, 1); /* green on */ |
98 | alchemy_gpio_direction_output(212, 0); /* red off */ | |
1da177e4 | 99 | |
32fd6901 ML |
100 | pm_power_off = mtx1_power_off; |
101 | _machine_halt = mtx1_power_off; | |
102 | _machine_restart = mtx1_reset; | |
103 | ||
1ff1a78c | 104 | printk(KERN_INFO "4G Systems MTX-1 Board\n"); |
1da177e4 | 105 | } |
baa545fd FF |
106 | |
107 | int | |
108 | mtx1_pci_idsel(unsigned int devsel, int assert) | |
109 | { | |
b3b3c176 BR |
110 | /* This function is only necessary to support a proprietary Cardbus |
111 | * adapter on the mtx-1 "singleboard" variant. It triggers a custom | |
112 | * logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals. | |
113 | */ | |
1ff1a78c SS |
114 | if (assert && devsel != 0) |
115 | /* Suppress signal to Cardbus */ | |
98a0f86a | 116 | alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */ |
1ff1a78c | 117 | else |
98a0f86a | 118 | alchemy_gpio_set_value(1, 1); /* set EXT_IO3 ON */ |
bb706b28 | 119 | |
98a0f86a | 120 | udelay(1); |
1ff1a78c | 121 | return 1; |
baa545fd | 122 | } |
7e50b2b7 ML |
123 | |
124 | static int __init mtx1_init_irq(void) | |
125 | { | |
78814465 ML |
126 | set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH); |
127 | set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW); | |
128 | set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW); | |
129 | set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW); | |
130 | set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW); | |
7e50b2b7 ML |
131 | |
132 | return 0; | |
133 | } | |
134 | arch_initcall(mtx1_init_irq); |