MIPS: Alchemy: get rid of common/reset.c
[deliverable/linux.git] / arch / mips / alchemy / xxs1500 / board_setup.c
CommitLineData
1da177e4 1/*
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2 * Copyright 2000-2003, 2008 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc. <source@mvista.com>
1da177e4
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4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
ce28f94c 25
b6c9f105 26#include <linux/gpio.h>
1da177e4 27#include <linux/init.h>
7e50b2b7 28#include <linux/interrupt.h>
1da177e4 29#include <linux/delay.h>
32fd6901 30#include <linux/pm.h>
1da177e4 31
32fd6901 32#include <asm/reboot.h>
f9e8b782 33#include <asm/mach-au1x00/au1000.h>
1da177e4 34
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35#include <prom.h>
36
32fd6901 37static void xxs1500_reset(char *c)
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38{
39 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
40 au_writel(0x00000000, 0xAE00001C);
41}
42
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43static void xxs1500_power_off(void)
44{
45 printk(KERN_ALERT "It's now safe to remove power\n");
46 while (1)
47 asm volatile (".set mips3 ; wait ; .set mips1");
48}
49
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50void __init board_setup(void)
51{
52 u32 pin_func;
42a3b4f2 53
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54#ifdef CONFIG_SERIAL_8250_CONSOLE
55 char *argptr;
56 argptr = prom_getcmdline();
57 argptr = strstr(argptr, "console=");
58 if (argptr == NULL) {
59 argptr = prom_getcmdline();
60 strcat(argptr, " console=ttyS0,115200");
61 }
62#endif
63
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64 pm_power_off = xxs1500_power_off;
65 _machine_halt = xxs1500_power_off;
66 _machine_restart = xxs1500_reset;
67
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68 alchemy_gpio1_input_enable();
69 alchemy_gpio2_enable();
70
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71 /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
72 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
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73 pin_func |= SYS_PF_UR3;
74 au_writel(pin_func, SYS_PINFUNC);
75
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76 /* Enable UART */
77 au_writel(0x01, UART3_ADDR + UART_MOD_CNTRL); /* clock enable (CE) */
1da177e4 78 mdelay(10);
7ff83f21 79 au_writel(0x03, UART3_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
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80 mdelay(10);
81
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82 /* Enable DTR = USB power up */
83 au_writel(0x01, UART3_ADDR + UART_MCR); /* UART_MCR_DTR is 0x01??? */
1da177e4 84
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85#ifdef CONFIG_PCI
86#if defined(__MIPSEB__)
7ff83f21 87 au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
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88#else
89 au_writel(0xf, Au1500_PCI_CFG);
90#endif
91#endif
92}
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93
94static int __init xxs1500_init_irq(void)
95{
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96 set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH);
97 set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW);
98 set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW);
99 set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW);
100 set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW);
101 set_irq_type(AU1500_GPIO207_INT, IRQF_TRIGGER_LOW);
7e50b2b7 102
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103 set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW);
104 set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW);
105 set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW);
106 set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW);
107 set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* CF irq */
108 set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW);
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109
110 return 0;
111}
112arch_initcall(xxs1500_init_irq);
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