Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[deliverable/linux.git] / arch / mips / ar7 / platform.c
CommitLineData
7ca5dc14
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1/*
2 * Copyright (C) 2006,2007 Felix Fietkau <nbd@openwrt.org>
3 * Copyright (C) 2006,2007 Eugene Konev <ejka@openwrt.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <linux/init.h>
21#include <linux/types.h>
22#include <linux/module.h>
23#include <linux/delay.h>
24#include <linux/dma-mapping.h>
25#include <linux/platform_device.h>
26#include <linux/mtd/physmap.h>
27#include <linux/serial.h>
28#include <linux/serial_8250.h>
29#include <linux/ioport.h>
30#include <linux/io.h>
7ca5dc14
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31#include <linux/vlynq.h>
32#include <linux/leds.h>
33#include <linux/string.h>
34#include <linux/etherdevice.h>
1e2c8d83
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35#include <linux/phy.h>
36#include <linux/phy_fixed.h>
5f3c9098 37#include <linux/gpio.h>
780019dd 38#include <linux/clk.h>
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39
40#include <asm/addrspace.h>
41#include <asm/mach-ar7/ar7.h>
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42#include <asm/mach-ar7/prom.h>
43
4d1da8c2
AC
44/*****************************************************************************
45 * VLYNQ Bus
46 ****************************************************************************/
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47struct plat_vlynq_data {
48 struct plat_vlynq_ops ops;
49 int gpio_bit;
50 int reset_bit;
51};
52
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53static int vlynq_on(struct vlynq_device *dev)
54{
4d1da8c2 55 int ret;
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56 struct plat_vlynq_data *pdata = dev->dev.platform_data;
57
4d1da8c2
AC
58 ret = gpio_request(pdata->gpio_bit, "vlynq");
59 if (ret)
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60 goto out;
61
62 ar7_device_reset(pdata->reset_bit);
63
4d1da8c2
AC
64 ret = ar7_gpio_disable(pdata->gpio_bit);
65 if (ret)
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66 goto out_enabled;
67
4d1da8c2
AC
68 ret = ar7_gpio_enable(pdata->gpio_bit);
69 if (ret)
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70 goto out_enabled;
71
4d1da8c2
AC
72 ret = gpio_direction_output(pdata->gpio_bit, 0);
73 if (ret)
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74 goto out_gpio_enabled;
75
76 msleep(50);
77
78 gpio_set_value(pdata->gpio_bit, 1);
4d1da8c2 79
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80 msleep(50);
81
82 return 0;
83
84out_gpio_enabled:
85 ar7_gpio_disable(pdata->gpio_bit);
86out_enabled:
87 ar7_device_disable(pdata->reset_bit);
88 gpio_free(pdata->gpio_bit);
89out:
4d1da8c2 90 return ret;
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91}
92
93static void vlynq_off(struct vlynq_device *dev)
94{
95 struct plat_vlynq_data *pdata = dev->dev.platform_data;
4d1da8c2 96
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97 ar7_gpio_disable(pdata->gpio_bit);
98 gpio_free(pdata->gpio_bit);
99 ar7_device_disable(pdata->reset_bit);
100}
101
4d1da8c2 102static struct resource vlynq_low_res[] = {
7ca5dc14 103 {
4d1da8c2
AC
104 .name = "regs",
105 .flags = IORESOURCE_MEM,
106 .start = AR7_REGS_VLYNQ0,
107 .end = AR7_REGS_VLYNQ0 + 0xff,
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108 },
109 {
4d1da8c2
AC
110 .name = "irq",
111 .flags = IORESOURCE_IRQ,
112 .start = 29,
113 .end = 29,
7ca5dc14 114 },
7ca5dc14 115 {
4d1da8c2
AC
116 .name = "mem",
117 .flags = IORESOURCE_MEM,
118 .start = 0x04000000,
119 .end = 0x04ffffff,
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120 },
121 {
4d1da8c2
AC
122 .name = "devirq",
123 .flags = IORESOURCE_IRQ,
124 .start = 80,
125 .end = 111,
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126 },
127};
128
4d1da8c2 129static struct resource vlynq_high_res[] = {
7ca5dc14 130 {
4d1da8c2
AC
131 .name = "regs",
132 .flags = IORESOURCE_MEM,
133 .start = AR7_REGS_VLYNQ1,
134 .end = AR7_REGS_VLYNQ1 + 0xff,
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135 },
136 {
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AC
137 .name = "irq",
138 .flags = IORESOURCE_IRQ,
139 .start = 33,
140 .end = 33,
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141 },
142 {
4d1da8c2
AC
143 .name = "mem",
144 .flags = IORESOURCE_MEM,
145 .start = 0x0c000000,
146 .end = 0x0cffffff,
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147 },
148 {
4d1da8c2
AC
149 .name = "devirq",
150 .flags = IORESOURCE_IRQ,
151 .start = 112,
152 .end = 143,
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153 },
154};
155
4d1da8c2
AC
156static struct plat_vlynq_data vlynq_low_data = {
157 .ops = {
158 .on = vlynq_on,
159 .off = vlynq_off,
7ca5dc14 160 },
4d1da8c2
AC
161 .reset_bit = 20,
162 .gpio_bit = 18,
163};
164
165static struct plat_vlynq_data vlynq_high_data = {
166 .ops = {
167 .on = vlynq_on,
168 .off = vlynq_off,
7ca5dc14 169 },
1e3fb377 170 .reset_bit = 16,
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AC
171 .gpio_bit = 19,
172};
173
174static struct platform_device vlynq_low = {
175 .id = 0,
176 .name = "vlynq",
177 .dev = {
178 .platform_data = &vlynq_low_data,
7ca5dc14 179 },
4d1da8c2
AC
180 .resource = vlynq_low_res,
181 .num_resources = ARRAY_SIZE(vlynq_low_res),
182};
183
184static struct platform_device vlynq_high = {
185 .id = 1,
186 .name = "vlynq",
187 .dev = {
188 .platform_data = &vlynq_high_data,
7ca5dc14 189 },
4d1da8c2
AC
190 .resource = vlynq_high_res,
191 .num_resources = ARRAY_SIZE(vlynq_high_res),
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192};
193
4d1da8c2
AC
194/*****************************************************************************
195 * Flash
196 ****************************************************************************/
197static struct resource physmap_flash_resource = {
198 .name = "mem",
199 .flags = IORESOURCE_MEM,
200 .start = 0x10000000,
201 .end = 0x107fffff,
202};
203
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204static const char *ar7_probe_types[] = { "ar7part", NULL };
205
4d1da8c2
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206static struct physmap_flash_data physmap_flash_data = {
207 .width = 2,
dcb96a4e 208 .part_probe_types = ar7_probe_types,
4d1da8c2
AC
209};
210
211static struct platform_device physmap_flash = {
212 .name = "physmap-flash",
213 .dev = {
214 .platform_data = &physmap_flash_data,
7ca5dc14 215 },
4d1da8c2
AC
216 .resource = &physmap_flash_resource,
217 .num_resources = 1,
218};
219
220/*****************************************************************************
221 * Ethernet
222 ****************************************************************************/
223static struct resource cpmac_low_res[] = {
7ca5dc14 224 {
4d1da8c2
AC
225 .name = "regs",
226 .flags = IORESOURCE_MEM,
227 .start = AR7_REGS_MAC0,
228 .end = AR7_REGS_MAC0 + 0x7ff,
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229 },
230 {
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231 .name = "irq",
232 .flags = IORESOURCE_IRQ,
233 .start = 27,
11454100 234 .end = 27,
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235 },
236};
237
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238static struct resource cpmac_high_res[] = {
239 {
240 .name = "regs",
241 .flags = IORESOURCE_MEM,
242 .start = AR7_REGS_MAC1,
243 .end = AR7_REGS_MAC1 + 0x7ff,
244 },
245 {
246 .name = "irq",
247 .flags = IORESOURCE_IRQ,
248 .start = 41,
249 .end = 41,
250 },
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251};
252
1e2c8d83 253static struct fixed_phy_status fixed_phy_status __initdata = {
4d1da8c2
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254 .link = 1,
255 .speed = 100,
256 .duplex = 1,
1e2c8d83
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257};
258
7ca5dc14 259static struct plat_cpmac_data cpmac_low_data = {
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260 .reset_bit = 17,
261 .power_bit = 20,
262 .phy_mask = 0x80000000,
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263};
264
265static struct plat_cpmac_data cpmac_high_data = {
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266 .reset_bit = 21,
267 .power_bit = 22,
268 .phy_mask = 0x7fffffff,
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269};
270
8e84c148 271static u64 cpmac_dma_mask = DMA_BIT_MASK(32);
4d1da8c2 272
7ca5dc14 273static struct platform_device cpmac_low = {
4d1da8c2
AC
274 .id = 0,
275 .name = "cpmac",
7ca5dc14 276 .dev = {
4d1da8c2
AC
277 .dma_mask = &cpmac_dma_mask,
278 .coherent_dma_mask = DMA_BIT_MASK(32),
279 .platform_data = &cpmac_low_data,
7ca5dc14 280 },
4d1da8c2
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281 .resource = cpmac_low_res,
282 .num_resources = ARRAY_SIZE(cpmac_low_res),
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283};
284
285static struct platform_device cpmac_high = {
4d1da8c2
AC
286 .id = 1,
287 .name = "cpmac",
7ca5dc14 288 .dev = {
4d1da8c2
AC
289 .dma_mask = &cpmac_dma_mask,
290 .coherent_dma_mask = DMA_BIT_MASK(32),
291 .platform_data = &cpmac_high_data,
7ca5dc14 292 },
4d1da8c2
AC
293 .resource = cpmac_high_res,
294 .num_resources = ARRAY_SIZE(cpmac_high_res),
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295};
296
d16f7093 297static void __init cpmac_get_mac(int instance, unsigned char *dev_addr)
4d1da8c2 298{
d16f7093 299 char name[5], *mac;
4d1da8c2 300
4d1da8c2
AC
301 sprintf(name, "mac%c", 'a' + instance);
302 mac = prom_getenv(name);
d16f7093 303 if (!mac && instance) {
4d1da8c2
AC
304 sprintf(name, "mac%c", 'a');
305 mac = prom_getenv(name);
306 }
d16f7093
AC
307
308 if (mac) {
5db7ccdc 309 if (!mac_pton(mac, dev_addr)) {
7178d2cd 310 pr_warn("cannot parse mac address, using random address\n");
6e5928f6 311 eth_random_addr(dev_addr);
d16f7093
AC
312 }
313 } else
6e5928f6 314 eth_random_addr(dev_addr);
4d1da8c2
AC
315}
316
317/*****************************************************************************
318 * USB
319 ****************************************************************************/
320static struct resource usb_res[] = {
321 {
322 .name = "regs",
323 .flags = IORESOURCE_MEM,
324 .start = AR7_REGS_USB,
325 .end = AR7_REGS_USB + 0xff,
326 },
327 {
328 .name = "irq",
329 .flags = IORESOURCE_IRQ,
330 .start = 32,
331 .end = 32,
332 },
333 {
334 .name = "mem",
335 .flags = IORESOURCE_MEM,
336 .start = 0x03400000,
632b629c 337 .end = 0x03401fff,
4d1da8c2 338 },
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339};
340
4d1da8c2
AC
341static struct platform_device ar7_udc = {
342 .name = "ar7_udc",
343 .resource = usb_res,
344 .num_resources = ARRAY_SIZE(usb_res),
345};
7ca5dc14 346
4d1da8c2
AC
347/*****************************************************************************
348 * LEDs
349 ****************************************************************************/
7ca5dc14
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350static struct gpio_led default_leds[] = {
351 {
4d1da8c2
AC
352 .name = "status",
353 .gpio = 8,
354 .active_low = 1,
7ca5dc14
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355 },
356};
357
238dd317
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358static struct gpio_led titan_leds[] = {
359 { .name = "status", .gpio = 8, .active_low = 1, },
360 { .name = "wifi", .gpio = 13, .active_low = 1, },
361};
362
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363static struct gpio_led dsl502t_leds[] = {
364 {
4d1da8c2
AC
365 .name = "status",
366 .gpio = 9,
367 .active_low = 1,
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368 },
369 {
4d1da8c2
AC
370 .name = "ethernet",
371 .gpio = 7,
372 .active_low = 1,
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373 },
374 {
4d1da8c2
AC
375 .name = "usb",
376 .gpio = 12,
377 .active_low = 1,
7ca5dc14
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378 },
379};
380
381static struct gpio_led dg834g_leds[] = {
382 {
4d1da8c2
AC
383 .name = "ppp",
384 .gpio = 6,
385 .active_low = 1,
7ca5dc14
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386 },
387 {
4d1da8c2
AC
388 .name = "status",
389 .gpio = 7,
390 .active_low = 1,
7ca5dc14
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391 },
392 {
4d1da8c2
AC
393 .name = "adsl",
394 .gpio = 8,
395 .active_low = 1,
7ca5dc14
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396 },
397 {
4d1da8c2
AC
398 .name = "wifi",
399 .gpio = 12,
400 .active_low = 1,
7ca5dc14
FF
401 },
402 {
4d1da8c2
AC
403 .name = "power",
404 .gpio = 14,
405 .active_low = 1,
406 .default_trigger = "default-on",
7ca5dc14
FF
407 },
408};
409
410static struct gpio_led fb_sl_leds[] = {
411 {
4d1da8c2
AC
412 .name = "1",
413 .gpio = 7,
7ca5dc14
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414 },
415 {
4d1da8c2
AC
416 .name = "2",
417 .gpio = 13,
418 .active_low = 1,
7ca5dc14
FF
419 },
420 {
4d1da8c2
AC
421 .name = "3",
422 .gpio = 10,
423 .active_low = 1,
7ca5dc14
FF
424 },
425 {
4d1da8c2
AC
426 .name = "4",
427 .gpio = 12,
428 .active_low = 1,
7ca5dc14
FF
429 },
430 {
4d1da8c2
AC
431 .name = "5",
432 .gpio = 9,
433 .active_low = 1,
7ca5dc14
FF
434 },
435};
436
437static struct gpio_led fb_fon_leds[] = {
438 {
4d1da8c2
AC
439 .name = "1",
440 .gpio = 8,
7ca5dc14
FF
441 },
442 {
4d1da8c2
AC
443 .name = "2",
444 .gpio = 3,
445 .active_low = 1,
7ca5dc14
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446 },
447 {
4d1da8c2
AC
448 .name = "3",
449 .gpio = 5,
7ca5dc14
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450 },
451 {
4d1da8c2
AC
452 .name = "4",
453 .gpio = 4,
454 .active_low = 1,
7ca5dc14
FF
455 },
456 {
4d1da8c2
AC
457 .name = "5",
458 .gpio = 11,
459 .active_low = 1,
7ca5dc14
FF
460 },
461};
462
f77138e8
FF
463static struct gpio_led gt701_leds[] = {
464 {
465 .name = "inet:green",
466 .gpio = 13,
467 .active_low = 1,
468 },
469 {
470 .name = "usb",
471 .gpio = 12,
472 .active_low = 1,
473 },
474 {
475 .name = "inet:red",
476 .gpio = 9,
477 .active_low = 1,
478 },
479 {
480 .name = "power:red",
481 .gpio = 7,
482 .active_low = 1,
483 },
484 {
485 .name = "power:green",
486 .gpio = 8,
487 .active_low = 1,
488 .default_trigger = "default-on",
489 },
70342287
RB
490 {
491 .name = "ethernet",
492 .gpio = 10,
493 .active_low = 1,
494 },
f77138e8
FF
495};
496
7ca5dc14
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497static struct gpio_led_platform_data ar7_led_data;
498
499static struct platform_device ar7_gpio_leds = {
500 .name = "leds-gpio",
7ca5dc14
FF
501 .dev = {
502 .platform_data = &ar7_led_data,
503 }
504};
505
7ca5dc14
FF
506static void __init detect_leds(void)
507{
508 char *prid, *usb_prod;
509
70342287 510 /* Default LEDs */
7ca5dc14
FF
511 ar7_led_data.num_leds = ARRAY_SIZE(default_leds);
512 ar7_led_data.leds = default_leds;
513
514 /* FIXME: the whole thing is unreliable */
515 prid = prom_getenv("ProductID");
516 usb_prod = prom_getenv("usb_prod");
517
518 /* If we can't get the product id from PROM, use the default LEDs */
519 if (!prid)
520 return;
521
522 if (strstr(prid, "Fritz_Box_FON")) {
523 ar7_led_data.num_leds = ARRAY_SIZE(fb_fon_leds);
524 ar7_led_data.leds = fb_fon_leds;
525 } else if (strstr(prid, "Fritz_Box_")) {
526 ar7_led_data.num_leds = ARRAY_SIZE(fb_sl_leds);
527 ar7_led_data.leds = fb_sl_leds;
528 } else if ((!strcmp(prid, "AR7RD") || !strcmp(prid, "AR7DB"))
529 && usb_prod != NULL && strstr(usb_prod, "DSL-502T")) {
530 ar7_led_data.num_leds = ARRAY_SIZE(dsl502t_leds);
531 ar7_led_data.leds = dsl502t_leds;
532 } else if (strstr(prid, "DG834")) {
533 ar7_led_data.num_leds = ARRAY_SIZE(dg834g_leds);
534 ar7_led_data.leds = dg834g_leds;
238dd317
FF
535 } else if (strstr(prid, "CYWM") || strstr(prid, "CYWL")) {
536 ar7_led_data.num_leds = ARRAY_SIZE(titan_leds);
537 ar7_led_data.leds = titan_leds;
f77138e8
FF
538 } else if (strstr(prid, "GT701")) {
539 ar7_led_data.num_leds = ARRAY_SIZE(gt701_leds);
540 ar7_led_data.leds = gt701_leds;
7ca5dc14
FF
541 }
542}
543
4d1da8c2
AC
544/*****************************************************************************
545 * Watchdog
546 ****************************************************************************/
547static struct resource ar7_wdt_res = {
548 .name = "regs",
549 .flags = IORESOURCE_MEM,
550 .start = -1, /* Filled at runtime */
551 .end = -1, /* Filled at runtime */
552};
553
554static struct platform_device ar7_wdt = {
555 .name = "ar7_wdt",
556 .resource = &ar7_wdt_res,
557 .num_resources = 1,
558};
559
560/*****************************************************************************
561 * Init
562 ****************************************************************************/
7084338e 563static int __init ar7_register_uarts(void)
7ca5dc14 564{
50ca9619 565#ifdef CONFIG_SERIAL_8250
7084338e 566 static struct uart_port uart_port __initdata;
780019dd 567 struct clk *bus_clk;
7084338e 568 int res;
7ca5dc14 569
7084338e 570 memset(&uart_port, 0, sizeof(struct uart_port));
7ca5dc14 571
780019dd
FF
572 bus_clk = clk_get(NULL, "bus");
573 if (IS_ERR(bus_clk))
ab75dc02 574 panic("unable to get bus clk");
780019dd 575
154615d5 576 uart_port.type = PORT_AR7;
7084338e
AC
577 uart_port.uartclk = clk_get_rate(bus_clk) / 2;
578 uart_port.iotype = UPIO_MEM32;
579 uart_port.regshift = 2;
580
581 uart_port.line = 0;
582 uart_port.irq = AR7_IRQ_UART0;
583 uart_port.mapbase = AR7_REGS_UART0;
584 uart_port.membase = ioremap(uart_port.mapbase, 256);
585
586 res = early_serial_setup(&uart_port);
7ca5dc14
FF
587 if (res)
588 return res;
589
7ca5dc14
FF
590 /* Only TNETD73xx have a second serial port */
591 if (ar7_has_second_uart()) {
7084338e
AC
592 uart_port.line = 1;
593 uart_port.irq = AR7_IRQ_UART1;
594 uart_port.mapbase = UR8_REGS_UART1;
595 uart_port.membase = ioremap(uart_port.mapbase, 256);
596
597 res = early_serial_setup(&uart_port);
7ca5dc14
FF
598 if (res)
599 return res;
600 }
7084338e
AC
601#endif
602
603 return 0;
604}
605
238dd317
FF
606static void __init titan_fixup_devices(void)
607{
608 /* Set vlynq0 data */
609 vlynq_low_data.reset_bit = 15;
610 vlynq_low_data.gpio_bit = 14;
611
612 /* Set vlynq1 data */
613 vlynq_high_data.reset_bit = 16;
614 vlynq_high_data.gpio_bit = 7;
615
616 /* Set vlynq0 resources */
617 vlynq_low_res[0].start = TITAN_REGS_VLYNQ0;
618 vlynq_low_res[0].end = TITAN_REGS_VLYNQ0 + 0xff;
619 vlynq_low_res[1].start = 33;
620 vlynq_low_res[1].end = 33;
621 vlynq_low_res[2].start = 0x0c000000;
622 vlynq_low_res[2].end = 0x0fffffff;
623 vlynq_low_res[3].start = 80;
624 vlynq_low_res[3].end = 111;
625
626 /* Set vlynq1 resources */
627 vlynq_high_res[0].start = TITAN_REGS_VLYNQ1;
628 vlynq_high_res[0].end = TITAN_REGS_VLYNQ1 + 0xff;
629 vlynq_high_res[1].start = 34;
630 vlynq_high_res[1].end = 34;
631 vlynq_high_res[2].start = 0x40000000;
632 vlynq_high_res[2].end = 0x43ffffff;
633 vlynq_high_res[3].start = 112;
634 vlynq_high_res[3].end = 143;
635
636 /* Set cpmac0 data */
637 cpmac_low_data.phy_mask = 0x40000000;
638
639 /* Set cpmac1 data */
640 cpmac_high_data.phy_mask = 0x80000000;
641
642 /* Set cpmac0 resources */
643 cpmac_low_res[0].start = TITAN_REGS_MAC0;
644 cpmac_low_res[0].end = TITAN_REGS_MAC0 + 0x7ff;
645
646 /* Set cpmac1 resources */
647 cpmac_high_res[0].start = TITAN_REGS_MAC1;
648 cpmac_high_res[0].end = TITAN_REGS_MAC1 + 0x7ff;
649}
650
7084338e
AC
651static int __init ar7_register_devices(void)
652{
653 void __iomem *bootcr;
654 u32 val;
7084338e
AC
655 int res;
656
657 res = ar7_register_uarts();
658 if (res)
659 pr_err("unable to setup uart(s): %d\n", res);
660
7ca5dc14
FF
661 res = platform_device_register(&physmap_flash);
662 if (res)
7178d2cd 663 pr_warn("unable to register physmap-flash: %d\n", res);
7ca5dc14 664
238dd317
FF
665 if (ar7_is_titan())
666 titan_fixup_devices();
667
7ca5dc14
FF
668 ar7_device_disable(vlynq_low_data.reset_bit);
669 res = platform_device_register(&vlynq_low);
670 if (res)
7178d2cd 671 pr_warn("unable to register vlynq-low: %d\n", res);
7ca5dc14
FF
672
673 if (ar7_has_high_vlynq()) {
674 ar7_device_disable(vlynq_high_data.reset_bit);
675 res = platform_device_register(&vlynq_high);
676 if (res)
7178d2cd 677 pr_warn("unable to register vlynq-high: %d\n", res);
7ca5dc14
FF
678 }
679
680 if (ar7_has_high_cpmac()) {
a5597008
AL
681 res = fixed_phy_add(PHY_POLL, cpmac_high.id,
682 &fixed_phy_status, -1);
7084338e
AC
683 if (!res) {
684 cpmac_get_mac(1, cpmac_high_data.dev_addr);
685
686 res = platform_device_register(&cpmac_high);
687 if (res)
7178d2cd
JP
688 pr_warn("unable to register cpmac-high: %d\n",
689 res);
7084338e 690 } else
7178d2cd 691 pr_warn("unable to add cpmac-high phy: %d\n", res);
7084338e 692 } else
7ca5dc14 693 cpmac_low_data.phy_mask = 0xffffffff;
7ca5dc14 694
a5597008 695 res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status, -1);
7084338e
AC
696 if (!res) {
697 cpmac_get_mac(0, cpmac_low_data.dev_addr);
698 res = platform_device_register(&cpmac_low);
699 if (res)
7178d2cd 700 pr_warn("unable to register cpmac-low: %d\n", res);
7084338e 701 } else
7178d2cd 702 pr_warn("unable to add cpmac-low phy: %d\n", res);
7ca5dc14
FF
703
704 detect_leds();
705 res = platform_device_register(&ar7_gpio_leds);
706 if (res)
7178d2cd 707 pr_warn("unable to register leds: %d\n", res);
7ca5dc14
FF
708
709 res = platform_device_register(&ar7_udc);
7084338e 710 if (res)
7178d2cd 711 pr_warn("unable to register usb slave: %d\n", res);
72838a17
FF
712
713 /* Register watchdog only if enabled in hardware */
7084338e
AC
714 bootcr = ioremap_nocache(AR7_REGS_DCL, 4);
715 val = readl(bootcr);
716 iounmap(bootcr);
717 if (val & AR7_WDT_HW_ENA) {
9c1b013a 718 if (ar7_has_high_vlynq())
7084338e 719 ar7_wdt_res.start = UR8_REGS_WDT;
9c1b013a
FF
720 else
721 ar7_wdt_res.start = AR7_REGS_WDT;
7084338e
AC
722
723 ar7_wdt_res.end = ar7_wdt_res.start + 0x20;
72838a17 724 res = platform_device_register(&ar7_wdt);
7084338e 725 if (res)
7178d2cd 726 pr_warn("unable to register watchdog: %d\n", res);
7084338e 727 }
d47fbb59 728
7084338e 729 return 0;
7ca5dc14 730}
142a2cee 731device_initcall(ar7_register_devices);
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