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7ca5dc14 FF |
1 | /* |
2 | * Carsten Langgaard, carstenl@mips.com | |
3 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. | |
4 | * | |
5 | * This program is free software; you can distribute it and/or modify it | |
6 | * under the terms of the GNU General Public License (Version 2) as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 | * for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along | |
15 | * with this program; if not, write to the Free Software Foundation, Inc., | |
16 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | |
17 | */ | |
7ca5dc14 FF |
18 | #include <linux/init.h> |
19 | #include <linux/ioport.h> | |
20 | #include <linux/pm.h> | |
21 | #include <linux/time.h> | |
22 | ||
23 | #include <asm/reboot.h> | |
24 | #include <asm/mach-ar7/ar7.h> | |
25 | #include <asm/mach-ar7/prom.h> | |
26 | ||
27 | static void ar7_machine_restart(char *command) | |
28 | { | |
4d1da8c2 AC |
29 | u32 *softres_reg = ioremap(AR7_REGS_RESET + AR7_RESET_SOFTWARE, 1); |
30 | ||
7ca5dc14 FF |
31 | writel(1, softres_reg); |
32 | } | |
33 | ||
34 | static void ar7_machine_halt(void) | |
35 | { | |
36 | while (1) | |
37 | ; | |
38 | } | |
39 | ||
40 | static void ar7_machine_power_off(void) | |
41 | { | |
42 | u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1); | |
43 | u32 power_state = readl(power_reg) | (3 << 30); | |
4d1da8c2 | 44 | |
7ca5dc14 FF |
45 | writel(power_state, power_reg); |
46 | ar7_machine_halt(); | |
47 | } | |
48 | ||
49 | const char *get_system_type(void) | |
50 | { | |
51 | u16 chip_id = ar7_chip_id(); | |
238dd317 FF |
52 | u16 titan_variant_id = titan_chip_id(); |
53 | ||
7ca5dc14 | 54 | switch (chip_id) { |
7ca5dc14 FF |
55 | case AR7_CHIP_7100: |
56 | return "TI AR7 (TNETD7100)"; | |
57 | case AR7_CHIP_7200: | |
58 | return "TI AR7 (TNETD7200)"; | |
4d1da8c2 AC |
59 | case AR7_CHIP_7300: |
60 | return "TI AR7 (TNETD7300)"; | |
238dd317 FF |
61 | case AR7_CHIP_TITAN: |
62 | switch (titan_variant_id) { | |
63 | case TITAN_CHIP_1050: | |
64 | return "TI AR7 (TNETV1050)"; | |
65 | case TITAN_CHIP_1055: | |
66 | return "TI AR7 (TNETV1055)"; | |
67 | case TITAN_CHIP_1056: | |
68 | return "TI AR7 (TNETV1056)"; | |
69 | case TITAN_CHIP_1060: | |
70 | return "TI AR7 (TNETV1060)"; | |
71 | } | |
7ca5dc14 | 72 | default: |
4d1da8c2 | 73 | return "TI AR7 (unknown)"; |
7ca5dc14 FF |
74 | } |
75 | } | |
76 | ||
77 | static int __init ar7_init_console(void) | |
78 | { | |
79 | return 0; | |
80 | } | |
81 | console_initcall(ar7_init_console); | |
82 | ||
83 | /* | |
84 | * Initializes basic routines and structures pointers, memory size (as | |
85 | * given by the bios and saves the command line. | |
86 | */ | |
7ca5dc14 FF |
87 | void __init plat_mem_setup(void) |
88 | { | |
89 | unsigned long io_base; | |
90 | ||
91 | _machine_restart = ar7_machine_restart; | |
92 | _machine_halt = ar7_machine_halt; | |
93 | pm_power_off = ar7_machine_power_off; | |
7ca5dc14 FF |
94 | |
95 | io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000); | |
96 | if (!io_base) | |
ab75dc02 | 97 | panic("Can't remap IO base!"); |
7ca5dc14 FF |
98 | set_io_port_base(io_base); |
99 | ||
100 | prom_meminit(); | |
101 | ||
102 | printk(KERN_INFO "%s, ID: 0x%04x, Revision: 0x%02x\n", | |
4d1da8c2 | 103 | get_system_type(), ar7_chip_id(), ar7_chip_rev()); |
7ca5dc14 | 104 | } |