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1c0c13eb AJ |
1 | /* |
2 | * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org> | |
1c0c13eb | 3 | * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> |
eb032b98 | 4 | * Copyright (C) 2006 Michael Buesch <m@bues.ch> |
121915c4 | 5 | * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org> |
f384b3dd | 6 | * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de> |
1c0c13eb AJ |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | |
14 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
15 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | |
16 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
17 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
18 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | |
19 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
20 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
21 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
22 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 675 Mass Ave, Cambridge, MA 02139, USA. | |
27 | */ | |
28 | ||
515fa75d RM |
29 | #include "bcm47xx_private.h" |
30 | ||
cae39d13 | 31 | #include <linux/export.h> |
1c0c13eb | 32 | #include <linux/types.h> |
b04138b3 HM |
33 | #include <linux/ethtool.h> |
34 | #include <linux/phy.h> | |
35 | #include <linux/phy_fixed.h> | |
1c0c13eb | 36 | #include <linux/ssb/ssb.h> |
b06f3e19 | 37 | #include <linux/ssb/ssb_embedded.h> |
c1d1c5d4 | 38 | #include <linux/bcma/bcma_soc.h> |
25e5fb97 | 39 | #include <asm/bootinfo.h> |
76b573e4 | 40 | #include <asm/idle.h> |
7da4b6f8 | 41 | #include <asm/prom.h> |
1c0c13eb AJ |
42 | #include <asm/reboot.h> |
43 | #include <asm/time.h> | |
44 | #include <bcm47xx.h> | |
786c497a | 45 | #include <bcm47xx_board.h> |
1c0c13eb | 46 | |
08ccf572 HM |
47 | union bcm47xx_bus bcm47xx_bus; |
48 | EXPORT_SYMBOL(bcm47xx_bus); | |
49 | ||
50 | enum bcm47xx_bus_type bcm47xx_bus_type; | |
51 | EXPORT_SYMBOL(bcm47xx_bus_type); | |
1c0c13eb AJ |
52 | |
53 | static void bcm47xx_machine_restart(char *command) | |
54 | { | |
55 | printk(KERN_ALERT "Please stand by while rebooting the system...\n"); | |
56 | local_irq_disable(); | |
57 | /* Set the watchdog timer to reset immediately */ | |
08ccf572 | 58 | switch (bcm47xx_bus_type) { |
a656ffcb | 59 | #ifdef CONFIG_BCM47XX_SSB |
08ccf572 | 60 | case BCM47XX_BUS_TYPE_SSB: |
2727cab2 HM |
61 | if (bcm47xx_bus.ssb.chip_id == 0x4785) |
62 | write_c0_diag4(1 << 22); | |
63 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1); | |
64 | if (bcm47xx_bus.ssb.chip_id == 0x4785) { | |
65 | __asm__ __volatile__( | |
66 | ".set\tmips3\n\t" | |
67 | "sync\n\t" | |
68 | "wait\n\t" | |
69 | ".set\tmips0"); | |
70 | } | |
08ccf572 | 71 | break; |
c1d1c5d4 HM |
72 | #endif |
73 | #ifdef CONFIG_BCM47XX_BCMA | |
74 | case BCM47XX_BUS_TYPE_BCMA: | |
2727cab2 | 75 | bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1); |
c1d1c5d4 | 76 | break; |
a656ffcb | 77 | #endif |
08ccf572 | 78 | } |
1c0c13eb AJ |
79 | while (1) |
80 | cpu_relax(); | |
81 | } | |
82 | ||
83 | static void bcm47xx_machine_halt(void) | |
84 | { | |
85 | /* Disable interrupts and watchdog and spin forever */ | |
86 | local_irq_disable(); | |
08ccf572 | 87 | switch (bcm47xx_bus_type) { |
a656ffcb | 88 | #ifdef CONFIG_BCM47XX_SSB |
08ccf572 HM |
89 | case BCM47XX_BUS_TYPE_SSB: |
90 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); | |
91 | break; | |
c1d1c5d4 HM |
92 | #endif |
93 | #ifdef CONFIG_BCM47XX_BCMA | |
94 | case BCM47XX_BUS_TYPE_BCMA: | |
95 | bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0); | |
96 | break; | |
a656ffcb | 97 | #endif |
08ccf572 | 98 | } |
1c0c13eb AJ |
99 | while (1) |
100 | cpu_relax(); | |
101 | } | |
102 | ||
a656ffcb | 103 | #ifdef CONFIG_BCM47XX_SSB |
1c0c13eb | 104 | static int bcm47xx_get_invariants(struct ssb_bus *bus, |
f384b3dd | 105 | struct ssb_init_invariants *iv) |
1c0c13eb | 106 | { |
2aa088d6 | 107 | char buf[20]; |
25e5fb97 AJ |
108 | |
109 | /* Fill boardinfo structure */ | |
110 | memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo)); | |
111 | ||
a9bba182 | 112 | bcm47xx_fill_ssb_boardinfo(&iv->boardinfo, NULL); |
25e5fb97 | 113 | |
5fe2e071 | 114 | memset(&iv->sprom, 0, sizeof(struct ssb_sprom)); |
b8ebbaff | 115 | bcm47xx_fill_sprom(&iv->sprom, NULL, false); |
121915c4 | 116 | |
111bd981 | 117 | if (bcm47xx_nvram_getenv("cardbus", buf, sizeof(buf)) >= 0) |
2aa088d6 | 118 | iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10); |
25e5fb97 | 119 | |
1c0c13eb AJ |
120 | return 0; |
121 | } | |
122 | ||
08ccf572 | 123 | static void __init bcm47xx_register_ssb(void) |
1c0c13eb AJ |
124 | { |
125 | int err; | |
1690a7f9 HM |
126 | char buf[100]; |
127 | struct ssb_mipscore *mcore; | |
1c0c13eb | 128 | |
08ccf572 | 129 | err = ssb_bus_ssbbus_register(&(bcm47xx_bus.ssb), SSB_ENUM_BASE, |
1c0c13eb AJ |
130 | bcm47xx_get_invariants); |
131 | if (err) | |
ab75dc02 | 132 | panic("Failed to initialize SSB bus (err %d)", err); |
1c0c13eb | 133 | |
08ccf572 | 134 | mcore = &bcm47xx_bus.ssb.mipscore; |
111bd981 | 135 | if (bcm47xx_nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) { |
1690a7f9 HM |
136 | if (strstr(buf, "console=ttyS1")) { |
137 | struct ssb_serial_port port; | |
138 | ||
139 | printk(KERN_DEBUG "Swapping serial ports!\n"); | |
140 | /* swap serial ports */ | |
141 | memcpy(&port, &mcore->serial_ports[0], sizeof(port)); | |
142 | memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1], | |
143 | sizeof(port)); | |
144 | memcpy(&mcore->serial_ports[1], &port, sizeof(port)); | |
145 | } | |
146 | } | |
08ccf572 | 147 | } |
a656ffcb | 148 | #endif |
08ccf572 | 149 | |
c1d1c5d4 HM |
150 | #ifdef CONFIG_BCM47XX_BCMA |
151 | static void __init bcm47xx_register_bcma(void) | |
152 | { | |
153 | int err; | |
154 | ||
155 | err = bcma_host_soc_register(&bcm47xx_bus.bcma); | |
a395135d RM |
156 | if (err) |
157 | panic("Failed to register BCMA bus (err %d)", err); | |
c1d1c5d4 HM |
158 | } |
159 | #endif | |
160 | ||
e5810fa0 RM |
161 | /* |
162 | * Memory setup is done in the early part of MIPS's arch_mem_init. It's supposed | |
163 | * to detect memory and record it with add_memory_region. | |
164 | * Any extra initializaion performed here must not use kmalloc or bootmem. | |
165 | */ | |
08ccf572 HM |
166 | void __init plat_mem_setup(void) |
167 | { | |
168 | struct cpuinfo_mips *c = ¤t_cpu_data; | |
169 | ||
442e14a2 | 170 | if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K)) { |
c1d1c5d4 HM |
171 | printk(KERN_INFO "bcm47xx: using bcma bus\n"); |
172 | #ifdef CONFIG_BCM47XX_BCMA | |
173 | bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA; | |
a59da8fb | 174 | bcm47xx_sprom_register_fallbacks(); |
c1d1c5d4 | 175 | bcm47xx_register_bcma(); |
dd573285 | 176 | bcm47xx_set_system_type(bcm47xx_bus.bcma.bus.chipinfo.id); |
6ee1d934 RM |
177 | #ifdef CONFIG_HIGHMEM |
178 | bcm47xx_prom_highmem_init(); | |
179 | #endif | |
c1d1c5d4 HM |
180 | #endif |
181 | } else { | |
182 | printk(KERN_INFO "bcm47xx: using ssb bus\n"); | |
a656ffcb | 183 | #ifdef CONFIG_BCM47XX_SSB |
c1d1c5d4 | 184 | bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB; |
a59da8fb | 185 | bcm47xx_sprom_register_fallbacks(); |
c1d1c5d4 | 186 | bcm47xx_register_ssb(); |
dd573285 | 187 | bcm47xx_set_system_type(bcm47xx_bus.ssb.chip_id); |
a656ffcb | 188 | #endif |
c1d1c5d4 | 189 | } |
1690a7f9 | 190 | |
1c0c13eb AJ |
191 | _machine_restart = bcm47xx_machine_restart; |
192 | _machine_halt = bcm47xx_machine_halt; | |
193 | pm_power_off = bcm47xx_machine_halt; | |
e5810fa0 RM |
194 | } |
195 | ||
196 | /* | |
197 | * This finishes bus initialization doing things that were not possible without | |
198 | * kmalloc. Make sure to call it late enough (after mm_init). | |
199 | */ | |
200 | void __init bcm47xx_bus_setup(void) | |
201 | { | |
202 | #ifdef CONFIG_BCM47XX_BCMA | |
203 | if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) { | |
204 | int err; | |
205 | ||
206 | err = bcma_host_soc_init(&bcm47xx_bus.bcma); | |
207 | if (err) | |
208 | panic("Failed to initialize BCMA bus (err %d)", err); | |
209 | ||
210 | bcm47xx_fill_bcma_boardinfo(&bcm47xx_bus.bcma.bus.boardinfo, | |
211 | NULL); | |
212 | } | |
213 | #endif | |
214 | ||
215 | /* With bus initialized we can access NVRAM and detect the board */ | |
786c497a | 216 | bcm47xx_board_detect(); |
7da4b6f8 | 217 | mips_set_machine_name(bcm47xx_board_get_name()); |
1c0c13eb | 218 | } |
c1d1c5d4 | 219 | |
3c06b12b HM |
220 | static int __init bcm47xx_cpu_fixes(void) |
221 | { | |
222 | switch (bcm47xx_bus_type) { | |
223 | #ifdef CONFIG_BCM47XX_SSB | |
224 | case BCM47XX_BUS_TYPE_SSB: | |
225 | /* Nothing to do */ | |
226 | break; | |
227 | #endif | |
228 | #ifdef CONFIG_BCM47XX_BCMA | |
229 | case BCM47XX_BUS_TYPE_BCMA: | |
230 | /* The BCM4706 has a problem with the CPU wait instruction. | |
231 | * When r4k_wait or r4k_wait_irqoff is used will just hang and | |
232 | * not return from a msleep(). Removing the cpu_wait | |
233 | * functionality is a workaround for this problem. The BCM4716 | |
234 | * does not have this problem. | |
235 | */ | |
236 | if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706) | |
237 | cpu_wait = NULL; | |
238 | break; | |
239 | #endif | |
240 | } | |
241 | return 0; | |
242 | } | |
243 | arch_initcall(bcm47xx_cpu_fixes); | |
244 | ||
b04138b3 HM |
245 | static struct fixed_phy_status bcm47xx_fixed_phy_status __initdata = { |
246 | .link = 1, | |
247 | .speed = SPEED_100, | |
248 | .duplex = DUPLEX_FULL, | |
249 | }; | |
250 | ||
c1d1c5d4 HM |
251 | static int __init bcm47xx_register_bus_complete(void) |
252 | { | |
253 | switch (bcm47xx_bus_type) { | |
254 | #ifdef CONFIG_BCM47XX_SSB | |
255 | case BCM47XX_BUS_TYPE_SSB: | |
256 | /* Nothing to do */ | |
257 | break; | |
258 | #endif | |
259 | #ifdef CONFIG_BCM47XX_BCMA | |
260 | case BCM47XX_BUS_TYPE_BCMA: | |
261 | bcma_bus_register(&bcm47xx_bus.bcma.bus); | |
262 | break; | |
263 | #endif | |
264 | } | |
ef1e3e7a | 265 | bcm47xx_buttons_register(); |
515fa75d | 266 | bcm47xx_leds_register(); |
a2bec078 | 267 | bcm47xx_workarounds(); |
515fa75d | 268 | |
b04138b3 | 269 | fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status); |
c1d1c5d4 HM |
270 | return 0; |
271 | } | |
272 | device_initcall(bcm47xx_register_bus_complete); |