Commit | Line | Data |
---|---|---|
8945e37e KC |
1 | / { |
2 | #address-cells = <1>; | |
3 | #size-cells = <1>; | |
4 | compatible = "brcm,bcm7362"; | |
5 | ||
6 | cpus { | |
7 | #address-cells = <1>; | |
8 | #size-cells = <0>; | |
9 | ||
10 | mips-hpt-frequency = <375000000>; | |
11 | ||
12 | cpu@0 { | |
13 | compatible = "brcm,bmips4380"; | |
14 | device_type = "cpu"; | |
15 | reg = <0>; | |
16 | }; | |
17 | ||
18 | cpu@1 { | |
19 | compatible = "brcm,bmips4380"; | |
20 | device_type = "cpu"; | |
21 | reg = <1>; | |
22 | }; | |
23 | }; | |
24 | ||
25 | aliases { | |
26 | uart0 = &uart0; | |
8bac078c JS |
27 | uart1 = &uart1; |
28 | uart2 = &uart2; | |
8945e37e KC |
29 | }; |
30 | ||
31 | cpu_intc: cpu_intc { | |
32 | #address-cells = <0>; | |
33 | compatible = "mti,cpu-interrupt-controller"; | |
34 | ||
35 | interrupt-controller; | |
36 | #interrupt-cells = <1>; | |
37 | }; | |
38 | ||
39 | clocks { | |
40 | uart_clk: uart_clk { | |
41 | compatible = "fixed-clock"; | |
42 | #clock-cells = <0>; | |
43 | clock-frequency = <81000000>; | |
44 | }; | |
45 | }; | |
46 | ||
47 | rdb { | |
48 | #address-cells = <1>; | |
49 | #size-cells = <1>; | |
50 | ||
51 | compatible = "simple-bus"; | |
52 | ranges = <0 0x10000000 0x01000000>; | |
53 | ||
54 | periph_intc: periph_intc@411400 { | |
55 | compatible = "brcm,bcm7038-l1-intc"; | |
56 | reg = <0x411400 0x30>, <0x411600 0x30>; | |
57 | ||
58 | interrupt-controller; | |
59 | #interrupt-cells = <1>; | |
60 | ||
61 | interrupt-parent = <&cpu_intc>; | |
62 | interrupts = <2>, <3>; | |
63 | }; | |
64 | ||
65 | sun_l2_intc: sun_l2_intc@403000 { | |
66 | compatible = "brcm,l2-intc"; | |
67 | reg = <0x403000 0x30>; | |
68 | interrupt-controller; | |
69 | #interrupt-cells = <1>; | |
70 | interrupt-parent = <&periph_intc>; | |
71 | interrupts = <48>; | |
72 | }; | |
73 | ||
74 | gisb-arb@400000 { | |
75 | compatible = "brcm,bcm7400-gisb-arb"; | |
76 | reg = <0x400000 0xdc>; | |
77 | native-endian; | |
78 | interrupt-parent = <&sun_l2_intc>; | |
79 | interrupts = <0>, <2>; | |
80 | brcm,gisb-arb-master-mask = <0x2f3>; | |
81 | brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0", | |
82 | "rdc_0", "raaga_0", | |
83 | "avd_0", "jtag_0"; | |
84 | }; | |
85 | ||
86 | upg_irq0_intc: upg_irq0_intc@406600 { | |
87 | compatible = "brcm,bcm7120-l2-intc"; | |
88 | reg = <0x406600 0x8>; | |
89 | ||
f50cbf53 | 90 | brcm,int-map-mask = <0x44>, <0x7000000>; |
8945e37e KC |
91 | brcm,int-fwd-mask = <0x70000>; |
92 | ||
93 | interrupt-controller; | |
94 | #interrupt-cells = <1>; | |
95 | ||
96 | interrupt-parent = <&periph_intc>; | |
f50cbf53 JS |
97 | interrupts = <56>, <54>; |
98 | interrupt-names = "upg_main", "upg_bsc"; | |
99 | }; | |
100 | ||
101 | upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 { | |
102 | compatible = "brcm,bcm7120-l2-intc"; | |
103 | reg = <0x408b80 0x8>; | |
104 | ||
105 | brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>; | |
106 | brcm,int-fwd-mask = <0>; | |
107 | brcm,irq-can-wake; | |
108 | ||
109 | interrupt-controller; | |
110 | #interrupt-cells = <1>; | |
111 | ||
112 | interrupt-parent = <&periph_intc>; | |
113 | interrupts = <57>, <55>, <59>; | |
114 | interrupt-names = "upg_main_aon", "upg_bsc_aon", | |
115 | "upg_spi"; | |
8945e37e KC |
116 | }; |
117 | ||
118 | sun_top_ctrl: syscon@404000 { | |
119 | compatible = "brcm,bcm7362-sun-top-ctrl", "syscon"; | |
120 | reg = <0x404000 0x51c>; | |
25d6463e | 121 | native-endian; |
8945e37e KC |
122 | }; |
123 | ||
124 | reboot { | |
125 | compatible = "brcm,brcmstb-reboot"; | |
126 | syscon = <&sun_top_ctrl 0x304 0x308>; | |
127 | }; | |
128 | ||
129 | uart0: serial@406800 { | |
130 | compatible = "ns16550a"; | |
131 | reg = <0x406800 0x20>; | |
132 | reg-io-width = <0x4>; | |
133 | reg-shift = <0x2>; | |
134 | native-endian; | |
135 | interrupt-parent = <&periph_intc>; | |
136 | interrupts = <61>; | |
137 | clocks = <&uart_clk>; | |
138 | status = "disabled"; | |
139 | }; | |
140 | ||
8bac078c JS |
141 | uart1: serial@406840 { |
142 | compatible = "ns16550a"; | |
143 | reg = <0x406840 0x20>; | |
144 | reg-io-width = <0x4>; | |
145 | reg-shift = <0x2>; | |
146 | native-endian; | |
147 | interrupt-parent = <&periph_intc>; | |
148 | interrupts = <62>; | |
149 | clocks = <&uart_clk>; | |
150 | status = "disabled"; | |
151 | }; | |
152 | ||
153 | uart2: serial@406880 { | |
154 | compatible = "ns16550a"; | |
155 | reg = <0x406880 0x20>; | |
156 | reg-io-width = <0x4>; | |
157 | reg-shift = <0x2>; | |
158 | native-endian; | |
159 | interrupt-parent = <&periph_intc>; | |
160 | interrupts = <63>; | |
161 | clocks = <&uart_clk>; | |
162 | status = "disabled"; | |
163 | }; | |
164 | ||
f50cbf53 JS |
165 | bsca: i2c@406200 { |
166 | clock-frequency = <390000>; | |
167 | compatible = "brcm,brcmstb-i2c"; | |
168 | interrupt-parent = <&upg_irq0_intc>; | |
169 | reg = <0x406200 0x58>; | |
170 | interrupts = <24>; | |
171 | interrupt-names = "upg_bsca"; | |
172 | status = "disabled"; | |
173 | }; | |
174 | ||
175 | bscb: i2c@406280 { | |
176 | clock-frequency = <390000>; | |
177 | compatible = "brcm,brcmstb-i2c"; | |
178 | interrupt-parent = <&upg_irq0_intc>; | |
179 | reg = <0x406280 0x58>; | |
180 | interrupts = <25>; | |
181 | interrupt-names = "upg_bscb"; | |
182 | status = "disabled"; | |
183 | }; | |
184 | ||
185 | bscd: i2c@408980 { | |
186 | clock-frequency = <390000>; | |
187 | compatible = "brcm,brcmstb-i2c"; | |
188 | interrupt-parent = <&upg_aon_irq0_intc>; | |
189 | reg = <0x408980 0x58>; | |
190 | interrupts = <27>; | |
191 | interrupt-names = "upg_bscd"; | |
192 | status = "disabled"; | |
193 | }; | |
194 | ||
8945e37e KC |
195 | enet0: ethernet@430000 { |
196 | phy-mode = "internal"; | |
197 | phy-handle = <&phy1>; | |
198 | mac-address = [ 00 10 18 36 23 1a ]; | |
199 | compatible = "brcm,genet-v2"; | |
200 | #address-cells = <0x1>; | |
201 | #size-cells = <0x1>; | |
202 | reg = <0x430000 0x4c8c>; | |
203 | interrupts = <24>, <25>; | |
204 | interrupt-parent = <&periph_intc>; | |
205 | status = "disabled"; | |
206 | ||
207 | mdio@e14 { | |
208 | compatible = "brcm,genet-mdio-v2"; | |
209 | #address-cells = <0x1>; | |
210 | #size-cells = <0x0>; | |
211 | reg = <0xe14 0x8>; | |
212 | ||
213 | phy1: ethernet-phy@1 { | |
214 | max-speed = <100>; | |
215 | reg = <0x1>; | |
216 | compatible = "brcm,40nm-ephy", | |
217 | "ethernet-phy-ieee802.3-c22"; | |
218 | }; | |
219 | }; | |
220 | }; | |
221 | ||
222 | ehci0: usb@480300 { | |
223 | compatible = "brcm,bcm7362-ehci", "generic-ehci"; | |
224 | reg = <0x480300 0x100>; | |
225 | native-endian; | |
226 | interrupt-parent = <&periph_intc>; | |
227 | interrupts = <65>; | |
228 | status = "disabled"; | |
229 | }; | |
230 | ||
231 | ohci0: usb@480400 { | |
232 | compatible = "brcm,bcm7362-ohci", "generic-ohci"; | |
233 | reg = <0x480400 0x100>; | |
234 | native-endian; | |
235 | no-big-frame-no; | |
236 | interrupt-parent = <&periph_intc>; | |
237 | interrupts = <66>; | |
238 | status = "disabled"; | |
239 | }; | |
1b04be20 JS |
240 | |
241 | sata: sata@181000 { | |
242 | compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci"; | |
243 | reg-names = "ahci", "top-ctrl"; | |
244 | reg = <0x181000 0xa9c>, <0x180020 0x1c>; | |
245 | interrupt-parent = <&periph_intc>; | |
246 | interrupts = <86>; | |
247 | #address-cells = <1>; | |
248 | #size-cells = <0>; | |
249 | brcm,broken-ncq; | |
250 | brcm,broken-phy; | |
251 | status = "disabled"; | |
252 | ||
253 | sata0: sata-port@0 { | |
254 | reg = <0>; | |
255 | phys = <&sata_phy0>; | |
256 | }; | |
257 | ||
258 | sata1: sata-port@1 { | |
259 | reg = <1>; | |
260 | phys = <&sata_phy1>; | |
261 | }; | |
262 | }; | |
263 | ||
264 | sata_phy: sata-phy@1800000 { | |
265 | compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3"; | |
266 | reg = <0x180100 0x0eff>; | |
267 | reg-names = "phy"; | |
268 | #address-cells = <1>; | |
269 | #size-cells = <0>; | |
270 | status = "disabled"; | |
271 | ||
272 | sata_phy0: sata-phy@0 { | |
273 | reg = <0>; | |
274 | #phy-cells = <0>; | |
275 | }; | |
276 | ||
277 | sata_phy1: sata-phy@1 { | |
278 | reg = <1>; | |
279 | #phy-cells = <0>; | |
280 | }; | |
281 | }; | |
8945e37e KC |
282 | }; |
283 | }; |