crypto: octeon - add instruction definitions for MD5
[deliverable/linux.git] / arch / mips / cavium-octeon / crypto / octeon-crypto.h
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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012-2013 Cavium Inc., All Rights Reserved.
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7 *
8 * MD5 instruction definitions added by Aaro Koskinen <aaro.koskinen@iki.fi>.
9 *
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10 */
11#ifndef __LINUX_OCTEON_CRYPTO_H
12#define __LINUX_OCTEON_CRYPTO_H
13
14#include <linux/sched.h>
1e585ef5 15#include <asm/mipsregs.h>
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16
17extern unsigned long octeon_crypto_enable(struct octeon_cop2_state *state);
18extern void octeon_crypto_disable(struct octeon_cop2_state *state,
19 unsigned long flags);
20
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21/*
22 * Macros needed to implement MD5:
23 */
24
25/*
26 * The index can be 0-1.
27 */
28#define write_octeon_64bit_hash_dword(value, index) \
29do { \
30 __asm__ __volatile__ ( \
31 "dmtc2 %[rt],0x0048+" STR(index) \
32 : \
33 : [rt] "d" (value)); \
34} while (0)
35
36/*
37 * The index can be 0-1.
38 */
39#define read_octeon_64bit_hash_dword(index) \
40({ \
41 u64 __value; \
42 \
43 __asm__ __volatile__ ( \
44 "dmfc2 %[rt],0x0048+" STR(index) \
45 : [rt] "=d" (__value) \
46 : ); \
47 \
48 __value; \
49})
50
51/*
52 * The index can be 0-6.
53 */
54#define write_octeon_64bit_block_dword(value, index) \
55do { \
56 __asm__ __volatile__ ( \
57 "dmtc2 %[rt],0x0040+" STR(index) \
58 : \
59 : [rt] "d" (value)); \
60} while (0)
61
62/*
63 * The value is the final block dword (64-bit).
64 */
65#define octeon_md5_start(value) \
66do { \
67 __asm__ __volatile__ ( \
68 "dmtc2 %[rt],0x4047" \
69 : \
70 : [rt] "d" (value)); \
71} while (0)
72
f421258d 73#endif /* __LINUX_OCTEON_CRYPTO_H */
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