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5b3b1688 DD |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 2007 by Ralf Baechle | |
7 | */ | |
8 | #include <linux/clocksource.h> | |
9 | #include <linux/init.h> | |
10 | ||
11 | #include <asm/time.h> | |
12 | ||
13 | #include <asm/octeon/octeon.h> | |
14 | #include <asm/octeon/cvmx-ipd-defs.h> | |
15 | ||
16 | /* | |
17 | * Set the current core's cvmcount counter to the value of the | |
18 | * IPD_CLK_COUNT. We do this on all cores as they are brought | |
19 | * on-line. This allows for a read from a local cpu register to | |
20 | * access a synchronized counter. | |
21 | * | |
22 | */ | |
23 | void octeon_init_cvmcount(void) | |
24 | { | |
25 | unsigned long flags; | |
26 | unsigned loops = 2; | |
27 | ||
28 | /* Clobber loops so GCC will not unroll the following while loop. */ | |
29 | asm("" : "+r" (loops)); | |
30 | ||
31 | local_irq_save(flags); | |
32 | /* | |
33 | * Loop several times so we are executing from the cache, | |
34 | * which should give more deterministic timing. | |
35 | */ | |
36 | while (loops--) | |
37 | write_c0_cvmcount(cvmx_read_csr(CVMX_IPD_CLK_COUNT)); | |
38 | local_irq_restore(flags); | |
39 | } | |
40 | ||
d0ce9a5a | 41 | static cycle_t octeon_cvmcount_read(struct clocksource *cs) |
5b3b1688 DD |
42 | { |
43 | return read_c0_cvmcount(); | |
44 | } | |
45 | ||
46 | static struct clocksource clocksource_mips = { | |
47 | .name = "OCTEON_CVMCOUNT", | |
48 | .read = octeon_cvmcount_read, | |
49 | .mask = CLOCKSOURCE_MASK(64), | |
50 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | |
51 | }; | |
52 | ||
c6a3c851 DD |
53 | unsigned long long notrace sched_clock(void) |
54 | { | |
0e8a1d82 DD |
55 | /* 64-bit arithmatic can overflow, so use 128-bit. */ |
56 | #if (__GNUC__ < 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ <= 3)) | |
57 | u64 t1, t2, t3; | |
58 | unsigned long long rv; | |
59 | u64 mult = clocksource_mips.mult; | |
60 | u64 shift = clocksource_mips.shift; | |
61 | u64 cnt = read_c0_cvmcount(); | |
62 | ||
63 | asm ( | |
64 | "dmultu\t%[cnt],%[mult]\n\t" | |
65 | "nor\t%[t1],$0,%[shift]\n\t" | |
66 | "mfhi\t%[t2]\n\t" | |
67 | "mflo\t%[t3]\n\t" | |
68 | "dsll\t%[t2],%[t2],1\n\t" | |
69 | "dsrlv\t%[rv],%[t3],%[shift]\n\t" | |
70 | "dsllv\t%[t1],%[t2],%[t1]\n\t" | |
71 | "or\t%[rv],%[t1],%[rv]\n\t" | |
72 | : [rv] "=&r" (rv), [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" (t3) | |
73 | : [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift) | |
74 | : "hi", "lo"); | |
75 | return rv; | |
76 | #else | |
77 | /* GCC > 4.3 do it the easy way. */ | |
78 | unsigned int __attribute__((mode(TI))) t; | |
79 | t = read_c0_cvmcount(); | |
80 | t = t * clocksource_mips.mult; | |
81 | return (unsigned long long)(t >> clocksource_mips.shift); | |
82 | #endif | |
c6a3c851 DD |
83 | } |
84 | ||
5b3b1688 DD |
85 | void __init plat_time_init(void) |
86 | { | |
87 | clocksource_mips.rating = 300; | |
88 | clocksource_set_clock(&clocksource_mips, mips_hpt_frequency); | |
89 | clocksource_register(&clocksource_mips); | |
90 | } |