projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 | 1 | /* |
| 1da177e4 LT |
2 | * O32 interface for the 64 (or N32) ABI. |
| 3 | * | |
| 4 | * Copyright (C) 2002 Maciej W. Rozycki | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or | |
| 7 | * modify it under the terms of the GNU General Public License | |
| 8 | * as published by the Free Software Foundation; either version | |
| 9 | * 2 of the License, or (at your option) any later version. | |
| 10 | */ | |
| 11 | ||
| 12 | #include <asm/asm.h> | |
| 13 | #include <asm/regdef.h> | |
| 14 | ||
| 15 | /* Maximum number of arguments supported. Must be even! */ | |
| 16 | #define O32_ARGC 32 | |
| 07217d75 | 17 | /* Number of static registers we save. */ |
| 1da177e4 LT |
18 | #define O32_STATC 11 |
| 19 | /* Frame size for both of the above. */ | |
| 20 | #define O32_FRAMESZ (4 * O32_ARGC + SZREG * O32_STATC) | |
| 21 | ||
| 22 | .text | |
| 23 | ||
| 24 | /* | |
| 25 | * O32 function call dispatcher, for interfacing 32-bit ROM routines. | |
| 26 | * | |
| 27 | * The standard 64 (N32) calling sequence is supported, with a0 | |
| 28 | * holding a function pointer, a1-a7 -- its first seven arguments | |
| 29 | * and the stack -- remaining ones (up to O32_ARGC, including a1-a7). | |
| 30 | * Static registers, gp and fp are preserved, v0 holds a result. | |
| 31 | * This code relies on the called o32 function for sp and ra | |
| 32 | * restoration and thus both this dispatcher and the current stack | |
| 33 | * have to be placed in a KSEGx (or KUSEG) address space. Any | |
| 34 | * pointers passed have to point to addresses within one of these | |
| 35 | * spaces as well. | |
| 36 | */ | |
| 37 | NESTED(call_o32, O32_FRAMESZ, ra) | |
| 38 | REG_SUBU sp,O32_FRAMESZ | |
| 39 | ||
| 40 | REG_S ra,O32_FRAMESZ-1*SZREG(sp) | |
| 41 | REG_S fp,O32_FRAMESZ-2*SZREG(sp) | |
| 42 | REG_S gp,O32_FRAMESZ-3*SZREG(sp) | |
| 43 | REG_S s7,O32_FRAMESZ-4*SZREG(sp) | |
| 44 | REG_S s6,O32_FRAMESZ-5*SZREG(sp) | |
| 45 | REG_S s5,O32_FRAMESZ-6*SZREG(sp) | |
| 46 | REG_S s4,O32_FRAMESZ-7*SZREG(sp) | |
| 47 | REG_S s3,O32_FRAMESZ-8*SZREG(sp) | |
| 48 | REG_S s2,O32_FRAMESZ-9*SZREG(sp) | |
| 49 | REG_S s1,O32_FRAMESZ-10*SZREG(sp) | |
| 50 | REG_S s0,O32_FRAMESZ-11*SZREG(sp) | |
| 51 | ||
| 52 | move jp,a0 | |
| 53 | ||
| 54 | sll a0,a1,zero | |
| 55 | sll a1,a2,zero | |
| 56 | sll a2,a3,zero | |
| 57 | sll a3,a4,zero | |
| 58 | sw a5,0x10(sp) | |
| 59 | sw a6,0x14(sp) | |
| 60 | sw a7,0x18(sp) | |
| 61 | ||
| 62 | PTR_LA t0,O32_FRAMESZ(sp) | |
| 63 | PTR_LA t1,0x1c(sp) | |
| 64 | li t2,O32_ARGC-7 | |
| 65 | 1: | |
| 66 | lw t3,(t0) | |
| 67 | REG_ADDU t0,SZREG | |
| 68 | sw t3,(t1) | |
| 69 | REG_SUBU t2,1 | |
| 70 | REG_ADDU t1,4 | |
| 71 | bnez t2,1b | |
| 72 | ||
| 73 | jalr jp | |
| 74 | ||
| 75 | REG_L s0,O32_FRAMESZ-11*SZREG(sp) | |
| 76 | REG_L s1,O32_FRAMESZ-10*SZREG(sp) | |
| 77 | REG_L s2,O32_FRAMESZ-9*SZREG(sp) | |
| 78 | REG_L s3,O32_FRAMESZ-8*SZREG(sp) | |
| 79 | REG_L s4,O32_FRAMESZ-7*SZREG(sp) | |
| 80 | REG_L s5,O32_FRAMESZ-6*SZREG(sp) | |
| 81 | REG_L s6,O32_FRAMESZ-5*SZREG(sp) | |
| 82 | REG_L s7,O32_FRAMESZ-4*SZREG(sp) | |
| 83 | REG_L gp,O32_FRAMESZ-3*SZREG(sp) | |
| 84 | REG_L fp,O32_FRAMESZ-2*SZREG(sp) | |
| 85 | REG_L ra,O32_FRAMESZ-1*SZREG(sp) | |
| 86 | ||
| 87 | REG_ADDU sp,O32_FRAMESZ | |
| 88 | jr ra | |
| 89 | END(call_o32) |