[deliverable/linux.git] / arch / mips / include / asm / atomic.h

/*
 * Atomic operations that C can't guarantee us.  Useful for
 * resource counting etc..
 *
 * But use these as seldom as possible since they are much more slower
 * than regular operations.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1996, 97, 99, 2000, 03, 04, 06 by Ralf Baechle
 */
#ifndef _ASM_ATOMIC_H
#define _ASM_ATOMIC_H

#include <linux/irqflags.h>
#include <linux/types.h>
#include <asm/barrier.h>
#include <asm/compiler.h>
#include <asm/cpu-features.h>
#include <asm/cmpxchg.h>
#include <asm/war.h>

#define ATOMIC_INIT(i)	  { (i) }

/*
 * atomic_read - read atomic variable
 * @v: pointer of type atomic_t
 *
 * Atomically reads the value of @v.
 */
#define atomic_read(v)		READ_ONCE((v)->counter)

/*
 * atomic_set - set atomic variable
 * @v: pointer of type atomic_t
 * @i: required value
 *
 * Atomically sets the value of @v to @i.
 */
#define atomic_set(v, i)	WRITE_ONCE((v)->counter, (i))

#define ATOMIC_OP(op, c_op, asm_op)					      \
static __inline__ void atomic_##op(int i, atomic_t * v)			      \
{									      \
	if (kernel_uses_llsc && R10000_LLSC_WAR) {			      \
		int temp;						      \
									      \
		__asm__ __volatile__(					      \
		"	.set	arch=r4000				\n"   \
		"1:	ll	%0, %1		# atomic_" #op "	\n"   \
		"	" #asm_op " %0, %2				\n"   \
		"	sc	%0, %1					\n"   \
		"	beqzl	%0, 1b					\n"   \
		"	.set	mips0					\n"   \
		: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter)	      \
		: "Ir" (i));						      \
	} else if (kernel_uses_llsc) {					      \
		int temp;						      \
									      \
		do {							      \
			__asm__ __volatile__(				      \
			"	.set	"MIPS_ISA_LEVEL"		\n"   \
			"	ll	%0, %1		# atomic_" #op "\n"   \
			"	" #asm_op " %0, %2			\n"   \
			"	sc	%0, %1				\n"   \
			"	.set	mips0				\n"   \
			: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter)      \
			: "Ir" (i));					      \
		} while (unlikely(!temp));				      \
	} else {							      \
		unsigned long flags;					      \
									      \
		raw_local_irq_save(flags);				      \
		v->counter c_op i;					      \
		raw_local_irq_restore(flags);				      \
	}								      \
}

#define ATOMIC_OP_RETURN(op, c_op, asm_op)				      \
static __inline__ int atomic_##op##_return(int i, atomic_t * v)		      \
{									      \
	int result;							      \
									      \
	smp_mb__before_llsc();						      \
									      \
	if (kernel_uses_llsc && R10000_LLSC_WAR) {			      \
		int temp;						      \
									      \
		__asm__ __volatile__(					      \
		"	.set	arch=r4000				\n"   \
		"1:	ll	%1, %2		# atomic_" #op "_return	\n"   \
		"	" #asm_op " %0, %1, %3				\n"   \
		"	sc	%0, %2					\n"   \
		"	beqzl	%0, 1b					\n"   \
		"	" #asm_op " %0, %1, %3				\n"   \
		"	.set	mips0					\n"   \
		: "=&r" (result), "=&r" (temp),				      \
		  "+" GCC_OFF_SMALL_ASM() (v->counter)			      \
		: "Ir" (i));						      \
	} else if (kernel_uses_llsc) {					      \
		int temp;						      \
									      \
		do {							      \
			__asm__ __volatile__(				      \
			"	.set	"MIPS_ISA_LEVEL"		\n"   \
			"	ll	%1, %2	# atomic_" #op "_return	\n"   \
			"	" #asm_op " %0, %1, %3			\n"   \
			"	sc	%0, %2				\n"   \
			"	.set	mips0				\n"   \
			: "=&r" (result), "=&r" (temp),			      \
			  "+" GCC_OFF_SMALL_ASM() (v->counter)		      \
			: "Ir" (i));					      \
		} while (unlikely(!result));				      \
									      \
		result = temp; result c_op i;				      \
	} else {							      \
		unsigned long flags;					      \
									      \
		raw_local_irq_save(flags);				      \
		result = v->counter;					      \
		result c_op i;						      \
		v->counter = result;					      \
		raw_local_irq_restore(flags);				      \
	}								      \
									      \
	smp_llsc_mb();							      \
									      \
	return result;							      \
}

#define ATOMIC_OPS(op, c_op, asm_op)					      \
	ATOMIC_OP(op, c_op, asm_op)					      \
	ATOMIC_OP_RETURN(op, c_op, asm_op)

ATOMIC_OPS(add, +=, addu)
ATOMIC_OPS(sub, -=, subu)

ATOMIC_OP(and, &=, and)
ATOMIC_OP(or, |=, or)
ATOMIC_OP(xor, ^=, xor)

#undef ATOMIC_OPS
#undef ATOMIC_OP_RETURN
#undef ATOMIC_OP

/*
 * atomic_sub_if_positive - conditionally subtract integer from atomic variable
 * @i: integer value to subtract
 * @v: pointer of type atomic_t
 *
 * Atomically test @v and subtract @i if @v is greater or equal than @i.
 * The function returns the old value of @v minus @i.
 */
static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
{
	int result;

	smp_mb__before_llsc();

	if (kernel_uses_llsc && R10000_LLSC_WAR) {
		int temp;

		__asm__ __volatile__(
		"	.set	arch=r4000				\n"
		"1:	ll	%1, %2		# atomic_sub_if_positive\n"
		"	subu	%0, %1, %3				\n"
		"	bltz	%0, 1f					\n"
		"	sc	%0, %2					\n"
		"	.set	noreorder				\n"
		"	beqzl	%0, 1b					\n"
		"	 subu	%0, %1, %3				\n"
		"	.set	reorder					\n"
		"1:							\n"
		"	.set	mips0					\n"
		: "=&r" (result), "=&r" (temp),
		  "+" GCC_OFF_SMALL_ASM() (v->counter)
		: "Ir" (i), GCC_OFF_SMALL_ASM() (v->counter)
		: "memory");
	} else if (kernel_uses_llsc) {
		int temp;

		__asm__ __volatile__(
		"	.set	"MIPS_ISA_LEVEL"			\n"
		"1:	ll	%1, %2		# atomic_sub_if_positive\n"
		"	subu	%0, %1, %3				\n"
		"	bltz	%0, 1f					\n"
		"	sc	%0, %2					\n"
		"	.set	noreorder				\n"
		"	beqz	%0, 1b					\n"
		"	 subu	%0, %1, %3				\n"
		"	.set	reorder					\n"
		"1:							\n"
		"	.set	mips0					\n"
		: "=&r" (result), "=&r" (temp),
		  "+" GCC_OFF_SMALL_ASM() (v->counter)
		: "Ir" (i));
	} else {
		unsigned long flags;

		raw_local_irq_save(flags);
		result = v->counter;
		result -= i;
		if (result >= 0)
			v->counter = result;
		raw_local_irq_restore(flags);
	}

	smp_llsc_mb();

	return result;
}

#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
#define atomic_xchg(v, new) (xchg(&((v)->counter), (new)))

/**
 * __atomic_add_unless - add unless the number is a given value
 * @v: pointer of type atomic_t
 * @a: the amount to add to v...
 * @u: ...unless v is equal to u.
 *
 * Atomically adds @a to @v, so long as it was not @u.
 * Returns the old value of @v.
 */
static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
{
	int c, old;
	c = atomic_read(v);
	for (;;) {
		if (unlikely(c == (u)))
			break;
		old = atomic_cmpxchg((v), c, c + (a));
		if (likely(old == c))
			break;
		c = old;
	}
	return c;
}

#define atomic_dec_return(v) atomic_sub_return(1, (v))
#define atomic_inc_return(v) atomic_add_return(1, (v))

/*
 * atomic_sub_and_test - subtract value from variable and test result
 * @i: integer value to subtract
 * @v: pointer of type atomic_t
 *
 * Atomically subtracts @i from @v and returns
 * true if the result is zero, or false for all
 * other cases.
 */
#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)

/*
 * atomic_inc_and_test - increment and test
 * @v: pointer of type atomic_t
 *
 * Atomically increments @v by 1
 * and returns true if the result is zero, or false for all
 * other cases.
 */
#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)

/*
 * atomic_dec_and_test - decrement by 1 and test
 * @v: pointer of type atomic_t
 *
 * Atomically decrements @v by 1 and
 * returns true if the result is 0, or false for all other
 * cases.
 */
#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)

/*
 * atomic_dec_if_positive - decrement by 1 if old value positive
 * @v: pointer of type atomic_t
 */
#define atomic_dec_if_positive(v)	atomic_sub_if_positive(1, v)

/*
 * atomic_inc - increment atomic variable
 * @v: pointer of type atomic_t
 *
 * Atomically increments @v by 1.
 */
#define atomic_inc(v) atomic_add(1, (v))

/*
 * atomic_dec - decrement and test
 * @v: pointer of type atomic_t
 *
 * Atomically decrements @v by 1.
 */
#define atomic_dec(v) atomic_sub(1, (v))

/*
 * atomic_add_negative - add and test if negative
 * @v: pointer of type atomic_t
 * @i: integer value to add
 *
 * Atomically adds @i to @v and returns true
 * if the result is negative, or false when
 * result is greater than or equal to zero.
 */
#define atomic_add_negative(i, v) (atomic_add_return(i, (v)) < 0)

#ifdef CONFIG_64BIT

#define ATOMIC64_INIT(i)    { (i) }

/*
 * atomic64_read - read atomic variable
 * @v: pointer of type atomic64_t
 *
 */
#define atomic64_read(v)	READ_ONCE((v)->counter)

/*
 * atomic64_set - set atomic variable
 * @v: pointer of type atomic64_t
 * @i: required value
 */
#define atomic64_set(v, i)	WRITE_ONCE((v)->counter, (i))

#define ATOMIC64_OP(op, c_op, asm_op)					      \
static __inline__ void atomic64_##op(long i, atomic64_t * v)		      \
{									      \
	if (kernel_uses_llsc && R10000_LLSC_WAR) {			      \
		long temp;						      \
									      \
		__asm__ __volatile__(					      \
		"	.set	arch=r4000				\n"   \
		"1:	lld	%0, %1		# atomic64_" #op "	\n"   \
		"	" #asm_op " %0, %2				\n"   \
		"	scd	%0, %1					\n"   \
		"	beqzl	%0, 1b					\n"   \
		"	.set	mips0					\n"   \
		: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter)	      \
		: "Ir" (i));						      \
	} else if (kernel_uses_llsc) {					      \
		long temp;						      \
									      \
		do {							      \
			__asm__ __volatile__(				      \
			"	.set	"MIPS_ISA_LEVEL"		\n"   \
			"	lld	%0, %1		# atomic64_" #op "\n" \
			"	" #asm_op " %0, %2			\n"   \
			"	scd	%0, %1				\n"   \
			"	.set	mips0				\n"   \
			: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter)      \
			: "Ir" (i));					      \
		} while (unlikely(!temp));				      \
	} else {							      \
		unsigned long flags;					      \
									      \
		raw_local_irq_save(flags);				      \
		v->counter c_op i;					      \
		raw_local_irq_restore(flags);				      \
	}								      \
}

#define ATOMIC64_OP_RETURN(op, c_op, asm_op)				      \
static __inline__ long atomic64_##op##_return(long i, atomic64_t * v)	      \
{									      \
	long result;							      \
									      \
	smp_mb__before_llsc();						      \
									      \
	if (kernel_uses_llsc && R10000_LLSC_WAR) {			      \
		long temp;						      \
									      \
		__asm__ __volatile__(					      \
		"	.set	arch=r4000				\n"   \
		"1:	lld	%1, %2		# atomic64_" #op "_return\n"  \
		"	" #asm_op " %0, %1, %3				\n"   \
		"	scd	%0, %2					\n"   \
		"	beqzl	%0, 1b					\n"   \
		"	" #asm_op " %0, %1, %3				\n"   \
		"	.set	mips0					\n"   \
		: "=&r" (result), "=&r" (temp),				      \
		  "+" GCC_OFF_SMALL_ASM() (v->counter)			      \
		: "Ir" (i));						      \
	} else if (kernel_uses_llsc) {					      \
		long temp;						      \
									      \
		do {							      \
			__asm__ __volatile__(				      \
			"	.set	"MIPS_ISA_LEVEL"		\n"   \
			"	lld	%1, %2	# atomic64_" #op "_return\n"  \
			"	" #asm_op " %0, %1, %3			\n"   \
			"	scd	%0, %2				\n"   \
			"	.set	mips0				\n"   \
			: "=&r" (result), "=&r" (temp),			      \
			  "=" GCC_OFF_SMALL_ASM() (v->counter)		      \
			: "Ir" (i), GCC_OFF_SMALL_ASM() (v->counter)	      \
			: "memory");					      \
		} while (unlikely(!result));				      \
									      \
		result = temp; result c_op i;				      \
	} else {							      \
		unsigned long flags;					      \
									      \
		raw_local_irq_save(flags);				      \
		result = v->counter;					      \
		result c_op i;						      \
		v->counter = result;					      \
		raw_local_irq_restore(flags);				      \
	}								      \
									      \
	smp_llsc_mb();							      \
									      \
	return result;							      \
}

#define ATOMIC64_OPS(op, c_op, asm_op)					      \
	ATOMIC64_OP(op, c_op, asm_op)					      \
	ATOMIC64_OP_RETURN(op, c_op, asm_op)

ATOMIC64_OPS(add, +=, daddu)
ATOMIC64_OPS(sub, -=, dsubu)
ATOMIC64_OP(and, &=, and)
ATOMIC64_OP(or, |=, or)
ATOMIC64_OP(xor, ^=, xor)

#undef ATOMIC64_OPS
#undef ATOMIC64_OP_RETURN
#undef ATOMIC64_OP

/*
 * atomic64_sub_if_positive - conditionally subtract integer from atomic
 *                            variable
 * @i: integer value to subtract
 * @v: pointer of type atomic64_t
 *
 * Atomically test @v and subtract @i if @v is greater or equal than @i.
 * The function returns the old value of @v minus @i.
 */
static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
{
	long result;

	smp_mb__before_llsc();

	if (kernel_uses_llsc && R10000_LLSC_WAR) {
		long temp;

		__asm__ __volatile__(
		"	.set	arch=r4000				\n"
		"1:	lld	%1, %2		# atomic64_sub_if_positive\n"
		"	dsubu	%0, %1, %3				\n"
		"	bltz	%0, 1f					\n"
		"	scd	%0, %2					\n"
		"	.set	noreorder				\n"
		"	beqzl	%0, 1b					\n"
		"	 dsubu	%0, %1, %3				\n"
		"	.set	reorder					\n"
		"1:							\n"
		"	.set	mips0					\n"
		: "=&r" (result), "=&r" (temp),
		  "=" GCC_OFF_SMALL_ASM() (v->counter)
		: "Ir" (i), GCC_OFF_SMALL_ASM() (v->counter)
		: "memory");
	} else if (kernel_uses_llsc) {
		long temp;

		__asm__ __volatile__(
		"	.set	"MIPS_ISA_LEVEL"			\n"
		"1:	lld	%1, %2		# atomic64_sub_if_positive\n"
		"	dsubu	%0, %1, %3				\n"
		"	bltz	%0, 1f					\n"
		"	scd	%0, %2					\n"
		"	.set	noreorder				\n"
		"	beqz	%0, 1b					\n"
		"	 dsubu	%0, %1, %3				\n"
		"	.set	reorder					\n"
		"1:							\n"
		"	.set	mips0					\n"
		: "=&r" (result), "=&r" (temp),
		  "+" GCC_OFF_SMALL_ASM() (v->counter)
		: "Ir" (i));
	} else {
		unsigned long flags;

		raw_local_irq_save(flags);
		result = v->counter;
		result -= i;
		if (result >= 0)
			v->counter = result;
		raw_local_irq_restore(flags);
	}

	smp_llsc_mb();

	return result;
}

#define atomic64_cmpxchg(v, o, n) \
	((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
#define atomic64_xchg(v, new) (xchg(&((v)->counter), (new)))

/**
 * atomic64_add_unless - add unless the number is a given value
 * @v: pointer of type atomic64_t
 * @a: the amount to add to v...
 * @u: ...unless v is equal to u.
 *
 * Atomically adds @a to @v, so long as it was not @u.
 * Returns true iff @v was not @u.
 */
static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
{
	long c, old;
	c = atomic64_read(v);
	for (;;) {
		if (unlikely(c == (u)))
			break;
		old = atomic64_cmpxchg((v), c, c + (a));
		if (likely(old == c))
			break;
		c = old;
	}
	return c != (u);
}

#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)

#define atomic64_dec_return(v) atomic64_sub_return(1, (v))
#define atomic64_inc_return(v) atomic64_add_return(1, (v))

/*
 * atomic64_sub_and_test - subtract value from variable and test result
 * @i: integer value to subtract
 * @v: pointer of type atomic64_t
 *
 * Atomically subtracts @i from @v and returns
 * true if the result is zero, or false for all
 * other cases.
 */
#define atomic64_sub_and_test(i, v) (atomic64_sub_return((i), (v)) == 0)

/*
 * atomic64_inc_and_test - increment and test
 * @v: pointer of type atomic64_t
 *
 * Atomically increments @v by 1
 * and returns true if the result is zero, or false for all
 * other cases.
 */
#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)

/*
 * atomic64_dec_and_test - decrement by 1 and test
 * @v: pointer of type atomic64_t
 *
 * Atomically decrements @v by 1 and
 * returns true if the result is 0, or false for all other
 * cases.
 */
#define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0)

/*
 * atomic64_dec_if_positive - decrement by 1 if old value positive
 * @v: pointer of type atomic64_t
 */
#define atomic64_dec_if_positive(v)	atomic64_sub_if_positive(1, v)

/*
 * atomic64_inc - increment atomic variable
 * @v: pointer of type atomic64_t
 *
 * Atomically increments @v by 1.
 */
#define atomic64_inc(v) atomic64_add(1, (v))

/*
 * atomic64_dec - decrement and test
 * @v: pointer of type atomic64_t
 *
 * Atomically decrements @v by 1.
 */
#define atomic64_dec(v) atomic64_sub(1, (v))

/*
 * atomic64_add_negative - add and test if negative
 * @v: pointer of type atomic64_t
 * @i: integer value to add
 *
 * Atomically adds @i to @v and returns true
 * if the result is negative, or false when
 * result is greater than or equal to zero.
 */
#define atomic64_add_negative(i, v) (atomic64_add_return(i, (v)) < 0)

#endif /* CONFIG_64BIT */

#endif /* _ASM_ATOMIC_H */
Commit	Line	Data
1da177e4	1	/*
edf7b938	2	* Atomic operations that C can't guarantee us. Useful for
1da177e4 LT	3	* resource counting etc..
	4	*
	5	* But use these as seldom as possible since they are much more slower
	6	* than regular operations.
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License. See the file "COPYING" in the main directory of this archive
	10	* for more details.
	11	*
e303e088	12	* Copyright (C) 1996, 97, 99, 2000, 03, 04, 06 by Ralf Baechle
1da177e4	13	*/
1da177e4 LT	14	#ifndef _ASM_ATOMIC_H
	15	#define _ASM_ATOMIC_H
	16
192ef366	17	#include <linux/irqflags.h>
ea435467	18	#include <linux/types.h>
0004a9df	19	#include <asm/barrier.h>
b0984c43	20	#include <asm/compiler.h>
1da177e4	21	#include <asm/cpu-features.h>
b81947c6	22	#include <asm/cmpxchg.h>
1da177e4 LT	23	#include <asm/war.h>
1da177e4 LT	24
70342287	25	#define ATOMIC_INIT(i) { (i) }
1da177e4 LT	26
	27	/*
	28	* atomic_read - read atomic variable
	29	* @v: pointer of type atomic_t
	30	*
	31	* Atomically reads the value of @v.
	32	*/
62e8a325	33	#define atomic_read(v) READ_ONCE((v)->counter)
1da177e4 LT	34
	35	/*
	36	* atomic_set - set atomic variable
	37	* @v: pointer of type atomic_t
	38	* @i: required value
	39	*
	40	* Atomically sets the value of @v to @i.
	41	*/
62e8a325	42	#define atomic_set(v, i) WRITE_ONCE((v)->counter, (i))
1da177e4	43
ddb3108e MR	44	#define ATOMIC_OP(op, c_op, asm_op) \
	45	static __inline__ void atomic_##op(int i, atomic_t * v) \
	46	{ \
	47	if (kernel_uses_llsc && R10000_LLSC_WAR) { \
	48	int temp; \
	49	\
	50	__asm__ __volatile__( \
	51	" .set arch=r4000 \n" \
	52	"1: ll %0, %1 # atomic_" #op " \n" \
	53	" " #asm_op " %0, %2 \n" \
	54	" sc %0, %1 \n" \
	55	" beqzl %0, 1b \n" \
	56	" .set mips0 \n" \
94bfb75a	57	: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
ddb3108e MR	58	: "Ir" (i)); \
	59	} else if (kernel_uses_llsc) { \
	60	int temp; \
	61	\
	62	do { \
	63	__asm__ __volatile__( \
0038df22	64	" .set "MIPS_ISA_LEVEL" \n" \
ddb3108e MR	65	" ll %0, %1 # atomic_" #op "\n" \
	66	" " #asm_op " %0, %2 \n" \
	67	" sc %0, %1 \n" \
	68	" .set mips0 \n" \
94bfb75a	69	: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
ddb3108e MR	70	: "Ir" (i)); \
	71	} while (unlikely(!temp)); \
	72	} else { \
	73	unsigned long flags; \
	74	\
	75	raw_local_irq_save(flags); \
	76	v->counter c_op i; \
	77	raw_local_irq_restore(flags); \
	78	} \
1da177e4 LT	79	}
1da177e4 LT	80
ddb3108e MR	81	#define ATOMIC_OP_RETURN(op, c_op, asm_op) \
	82	static __inline__ int atomic_##op##_return(int i, atomic_t * v) \
	83	{ \
	84	int result; \
	85	\
	86	smp_mb__before_llsc(); \
	87	\
	88	if (kernel_uses_llsc && R10000_LLSC_WAR) { \
	89	int temp; \
	90	\
	91	__asm__ __volatile__( \
	92	" .set arch=r4000 \n" \
	93	"1: ll %1, %2 # atomic_" #op "_return \n" \
	94	" " #asm_op " %0, %1, %3 \n" \
	95	" sc %0, %2 \n" \
	96	" beqzl %0, 1b \n" \
	97	" " #asm_op " %0, %1, %3 \n" \
	98	" .set mips0 \n" \
	99	: "=&r" (result), "=&r" (temp), \
94bfb75a	100	"+" GCC_OFF_SMALL_ASM() (v->counter) \
ddb3108e MR	101	: "Ir" (i)); \
	102	} else if (kernel_uses_llsc) { \
	103	int temp; \
	104	\
	105	do { \
	106	__asm__ __volatile__( \
0038df22	107	" .set "MIPS_ISA_LEVEL" \n" \
ddb3108e MR	108	" ll %1, %2 # atomic_" #op "_return \n" \
	109	" " #asm_op " %0, %1, %3 \n" \
	110	" sc %0, %2 \n" \
	111	" .set mips0 \n" \
	112	: "=&r" (result), "=&r" (temp), \
94bfb75a	113	"+" GCC_OFF_SMALL_ASM() (v->counter) \
ddb3108e MR	114	: "Ir" (i)); \
	115	} while (unlikely(!result)); \
	116	\
	117	result = temp; result c_op i; \
	118	} else { \
	119	unsigned long flags; \
	120	\
	121	raw_local_irq_save(flags); \
	122	result = v->counter; \
	123	result c_op i; \
	124	v->counter = result; \
	125	raw_local_irq_restore(flags); \
	126	} \
	127	\
	128	smp_llsc_mb(); \
	129	\
	130	return result; \
	131	}
	132
	133	#define ATOMIC_OPS(op, c_op, asm_op) \
	134	ATOMIC_OP(op, c_op, asm_op) \
ef31563e	135	ATOMIC_OP_RETURN(op, c_op, asm_op)
1da177e4	136
ef31563e PZ	137	ATOMIC_OPS(add, +=, addu)
ef31563e PZ	138	ATOMIC_OPS(sub, -=, subu)
1da177e4	139
27782f27 PZ	140	ATOMIC_OP(and, &=, and)
	141	ATOMIC_OP(or, \|=, or)
	142	ATOMIC_OP(xor, ^=, xor)
	143
ef31563e PZ	144	#undef ATOMIC_OPS
	145	#undef ATOMIC_OP_RETURN
	146	#undef ATOMIC_OP
1da177e4 LT	147
1da177e4 LT	148	/*
f10d14dd AG	149	* atomic_sub_if_positive - conditionally subtract integer from atomic variable
f10d14dd AG	150	* @i: integer value to subtract
1da177e4 LT	151	* @v: pointer of type atomic_t
1da177e4 LT	152	*
f10d14dd AG	153	* Atomically test @v and subtract @i if @v is greater or equal than @i.
f10d14dd AG	154	* The function returns the old value of @v minus @i.
1da177e4 LT	155	*/
	156	static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
	157	{
915ec1e2	158	int result;
1da177e4	159
f252ffd5	160	smp_mb__before_llsc();
0004a9df	161
b791d119	162	if (kernel_uses_llsc && R10000_LLSC_WAR) {
915ec1e2	163	int temp;
1da177e4 LT	164
1da177e4 LT	165	__asm__ __volatile__(
a809d460	166	" .set arch=r4000 \n"
1da177e4 LT	167	"1: ll %1, %2 # atomic_sub_if_positive\n"
	168	" subu %0, %1, %3 \n"
	169	" bltz %0, 1f \n"
	170	" sc %0, %2 \n"
92f22c18	171	" .set noreorder \n"
1da177e4	172	" beqzl %0, 1b \n"
92f22c18 RB	173	" subu %0, %1, %3 \n"
92f22c18 RB	174	" .set reorder \n"
1da177e4	175	"1: \n"
aac8aa77	176	" .set mips0 \n"
b0984c43	177	: "=&r" (result), "=&r" (temp),
94bfb75a MC	178	"+" GCC_OFF_SMALL_ASM() (v->counter)
94bfb75a MC	179	: "Ir" (i), GCC_OFF_SMALL_ASM() (v->counter)
1da177e4	180	: "memory");
b791d119	181	} else if (kernel_uses_llsc) {
915ec1e2	182	int temp;
1da177e4 LT	183
1da177e4 LT	184	__asm__ __volatile__(
0038df22	185	" .set "MIPS_ISA_LEVEL" \n"
1da177e4 LT	186	"1: ll %1, %2 # atomic_sub_if_positive\n"
	187	" subu %0, %1, %3 \n"
	188	" bltz %0, 1f \n"
	189	" sc %0, %2 \n"
92f22c18	190	" .set noreorder \n"
7837314d	191	" beqz %0, 1b \n"
92f22c18 RB	192	" subu %0, %1, %3 \n"
92f22c18 RB	193	" .set reorder \n"
50952026	194	"1: \n"
aac8aa77	195	" .set mips0 \n"
b0984c43	196	: "=&r" (result), "=&r" (temp),
94bfb75a	197	"+" GCC_OFF_SMALL_ASM() (v->counter)
b4f2a17b	198	: "Ir" (i));
1da177e4 LT	199	} else {
	200	unsigned long flags;
	201
49edd098	202	raw_local_irq_save(flags);
1da177e4 LT	203	result = v->counter;
	204	result -= i;
	205	if (result >= 0)
	206	v->counter = result;
49edd098	207	raw_local_irq_restore(flags);
1da177e4 LT	208	}
1da177e4 LT	209
17099b11	210	smp_llsc_mb();
0004a9df	211
1da177e4 LT	212	return result;
	213	}
	214
e12f644b MD	215	#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
e12f644b MD	216	#define atomic_xchg(v, new) (xchg(&((v)->counter), (new)))
4a6dae6d	217
8426e1f6	218	/**
f24219b4	219	* __atomic_add_unless - add unless the number is a given value
8426e1f6 NP	220	* @v: pointer of type atomic_t
	221	* @a: the amount to add to v...
	222	* @u: ...unless v is equal to u.
	223	*
	224	* Atomically adds @a to @v, so long as it was not @u.
f24219b4	225	* Returns the old value of @v.
8426e1f6	226	*/
f24219b4	227	static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
2856f5e3 MD	228	{
	229	int c, old;
	230	c = atomic_read(v);
	231	for (;;) {
	232	if (unlikely(c == (u)))
	233	break;
	234	old = atomic_cmpxchg((v), c, c + (a));
	235	if (likely(old == c))
	236	break;
	237	c = old;
	238	}
f24219b4	239	return c;
2856f5e3	240	}
8426e1f6	241
21a151d8 RB	242	#define atomic_dec_return(v) atomic_sub_return(1, (v))
21a151d8 RB	243	#define atomic_inc_return(v) atomic_add_return(1, (v))
1da177e4 LT	244
	245	/*
	246	* atomic_sub_and_test - subtract value from variable and test result
	247	* @i: integer value to subtract
	248	* @v: pointer of type atomic_t
	249	*
	250	* Atomically subtracts @i from @v and returns
	251	* true if the result is zero, or false for all
	252	* other cases.
	253	*/
21a151d8	254	#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)
1da177e4 LT	255
	256	/*
	257	* atomic_inc_and_test - increment and test
	258	* @v: pointer of type atomic_t
	259	*
	260	* Atomically increments @v by 1
	261	* and returns true if the result is zero, or false for all
	262	* other cases.
	263	*/
	264	#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
	265
	266	/*
	267	* atomic_dec_and_test - decrement by 1 and test
	268	* @v: pointer of type atomic_t
	269	*
	270	* Atomically decrements @v by 1 and
	271	* returns true if the result is 0, or false for all other
	272	* cases.
	273	*/
	274	#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
	275
	276	/*
	277	* atomic_dec_if_positive - decrement by 1 if old value positive
	278	* @v: pointer of type atomic_t
	279	*/
	280	#define atomic_dec_if_positive(v) atomic_sub_if_positive(1, v)
	281
	282	/*
	283	* atomic_inc - increment atomic variable
	284	* @v: pointer of type atomic_t
	285	*
	286	* Atomically increments @v by 1.
	287	*/
21a151d8	288	#define atomic_inc(v) atomic_add(1, (v))
1da177e4 LT	289
	290	/*
	291	* atomic_dec - decrement and test
	292	* @v: pointer of type atomic_t
	293	*
	294	* Atomically decrements @v by 1.
	295	*/
21a151d8	296	#define atomic_dec(v) atomic_sub(1, (v))
1da177e4 LT	297
	298	/*
	299	* atomic_add_negative - add and test if negative
	300	* @v: pointer of type atomic_t
	301	* @i: integer value to add
	302	*
	303	* Atomically adds @i to @v and returns true
	304	* if the result is negative, or false when
	305	* result is greater than or equal to zero.
	306	*/
21a151d8	307	#define atomic_add_negative(i, v) (atomic_add_return(i, (v)) < 0)
1da177e4	308
875d43e7	309	#ifdef CONFIG_64BIT
1da177e4	310
1da177e4 LT	311	#define ATOMIC64_INIT(i) { (i) }
	312
	313	/*
	314	* atomic64_read - read atomic variable
	315	* @v: pointer of type atomic64_t
	316	*
	317	*/
62e8a325	318	#define atomic64_read(v) READ_ONCE((v)->counter)
1da177e4 LT	319
	320	/*
	321	* atomic64_set - set atomic variable
	322	* @v: pointer of type atomic64_t
	323	* @i: required value
	324	*/
62e8a325	325	#define atomic64_set(v, i) WRITE_ONCE((v)->counter, (i))
1da177e4	326
ddb3108e MR	327	#define ATOMIC64_OP(op, c_op, asm_op) \
	328	static __inline__ void atomic64_##op(long i, atomic64_t * v) \
	329	{ \
	330	if (kernel_uses_llsc && R10000_LLSC_WAR) { \
	331	long temp; \
	332	\
	333	__asm__ __volatile__( \
	334	" .set arch=r4000 \n" \
	335	"1: lld %0, %1 # atomic64_" #op " \n" \
	336	" " #asm_op " %0, %2 \n" \
	337	" scd %0, %1 \n" \
	338	" beqzl %0, 1b \n" \
	339	" .set mips0 \n" \
94bfb75a	340	: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
ddb3108e MR	341	: "Ir" (i)); \
	342	} else if (kernel_uses_llsc) { \
	343	long temp; \
	344	\
	345	do { \
	346	__asm__ __volatile__( \
0038df22	347	" .set "MIPS_ISA_LEVEL" \n" \
ddb3108e MR	348	" lld %0, %1 # atomic64_" #op "\n" \
	349	" " #asm_op " %0, %2 \n" \
	350	" scd %0, %1 \n" \
	351	" .set mips0 \n" \
94bfb75a	352	: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
ddb3108e MR	353	: "Ir" (i)); \
	354	} while (unlikely(!temp)); \
	355	} else { \
	356	unsigned long flags; \
	357	\
	358	raw_local_irq_save(flags); \
	359	v->counter c_op i; \
	360	raw_local_irq_restore(flags); \
	361	} \
	362	}
	363
	364	#define ATOMIC64_OP_RETURN(op, c_op, asm_op) \
	365	static __inline__ long atomic64_##op##_return(long i, atomic64_t * v) \
	366	{ \
	367	long result; \
	368	\
	369	smp_mb__before_llsc(); \
	370	\
	371	if (kernel_uses_llsc && R10000_LLSC_WAR) { \
	372	long temp; \
	373	\
	374	__asm__ __volatile__( \
	375	" .set arch=r4000 \n" \
	376	"1: lld %1, %2 # atomic64_" #op "_return\n" \
	377	" " #asm_op " %0, %1, %3 \n" \
	378	" scd %0, %2 \n" \
	379	" beqzl %0, 1b \n" \
	380	" " #asm_op " %0, %1, %3 \n" \
	381	" .set mips0 \n" \
	382	: "=&r" (result), "=&r" (temp), \
94bfb75a	383	"+" GCC_OFF_SMALL_ASM() (v->counter) \
ddb3108e MR	384	: "Ir" (i)); \
	385	} else if (kernel_uses_llsc) { \
	386	long temp; \
	387	\
	388	do { \
	389	__asm__ __volatile__( \
0038df22	390	" .set "MIPS_ISA_LEVEL" \n" \
ddb3108e MR	391	" lld %1, %2 # atomic64_" #op "_return\n" \
	392	" " #asm_op " %0, %1, %3 \n" \
	393	" scd %0, %2 \n" \
	394	" .set mips0 \n" \
	395	: "=&r" (result), "=&r" (temp), \
94bfb75a MC	396	"=" GCC_OFF_SMALL_ASM() (v->counter) \
94bfb75a MC	397	: "Ir" (i), GCC_OFF_SMALL_ASM() (v->counter) \
ddb3108e MR	398	: "memory"); \
	399	} while (unlikely(!result)); \
	400	\
	401	result = temp; result c_op i; \
	402	} else { \
	403	unsigned long flags; \
	404	\
	405	raw_local_irq_save(flags); \
	406	result = v->counter; \
	407	result c_op i; \
	408	v->counter = result; \
	409	raw_local_irq_restore(flags); \
	410	} \
	411	\
	412	smp_llsc_mb(); \
	413	\
	414	return result; \
1da177e4 LT	415	}
1da177e4 LT	416
ddb3108e MR	417	#define ATOMIC64_OPS(op, c_op, asm_op) \
ddb3108e MR	418	ATOMIC64_OP(op, c_op, asm_op) \
ef31563e	419	ATOMIC64_OP_RETURN(op, c_op, asm_op)
1da177e4	420
ef31563e PZ	421	ATOMIC64_OPS(add, +=, daddu)
ef31563e PZ	422	ATOMIC64_OPS(sub, -=, dsubu)
27782f27 PZ	423	ATOMIC64_OP(and, &=, and)
	424	ATOMIC64_OP(or, \|=, or)
	425	ATOMIC64_OP(xor, ^=, xor)
1da177e4	426
ef31563e PZ	427	#undef ATOMIC64_OPS
	428	#undef ATOMIC64_OP_RETURN
	429	#undef ATOMIC64_OP
1da177e4 LT	430
1da177e4 LT	431	/*
ddb3108e MR	432	* atomic64_sub_if_positive - conditionally subtract integer from atomic
ddb3108e MR	433	* variable
f10d14dd	434	* @i: integer value to subtract
1da177e4 LT	435	* @v: pointer of type atomic64_t
1da177e4 LT	436	*
f10d14dd AG	437	* Atomically test @v and subtract @i if @v is greater or equal than @i.
f10d14dd AG	438	* The function returns the old value of @v minus @i.
1da177e4 LT	439	*/
	440	static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
	441	{
915ec1e2	442	long result;
1da177e4	443
f252ffd5	444	smp_mb__before_llsc();
0004a9df	445
b791d119	446	if (kernel_uses_llsc && R10000_LLSC_WAR) {
915ec1e2	447	long temp;
1da177e4 LT	448
1da177e4 LT	449	__asm__ __volatile__(
a809d460	450	" .set arch=r4000 \n"
1da177e4 LT	451	"1: lld %1, %2 # atomic64_sub_if_positive\n"
	452	" dsubu %0, %1, %3 \n"
	453	" bltz %0, 1f \n"
	454	" scd %0, %2 \n"
92f22c18	455	" .set noreorder \n"
1da177e4	456	" beqzl %0, 1b \n"
92f22c18 RB	457	" dsubu %0, %1, %3 \n"
92f22c18 RB	458	" .set reorder \n"
1da177e4	459	"1: \n"
aac8aa77	460	" .set mips0 \n"
b0984c43	461	: "=&r" (result), "=&r" (temp),
94bfb75a MC	462	"=" GCC_OFF_SMALL_ASM() (v->counter)
94bfb75a MC	463	: "Ir" (i), GCC_OFF_SMALL_ASM() (v->counter)
1da177e4	464	: "memory");
b791d119	465	} else if (kernel_uses_llsc) {
915ec1e2	466	long temp;
1da177e4 LT	467
1da177e4 LT	468	__asm__ __volatile__(
0038df22	469	" .set "MIPS_ISA_LEVEL" \n"
1da177e4 LT	470	"1: lld %1, %2 # atomic64_sub_if_positive\n"
	471	" dsubu %0, %1, %3 \n"
	472	" bltz %0, 1f \n"
	473	" scd %0, %2 \n"
92f22c18	474	" .set noreorder \n"
7837314d	475	" beqz %0, 1b \n"
92f22c18 RB	476	" dsubu %0, %1, %3 \n"
92f22c18 RB	477	" .set reorder \n"
50952026	478	"1: \n"
aac8aa77	479	" .set mips0 \n"
b0984c43	480	: "=&r" (result), "=&r" (temp),
94bfb75a	481	"+" GCC_OFF_SMALL_ASM() (v->counter)
b4f2a17b	482	: "Ir" (i));
1da177e4 LT	483	} else {
	484	unsigned long flags;
	485
49edd098	486	raw_local_irq_save(flags);
1da177e4 LT	487	result = v->counter;
	488	result -= i;
	489	if (result >= 0)
	490	v->counter = result;
49edd098	491	raw_local_irq_restore(flags);
1da177e4 LT	492	}
1da177e4 LT	493
17099b11	494	smp_llsc_mb();
0004a9df	495
1da177e4 LT	496	return result;
	497	}
	498
e12f644b	499	#define atomic64_cmpxchg(v, o, n) \
7b239bb1	500	((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
e12f644b MD	501	#define atomic64_xchg(v, new) (xchg(&((v)->counter), (new)))
	502
	503	/**
	504	* atomic64_add_unless - add unless the number is a given value
	505	* @v: pointer of type atomic64_t
	506	* @a: the amount to add to v...
	507	* @u: ...unless v is equal to u.
	508	*
	509	* Atomically adds @a to @v, so long as it was not @u.
f25319d2	510	* Returns true iff @v was not @u.
e12f644b	511	*/
2856f5e3 MD	512	static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
	513	{
	514	long c, old;
	515	c = atomic64_read(v);
	516	for (;;) {
	517	if (unlikely(c == (u)))
	518	break;
	519	old = atomic64_cmpxchg((v), c, c + (a));
	520	if (likely(old == c))
	521	break;
	522	c = old;
	523	}
	524	return c != (u);
	525	}
	526
e12f644b MD	527	#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
e12f644b MD	528
21a151d8 RB	529	#define atomic64_dec_return(v) atomic64_sub_return(1, (v))
21a151d8 RB	530	#define atomic64_inc_return(v) atomic64_add_return(1, (v))
1da177e4 LT	531
	532	/*
	533	* atomic64_sub_and_test - subtract value from variable and test result
	534	* @i: integer value to subtract
	535	* @v: pointer of type atomic64_t
	536	*
	537	* Atomically subtracts @i from @v and returns
	538	* true if the result is zero, or false for all
	539	* other cases.
	540	*/
21a151d8	541	#define atomic64_sub_and_test(i, v) (atomic64_sub_return((i), (v)) == 0)
1da177e4 LT	542
	543	/*
	544	* atomic64_inc_and_test - increment and test
	545	* @v: pointer of type atomic64_t
	546	*
	547	* Atomically increments @v by 1
	548	* and returns true if the result is zero, or false for all
	549	* other cases.
	550	*/
	551	#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
	552
	553	/*
	554	* atomic64_dec_and_test - decrement by 1 and test
	555	* @v: pointer of type atomic64_t
	556	*
	557	* Atomically decrements @v by 1 and
	558	* returns true if the result is 0, or false for all other
	559	* cases.
	560	*/
	561	#define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0)
	562
	563	/*
	564	* atomic64_dec_if_positive - decrement by 1 if old value positive
	565	* @v: pointer of type atomic64_t
	566	*/
	567	#define atomic64_dec_if_positive(v) atomic64_sub_if_positive(1, v)
	568
	569	/*
	570	* atomic64_inc - increment atomic variable
	571	* @v: pointer of type atomic64_t
	572	*
	573	* Atomically increments @v by 1.
	574	*/
21a151d8	575	#define atomic64_inc(v) atomic64_add(1, (v))
1da177e4 LT	576
	577	/*
	578	* atomic64_dec - decrement and test
	579	* @v: pointer of type atomic64_t
	580	*
	581	* Atomically decrements @v by 1.
	582	*/
21a151d8	583	#define atomic64_dec(v) atomic64_sub(1, (v))
1da177e4 LT	584
	585	/*
	586	* atomic64_add_negative - add and test if negative
	587	* @v: pointer of type atomic64_t
	588	* @i: integer value to add
	589	*
	590	* Atomically adds @i to @v and returns true
	591	* if the result is negative, or false when
	592	* result is greater than or equal to zero.
	593	*/
21a151d8	594	#define atomic64_add_negative(i, v) (atomic64_add_return(i, (v)) < 0)
1da177e4	595
875d43e7	596	#endif /* CONFIG_64BIT */
1da177e4	597
1da177e4	598	#endif /* _ASM_ATOMIC_H */