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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle | |
7 | * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc. | |
8 | */ | |
9 | #ifndef _ASM_CACHEFLUSH_H | |
10 | #define _ASM_CACHEFLUSH_H | |
11 | ||
12 | /* Keep includes the same across arches. */ | |
13 | #include <linux/mm.h> | |
14 | #include <asm/cpu-features.h> | |
15 | ||
16 | /* Cache flushing: | |
17 | * | |
18 | * - flush_cache_all() flushes entire cache | |
19 | * - flush_cache_mm(mm) flushes the specified mm context's cache lines | |
ec8c0446 | 20 | * - flush_cache_dup mm(mm) handles cache flushing when forking |
1da177e4 LT |
21 | * - flush_cache_page(mm, vmaddr, pfn) flushes a single page |
22 | * - flush_cache_range(vma, start, end) flushes a range of pages | |
23 | * - flush_icache_range(start, end) flush a range of instructions | |
24 | * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache | |
1da177e4 LT |
25 | * |
26 | * MIPS specific flush operations: | |
27 | * | |
28 | * - flush_cache_sigtramp() flush signal trampoline | |
29 | * - flush_icache_all() flush the entire instruction cache | |
30 | * - flush_data_cache_page() flushes a page from the data cache | |
31 | */ | |
4d46a67a LP |
32 | |
33 | /* | |
34 | * This flag is used to indicate that the page pointed to by a pte | |
35 | * is dirty and requires cleaning before returning it to the user. | |
36 | */ | |
37 | #define PG_dcache_dirty PG_arch_1 | |
38 | ||
39 | #define Page_dcache_dirty(page) \ | |
40 | test_bit(PG_dcache_dirty, &(page)->flags) | |
41 | #define SetPageDcacheDirty(page) \ | |
42 | set_bit(PG_dcache_dirty, &(page)->flags) | |
43 | #define ClearPageDcacheDirty(page) \ | |
44 | clear_bit(PG_dcache_dirty, &(page)->flags) | |
45 | ||
1da177e4 LT |
46 | extern void (*flush_cache_all)(void); |
47 | extern void (*__flush_cache_all)(void); | |
48 | extern void (*flush_cache_mm)(struct mm_struct *mm); | |
ec8c0446 | 49 | #define flush_cache_dup_mm(mm) do { (void) (mm); } while (0) |
1da177e4 LT |
50 | extern void (*flush_cache_range)(struct vm_area_struct *vma, |
51 | unsigned long start, unsigned long end); | |
52 | extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn); | |
53 | extern void __flush_dcache_page(struct page *page); | |
54 | ||
2d4dc890 | 55 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 |
1da177e4 LT |
56 | static inline void flush_dcache_page(struct page *page) |
57 | { | |
4d46a67a | 58 | if (cpu_has_dc_aliases) |
1da177e4 | 59 | __flush_dcache_page(page); |
4d46a67a LP |
60 | else if (!cpu_has_ic_fills_f_dc) |
61 | SetPageDcacheDirty(page); | |
1da177e4 LT |
62 | } |
63 | ||
64 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | |
65 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | |
66 | ||
7575a49f RB |
67 | #define ARCH_HAS_FLUSH_ANON_PAGE |
68 | extern void __flush_anon_page(struct page *, unsigned long); | |
69 | static inline void flush_anon_page(struct vm_area_struct *vma, | |
70 | struct page *page, unsigned long vmaddr) | |
71 | { | |
72 | if (cpu_has_dc_aliases && PageAnon(page)) | |
73 | __flush_anon_page(page, vmaddr); | |
74 | } | |
75 | ||
585fa724 RB |
76 | static inline void flush_icache_page(struct vm_area_struct *vma, |
77 | struct page *page) | |
78 | { | |
79 | } | |
80 | ||
d4264f18 | 81 | extern void (*flush_icache_range)(unsigned long start, unsigned long end); |
e0cee3ee | 82 | extern void (*local_flush_icache_range)(unsigned long start, unsigned long end); |
9c5a3d72 RB |
83 | |
84 | extern void (*__flush_cache_vmap)(void); | |
85 | ||
86 | static inline void flush_cache_vmap(unsigned long start, unsigned long end) | |
87 | { | |
88 | if (cpu_has_dc_aliases) | |
89 | __flush_cache_vmap(); | |
90 | } | |
91 | ||
92 | extern void (*__flush_cache_vunmap)(void); | |
93 | ||
94 | static inline void flush_cache_vunmap(unsigned long start, unsigned long end) | |
95 | { | |
96 | if (cpu_has_dc_aliases) | |
97 | __flush_cache_vunmap(); | |
98 | } | |
1da177e4 | 99 | |
f8829cae | 100 | extern void copy_to_user_page(struct vm_area_struct *vma, |
53de0d47 | 101 | struct page *page, unsigned long vaddr, void *dst, const void *src, |
f8829cae | 102 | unsigned long len); |
53de0d47 | 103 | |
f8829cae | 104 | extern void copy_from_user_page(struct vm_area_struct *vma, |
53de0d47 | 105 | struct page *page, unsigned long vaddr, void *dst, const void *src, |
f8829cae | 106 | unsigned long len); |
1da177e4 LT |
107 | |
108 | extern void (*flush_cache_sigtramp)(unsigned long addr); | |
109 | extern void (*flush_icache_all)(void); | |
7e3bfc7c | 110 | extern void (*local_flush_data_cache_page)(void * addr); |
1da177e4 LT |
111 | extern void (*flush_data_cache_page)(unsigned long addr); |
112 | ||
ba5187db | 113 | /* Run kernel code uncached, useful for cache probing functions. */ |
234fcd14 | 114 | unsigned long run_uncached(void *func); |
ba5187db | 115 | |
7575a49f | 116 | extern void *kmap_coherent(struct page *page, unsigned long addr); |
eacb9d61 | 117 | extern void kunmap_coherent(void); |
e2a9e5ad PB |
118 | extern void *kmap_noncoherent(struct page *page, unsigned long addr); |
119 | ||
120 | static inline void kunmap_noncoherent(void) | |
121 | { | |
122 | kunmap_coherent(); | |
123 | } | |
7575a49f | 124 | |
d9cdc901 RB |
125 | #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE |
126 | static inline void flush_kernel_dcache_page(struct page *page) | |
127 | { | |
128 | BUG_ON(cpu_has_dc_aliases && PageHighMem(page)); | |
763fee97 | 129 | flush_dcache_page(page); |
d9cdc901 RB |
130 | } |
131 | ||
132 | /* | |
133 | * For now flush_kernel_vmap_range and invalidate_kernel_vmap_range both do a | |
134 | * cache writeback and invalidate operation. | |
135 | */ | |
136 | extern void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size); | |
137 | ||
138 | static inline void flush_kernel_vmap_range(void *vaddr, int size) | |
139 | { | |
140 | if (cpu_has_dc_aliases) | |
141 | __flush_kernel_vmap_range((unsigned long) vaddr, size); | |
142 | } | |
143 | ||
144 | static inline void invalidate_kernel_vmap_range(void *vaddr, int size) | |
145 | { | |
146 | if (cpu_has_dc_aliases) | |
147 | __flush_kernel_vmap_range((unsigned long) vaddr, size); | |
148 | } | |
149 | ||
1da177e4 | 150 | #endif /* _ASM_CACHEFLUSH_H */ |