[deliverable/linux.git] / arch / mips / include / asm / cacheflush.h

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
 * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
 */
#ifndef _ASM_CACHEFLUSH_H
#define _ASM_CACHEFLUSH_H

/* Keep includes the same across arches.  */
#include <linux/mm.h>
#include <asm/cpu-features.h>

/* Cache flushing:
 *
 *  - flush_cache_all() flushes entire cache
 *  - flush_cache_mm(mm) flushes the specified mm context's cache lines
 *  - flush_cache_dup mm(mm) handles cache flushing when forking
 *  - flush_cache_page(mm, vmaddr, pfn) flushes a single page
 *  - flush_cache_range(vma, start, end) flushes a range of pages
 *  - flush_icache_range(start, end) flush a range of instructions
 *  - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
 *
 * MIPS specific flush operations:
 *
 *  - flush_cache_sigtramp() flush signal trampoline
 *  - flush_icache_all() flush the entire instruction cache
 *  - flush_data_cache_page() flushes a page from the data cache
 */

 /*
 * This flag is used to indicate that the page pointed to by a pte
 * is dirty and requires cleaning before returning it to the user.
 */
#define PG_dcache_dirty			PG_arch_1

#define Page_dcache_dirty(page)		\
	test_bit(PG_dcache_dirty, &(page)->flags)
#define SetPageDcacheDirty(page)	\
	set_bit(PG_dcache_dirty, &(page)->flags)
#define ClearPageDcacheDirty(page)	\
	clear_bit(PG_dcache_dirty, &(page)->flags)

extern void (*flush_cache_all)(void);
extern void (*__flush_cache_all)(void);
extern void (*flush_cache_mm)(struct mm_struct *mm);
#define flush_cache_dup_mm(mm)	do { (void) (mm); } while (0)
extern void (*flush_cache_range)(struct vm_area_struct *vma,
	unsigned long start, unsigned long end);
extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn);
extern void __flush_dcache_page(struct page *page);
extern void __flush_icache_page(struct vm_area_struct *vma, struct page *page);

#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
static inline void flush_dcache_page(struct page *page)
{
	if (cpu_has_dc_aliases)
		__flush_dcache_page(page);
	else if (!cpu_has_ic_fills_f_dc)
		SetPageDcacheDirty(page);
}

#define flush_dcache_mmap_lock(mapping)		do { } while (0)
#define flush_dcache_mmap_unlock(mapping)	do { } while (0)

#define ARCH_HAS_FLUSH_ANON_PAGE
extern void __flush_anon_page(struct page *, unsigned long);
static inline void flush_anon_page(struct vm_area_struct *vma,
	struct page *page, unsigned long vmaddr)
{
	if (cpu_has_dc_aliases && PageAnon(page))
		__flush_anon_page(page, vmaddr);
}

static inline void flush_icache_page(struct vm_area_struct *vma,
	struct page *page)
{
	if (!cpu_has_ic_fills_f_dc && (vma->vm_flags & VM_EXEC) &&
	    Page_dcache_dirty(page)) {
		__flush_icache_page(vma, page);
		ClearPageDcacheDirty(page);
	}
}

extern void (*flush_icache_range)(unsigned long start, unsigned long end);
extern void (*local_flush_icache_range)(unsigned long start, unsigned long end);

extern void (*__flush_cache_vmap)(void);

static inline void flush_cache_vmap(unsigned long start, unsigned long end)
{
	if (cpu_has_dc_aliases)
		__flush_cache_vmap();
}

extern void (*__flush_cache_vunmap)(void);

static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
{
	if (cpu_has_dc_aliases)
		__flush_cache_vunmap();
}

extern void copy_to_user_page(struct vm_area_struct *vma,
	struct page *page, unsigned long vaddr, void *dst, const void *src,
	unsigned long len);

extern void copy_from_user_page(struct vm_area_struct *vma,
	struct page *page, unsigned long vaddr, void *dst, const void *src,
	unsigned long len);

extern void (*flush_cache_sigtramp)(unsigned long addr);
extern void (*flush_icache_all)(void);
extern void (*local_flush_data_cache_page)(void * addr);
extern void (*flush_data_cache_page)(unsigned long addr);

/* Run kernel code uncached, useful for cache probing functions. */
unsigned long run_uncached(void *func);

extern void *kmap_coherent(struct page *page, unsigned long addr);
extern void kunmap_coherent(void);
extern void *kmap_noncoherent(struct page *page, unsigned long addr);

static inline void kunmap_noncoherent(void)
{
	kunmap_coherent();
}

#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
static inline void flush_kernel_dcache_page(struct page *page)
{
	BUG_ON(cpu_has_dc_aliases && PageHighMem(page));
}

/*
 * For now flush_kernel_vmap_range and invalidate_kernel_vmap_range both do a
 * cache writeback and invalidate operation.
 */
extern void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size);

static inline void flush_kernel_vmap_range(void *vaddr, int size)
{
	if (cpu_has_dc_aliases)
		__flush_kernel_vmap_range((unsigned long) vaddr, size);
}

static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
{
	if (cpu_has_dc_aliases)
		__flush_kernel_vmap_range((unsigned long) vaddr, size);
}

#endif /* _ASM_CACHEFLUSH_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
	7	* Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
	8	*/
	9	#ifndef _ASM_CACHEFLUSH_H
	10	#define _ASM_CACHEFLUSH_H
	11
	12	/* Keep includes the same across arches. */
	13	#include <linux/mm.h>
	14	#include <asm/cpu-features.h>
	15
	16	/* Cache flushing:
	17	*
	18	* - flush_cache_all() flushes entire cache
	19	* - flush_cache_mm(mm) flushes the specified mm context's cache lines
ec8c0446	20	* - flush_cache_dup mm(mm) handles cache flushing when forking
1da177e4 LT	21	* - flush_cache_page(mm, vmaddr, pfn) flushes a single page
	22	* - flush_cache_range(vma, start, end) flushes a range of pages
	23	* - flush_icache_range(start, end) flush a range of instructions
	24	* - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
1da177e4 LT	25	*
	26	* MIPS specific flush operations:
	27	*
	28	* - flush_cache_sigtramp() flush signal trampoline
	29	* - flush_icache_all() flush the entire instruction cache
	30	* - flush_data_cache_page() flushes a page from the data cache
	31	*/
4d46a67a LP	32
	33	/*
	34	* This flag is used to indicate that the page pointed to by a pte
	35	* is dirty and requires cleaning before returning it to the user.
	36	*/
	37	#define PG_dcache_dirty PG_arch_1
	38
	39	#define Page_dcache_dirty(page) \
	40	test_bit(PG_dcache_dirty, &(page)->flags)
	41	#define SetPageDcacheDirty(page) \
	42	set_bit(PG_dcache_dirty, &(page)->flags)
	43	#define ClearPageDcacheDirty(page) \
	44	clear_bit(PG_dcache_dirty, &(page)->flags)
	45
1da177e4 LT	46	extern void (*flush_cache_all)(void);
	47	extern void (*__flush_cache_all)(void);
	48	extern void (flush_cache_mm)(struct mm_struct mm);
ec8c0446	49	#define flush_cache_dup_mm(mm) do { (void) (mm); } while (0)
1da177e4 LT	50	extern void (flush_cache_range)(struct vm_area_struct vma,
	51	unsigned long start, unsigned long end);
	52	extern void (flush_cache_page)(struct vm_area_struct vma, unsigned long page, unsigned long pfn);
	53	extern void __flush_dcache_page(struct page *page);
4d46a67a	54	extern void __flush_icache_page(struct vm_area_struct vma, struct page page);
1da177e4	55
2d4dc890	56	#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
1da177e4 LT	57	static inline void flush_dcache_page(struct page *page)
1da177e4 LT	58	{
4d46a67a	59	if (cpu_has_dc_aliases)
1da177e4	60	__flush_dcache_page(page);
4d46a67a LP	61	else if (!cpu_has_ic_fills_f_dc)
4d46a67a LP	62	SetPageDcacheDirty(page);
1da177e4 LT	63	}
	64
	65	#define flush_dcache_mmap_lock(mapping) do { } while (0)
	66	#define flush_dcache_mmap_unlock(mapping) do { } while (0)
	67
7575a49f RB	68	#define ARCH_HAS_FLUSH_ANON_PAGE
	69	extern void __flush_anon_page(struct page *, unsigned long);
	70	static inline void flush_anon_page(struct vm_area_struct *vma,
	71	struct page *page, unsigned long vmaddr)
	72	{
	73	if (cpu_has_dc_aliases && PageAnon(page))
	74	__flush_anon_page(page, vmaddr);
	75	}
	76
585fa724 RB	77	static inline void flush_icache_page(struct vm_area_struct *vma,
	78	struct page *page)
	79	{
4d46a67a LP	80	if (!cpu_has_ic_fills_f_dc && (vma->vm_flags & VM_EXEC) &&
	81	Page_dcache_dirty(page)) {
	82	__flush_icache_page(vma, page);
	83	ClearPageDcacheDirty(page);
	84	}
585fa724 RB	85	}
585fa724 RB	86
d4264f18	87	extern void (*flush_icache_range)(unsigned long start, unsigned long end);
e0cee3ee	88	extern void (*local_flush_icache_range)(unsigned long start, unsigned long end);
9c5a3d72 RB	89
	90	extern void (*__flush_cache_vmap)(void);
	91
	92	static inline void flush_cache_vmap(unsigned long start, unsigned long end)
	93	{
	94	if (cpu_has_dc_aliases)
	95	__flush_cache_vmap();
	96	}
	97
	98	extern void (*__flush_cache_vunmap)(void);
	99
	100	static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
	101	{
	102	if (cpu_has_dc_aliases)
	103	__flush_cache_vunmap();
	104	}
1da177e4	105
f8829cae	106	extern void copy_to_user_page(struct vm_area_struct *vma,
53de0d47	107	struct page page, unsigned long vaddr, void dst, const void *src,
f8829cae	108	unsigned long len);
53de0d47	109
f8829cae	110	extern void copy_from_user_page(struct vm_area_struct *vma,
53de0d47	111	struct page page, unsigned long vaddr, void dst, const void *src,
f8829cae	112	unsigned long len);
1da177e4 LT	113
	114	extern void (*flush_cache_sigtramp)(unsigned long addr);
	115	extern void (*flush_icache_all)(void);
7e3bfc7c	116	extern void (local_flush_data_cache_page)(void addr);
1da177e4 LT	117	extern void (*flush_data_cache_page)(unsigned long addr);
1da177e4 LT	118
ba5187db	119	/* Run kernel code uncached, useful for cache probing functions. */
234fcd14	120	unsigned long run_uncached(void *func);
ba5187db	121
7575a49f	122	extern void kmap_coherent(struct page page, unsigned long addr);
eacb9d61	123	extern void kunmap_coherent(void);
e2a9e5ad PB	124	extern void kmap_noncoherent(struct page page, unsigned long addr);
	125
	126	static inline void kunmap_noncoherent(void)
	127	{
	128	kunmap_coherent();
	129	}
7575a49f	130
d9cdc901 RB	131	#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
	132	static inline void flush_kernel_dcache_page(struct page *page)
	133	{
	134	BUG_ON(cpu_has_dc_aliases && PageHighMem(page));
	135	}
	136
	137	/*
	138	* For now flush_kernel_vmap_range and invalidate_kernel_vmap_range both do a
	139	* cache writeback and invalidate operation.
	140	*/
	141	extern void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size);
	142
	143	static inline void flush_kernel_vmap_range(void *vaddr, int size)
	144	{
	145	if (cpu_has_dc_aliases)
	146	__flush_kernel_vmap_range((unsigned long) vaddr, size);
	147	}
	148
	149	static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
	150	{
	151	if (cpu_has_dc_aliases)
	152	__flush_kernel_vmap_range((unsigned long) vaddr, size);
	153	}
	154
1da177e4	155	#endif /* _ASM_CACHEFLUSH_H */