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69f24d17 RB |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 2003, 2004 Ralf Baechle | |
7 | * Copyright (C) 2004 Maciej W. Rozycki | |
8 | */ | |
9 | #ifndef __ASM_CPU_TYPE_H | |
10 | #define __ASM_CPU_TYPE_H | |
11 | ||
12 | #include <linux/smp.h> | |
13 | #include <linux/compiler.h> | |
14 | ||
15 | static inline int __pure __get_cpu_type(const int cpu_type) | |
16 | { | |
17 | switch (cpu_type) { | |
18 | #if defined(CONFIG_SYS_HAS_CPU_LOONGSON2E) || \ | |
19 | defined(CONFIG_SYS_HAS_CPU_LOONGSON2F) | |
20 | case CPU_LOONGSON2: | |
21 | #endif | |
22 | ||
c579d310 HC |
23 | #ifdef CONFIG_SYS_HAS_CPU_LOONGSON3 |
24 | case CPU_LOONGSON3: | |
25 | #endif | |
26 | ||
69f24d17 RB |
27 | #ifdef CONFIG_SYS_HAS_CPU_LOONGSON1B |
28 | case CPU_LOONGSON1: | |
29 | #endif | |
30 | ||
31 | #ifdef CONFIG_SYS_HAS_CPU_MIPS32_R1 | |
32 | case CPU_4KC: | |
33 | case CPU_ALCHEMY: | |
69f24d17 | 34 | case CPU_PR4450: |
69f24d17 RB |
35 | case CPU_JZRISC: |
36 | #endif | |
37 | ||
38 | #if defined(CONFIG_SYS_HAS_CPU_MIPS32_R1) || \ | |
39 | defined(CONFIG_SYS_HAS_CPU_MIPS32_R2) | |
40 | case CPU_4KEC: | |
41 | #endif | |
42 | ||
43 | #ifdef CONFIG_SYS_HAS_CPU_MIPS32_R2 | |
44 | case CPU_4KSC: | |
45 | case CPU_24K: | |
46 | case CPU_34K: | |
47 | case CPU_1004K: | |
48 | case CPU_74K: | |
49 | case CPU_M14KC: | |
50 | case CPU_M14KEC: | |
26ab96df | 51 | case CPU_INTERAPTIV: |
708ac4b8 | 52 | case CPU_PROAPTIV: |
aced4cbd | 53 | case CPU_P5600: |
f36c4720 | 54 | case CPU_M5150: |
69f24d17 RB |
55 | #endif |
56 | ||
57 | #ifdef CONFIG_SYS_HAS_CPU_MIPS64_R1 | |
58 | case CPU_5KC: | |
59 | case CPU_5KE: | |
60 | case CPU_20KC: | |
61 | case CPU_25KF: | |
62 | case CPU_SB1: | |
63 | case CPU_SB1A: | |
64 | #endif | |
65 | ||
66 | #ifdef CONFIG_SYS_HAS_CPU_MIPS64_R2 | |
67 | /* | |
68 | * All MIPS64 R2 processors have their own special symbols. That is, | |
69 | * there currently is no pure R2 core | |
70 | */ | |
71 | #endif | |
72 | ||
73 | #ifdef CONFIG_SYS_HAS_CPU_R3000 | |
74 | case CPU_R2000: | |
75 | case CPU_R3000: | |
76 | case CPU_R3000A: | |
77 | case CPU_R3041: | |
78 | case CPU_R3051: | |
79 | case CPU_R3052: | |
80 | case CPU_R3081: | |
81 | case CPU_R3081E: | |
82 | #endif | |
83 | ||
84 | #ifdef CONFIG_SYS_HAS_CPU_TX39XX | |
85 | case CPU_TX3912: | |
86 | case CPU_TX3922: | |
87 | case CPU_TX3927: | |
88 | #endif | |
89 | ||
90 | #ifdef CONFIG_SYS_HAS_CPU_VR41XX | |
91 | case CPU_VR41XX: | |
92 | case CPU_VR4111: | |
93 | case CPU_VR4121: | |
94 | case CPU_VR4122: | |
95 | case CPU_VR4131: | |
96 | case CPU_VR4133: | |
97 | case CPU_VR4181: | |
98 | case CPU_VR4181A: | |
99 | #endif | |
100 | ||
101 | #ifdef CONFIG_SYS_HAS_CPU_R4300 | |
102 | case CPU_R4300: | |
103 | case CPU_R4310: | |
104 | #endif | |
105 | ||
106 | #ifdef CONFIG_SYS_HAS_CPU_R4X00 | |
107 | case CPU_R4000PC: | |
108 | case CPU_R4000SC: | |
109 | case CPU_R4000MC: | |
110 | case CPU_R4200: | |
111 | case CPU_R4400PC: | |
112 | case CPU_R4400SC: | |
113 | case CPU_R4400MC: | |
114 | case CPU_R4600: | |
115 | case CPU_R4700: | |
116 | case CPU_R4640: | |
117 | case CPU_R4650: | |
118 | #endif | |
119 | ||
120 | #ifdef CONFIG_SYS_HAS_CPU_TX49XX | |
121 | case CPU_TX49XX: | |
122 | #endif | |
123 | ||
124 | #ifdef CONFIG_SYS_HAS_CPU_R5000 | |
125 | case CPU_R5000: | |
126 | #endif | |
127 | ||
128 | #ifdef CONFIG_SYS_HAS_CPU_R5432 | |
129 | case CPU_R5432: | |
130 | #endif | |
131 | ||
132 | #ifdef CONFIG_SYS_HAS_CPU_R5500 | |
133 | case CPU_R5500: | |
134 | #endif | |
135 | ||
136 | #ifdef CONFIG_SYS_HAS_CPU_R6000 | |
137 | case CPU_R6000: | |
138 | case CPU_R6000A: | |
139 | #endif | |
140 | ||
141 | #ifdef CONFIG_SYS_HAS_CPU_NEVADA | |
142 | case CPU_NEVADA: | |
143 | #endif | |
144 | ||
145 | #ifdef CONFIG_SYS_HAS_CPU_R8000 | |
146 | case CPU_R8000: | |
147 | #endif | |
148 | ||
149 | #ifdef CONFIG_SYS_HAS_CPU_R10000 | |
150 | case CPU_R10000: | |
151 | case CPU_R12000: | |
152 | case CPU_R14000: | |
153 | #endif | |
154 | #ifdef CONFIG_SYS_HAS_CPU_RM7000 | |
155 | case CPU_RM7000: | |
156 | case CPU_SR71000: | |
157 | #endif | |
69f24d17 RB |
158 | #ifdef CONFIG_SYS_HAS_CPU_SB1 |
159 | case CPU_SB1: | |
160 | case CPU_SB1A: | |
161 | #endif | |
162 | #ifdef CONFIG_SYS_HAS_CPU_CAVIUM_OCTEON | |
163 | case CPU_CAVIUM_OCTEON: | |
164 | case CPU_CAVIUM_OCTEON_PLUS: | |
165 | case CPU_CAVIUM_OCTEON2: | |
cd3f5389 | 166 | case CPU_CAVIUM_OCTEON3: |
69f24d17 RB |
167 | #endif |
168 | ||
baaac02e JG |
169 | #if defined(CONFIG_SYS_HAS_CPU_BMIPS32_3300) || \ |
170 | defined (CONFIG_SYS_HAS_CPU_MIPS32_R1) | |
171 | case CPU_BMIPS32: | |
172 | case CPU_BMIPS3300: | |
173 | #endif | |
174 | ||
175 | #ifdef CONFIG_SYS_HAS_CPU_BMIPS4350 | |
176 | case CPU_BMIPS4350: | |
177 | #endif | |
178 | ||
69f24d17 RB |
179 | #ifdef CONFIG_SYS_HAS_CPU_BMIPS4380 |
180 | case CPU_BMIPS4380: | |
181 | #endif | |
182 | ||
183 | #ifdef CONFIG_SYS_HAS_CPU_BMIPS5000 | |
184 | case CPU_BMIPS5000: | |
185 | #endif | |
186 | ||
187 | #ifdef CONFIG_SYS_HAS_CPU_XLP | |
188 | case CPU_XLP: | |
189 | #endif | |
190 | ||
191 | #ifdef CONFIG_SYS_HAS_CPU_XLR | |
192 | case CPU_XLR: | |
193 | #endif | |
194 | break; | |
195 | default: | |
196 | unreachable(); | |
197 | } | |
198 | ||
199 | return cpu_type; | |
200 | } | |
201 | ||
202 | static inline int __pure current_cpu_type(void) | |
203 | { | |
204 | const int cpu_type = current_cpu_data.cputype; | |
205 | ||
206 | return __get_cpu_type(cpu_type); | |
207 | } | |
208 | ||
209 | static inline int __pure boot_cpu_type(void) | |
210 | { | |
211 | const int cpu_type = cpu_data[0].cputype; | |
212 | ||
213 | return __get_cpu_type(cpu_type); | |
214 | } | |
215 | ||
216 | #endif /* __ASM_CPU_TYPE_H */ |