projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 69f24d17 RB |
1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public | |
| 3 | * License. See the file "COPYING" in the main directory of this archive | |
| 4 | * for more details. | |
| 5 | * | |
| 6 | * Copyright (C) 2003, 2004 Ralf Baechle | |
| 7 | * Copyright (C) 2004 Maciej W. Rozycki | |
| 8 | */ | |
| 9 | #ifndef __ASM_CPU_TYPE_H | |
| 10 | #define __ASM_CPU_TYPE_H | |
| 11 | ||
| 12 | #include <linux/smp.h> | |
| 13 | #include <linux/compiler.h> | |
| 14 | ||
| 15 | static inline int __pure __get_cpu_type(const int cpu_type) | |
| 16 | { | |
| 17 | switch (cpu_type) { | |
| 18 | #if defined(CONFIG_SYS_HAS_CPU_LOONGSON2E) || \ | |
| 19 | defined(CONFIG_SYS_HAS_CPU_LOONGSON2F) | |
| 20 | case CPU_LOONGSON2: | |
| 21 | #endif | |
| 22 | ||
| c579d310 HC |
23 | #ifdef CONFIG_SYS_HAS_CPU_LOONGSON3 |
| 24 | case CPU_LOONGSON3: | |
| 25 | #endif | |
| 26 | ||
| 69f24d17 RB |
27 | #ifdef CONFIG_SYS_HAS_CPU_LOONGSON1B |
| 28 | case CPU_LOONGSON1: | |
| 29 | #endif | |
| 30 | ||
| 31 | #ifdef CONFIG_SYS_HAS_CPU_MIPS32_R1 | |
| 32 | case CPU_4KC: | |
| 33 | case CPU_ALCHEMY: | |
| 69f24d17 | 34 | case CPU_PR4450: |
| 69f24d17 RB |
35 | #endif |
| 36 | ||
| 37 | #if defined(CONFIG_SYS_HAS_CPU_MIPS32_R1) || \ | |
| 38 | defined(CONFIG_SYS_HAS_CPU_MIPS32_R2) | |
| 39 | case CPU_4KEC: | |
| 5b9cdd24 | 40 | case CPU_JZRISC: |
| 69f24d17 RB |
41 | #endif |
| 42 | ||
| 43 | #ifdef CONFIG_SYS_HAS_CPU_MIPS32_R2 | |
| 44 | case CPU_4KSC: | |
| 45 | case CPU_24K: | |
| 46 | case CPU_34K: | |
| 47 | case CPU_1004K: | |
| 48 | case CPU_74K: | |
| 49 | case CPU_M14KC: | |
| 50 | case CPU_M14KEC: | |
| 26ab96df | 51 | case CPU_INTERAPTIV: |
| 708ac4b8 | 52 | case CPU_PROAPTIV: |
| aced4cbd | 53 | case CPU_P5600: |
| f36c4720 | 54 | case CPU_M5150: |
| 69f24d17 RB |
55 | #endif |
| 56 | ||
| 4695089f LY |
57 | #if defined(CONFIG_SYS_HAS_CPU_MIPS32_R2) || \ |
| 58 | defined(CONFIG_SYS_HAS_CPU_MIPS32_R6) || \ | |
| 59 | defined(CONFIG_SYS_HAS_CPU_MIPS64_R2) || \ | |
| 60 | defined(CONFIG_SYS_HAS_CPU_MIPS64_R6) | |
| 61 | case CPU_QEMU_GENERIC: | |
| 62 | #endif | |
| 63 | ||
| 69f24d17 RB |
64 | #ifdef CONFIG_SYS_HAS_CPU_MIPS64_R1 |
| 65 | case CPU_5KC: | |
| 66 | case CPU_5KE: | |
| 67 | case CPU_20KC: | |
| 68 | case CPU_25KF: | |
| 69 | case CPU_SB1: | |
| 70 | case CPU_SB1A: | |
| 71 | #endif | |
| 72 | ||
| 73 | #ifdef CONFIG_SYS_HAS_CPU_MIPS64_R2 | |
| 74 | /* | |
| 75 | * All MIPS64 R2 processors have their own special symbols. That is, | |
| 76 | * there currently is no pure R2 core | |
| 77 | */ | |
| 78 | #endif | |
| 79 | ||
| 1dbf6a81 PB |
80 | #ifdef CONFIG_SYS_HAS_CPU_MIPS32_R6 |
| 81 | case CPU_M6250: | |
| 82 | #endif | |
| 83 | ||
| 4e88a862 MC |
84 | #ifdef CONFIG_SYS_HAS_CPU_MIPS64_R6 |
| 85 | case CPU_I6400: | |
| 1091bfa2 | 86 | case CPU_P6600: |
| 4e88a862 MC |
87 | #endif |
| 88 | ||
| 69f24d17 RB |
89 | #ifdef CONFIG_SYS_HAS_CPU_R3000 |
| 90 | case CPU_R2000: | |
| 91 | case CPU_R3000: | |
| 92 | case CPU_R3000A: | |
| 93 | case CPU_R3041: | |
| 94 | case CPU_R3051: | |
| 95 | case CPU_R3052: | |
| 96 | case CPU_R3081: | |
| 97 | case CPU_R3081E: | |
| 98 | #endif | |
| 99 | ||
| 100 | #ifdef CONFIG_SYS_HAS_CPU_TX39XX | |
| 101 | case CPU_TX3912: | |
| 102 | case CPU_TX3922: | |
| 103 | case CPU_TX3927: | |
| 104 | #endif | |
| 105 | ||
| 106 | #ifdef CONFIG_SYS_HAS_CPU_VR41XX | |
| 107 | case CPU_VR41XX: | |
| 108 | case CPU_VR4111: | |
| 109 | case CPU_VR4121: | |
| 110 | case CPU_VR4122: | |
| 111 | case CPU_VR4131: | |
| 112 | case CPU_VR4133: | |
| 113 | case CPU_VR4181: | |
| 114 | case CPU_VR4181A: | |
| 115 | #endif | |
| 116 | ||
| 117 | #ifdef CONFIG_SYS_HAS_CPU_R4300 | |
| 118 | case CPU_R4300: | |
| 119 | case CPU_R4310: | |
| 120 | #endif | |
| 121 | ||
| 122 | #ifdef CONFIG_SYS_HAS_CPU_R4X00 | |
| 123 | case CPU_R4000PC: | |
| 124 | case CPU_R4000SC: | |
| 125 | case CPU_R4000MC: | |
| 126 | case CPU_R4200: | |
| 127 | case CPU_R4400PC: | |
| 128 | case CPU_R4400SC: | |
| 129 | case CPU_R4400MC: | |
| 130 | case CPU_R4600: | |
| 131 | case CPU_R4700: | |
| 132 | case CPU_R4640: | |
| 133 | case CPU_R4650: | |
| 134 | #endif | |
| 135 | ||
| 136 | #ifdef CONFIG_SYS_HAS_CPU_TX49XX | |
| 137 | case CPU_TX49XX: | |
| 138 | #endif | |
| 139 | ||
| 140 | #ifdef CONFIG_SYS_HAS_CPU_R5000 | |
| 141 | case CPU_R5000: | |
| 142 | #endif | |
| 143 | ||
| 144 | #ifdef CONFIG_SYS_HAS_CPU_R5432 | |
| 145 | case CPU_R5432: | |
| 146 | #endif | |
| 147 | ||
| 148 | #ifdef CONFIG_SYS_HAS_CPU_R5500 | |
| 149 | case CPU_R5500: | |
| 150 | #endif | |
| 151 | ||
| 152 | #ifdef CONFIG_SYS_HAS_CPU_R6000 | |
| 153 | case CPU_R6000: | |
| 154 | case CPU_R6000A: | |
| 155 | #endif | |
| 156 | ||
| 157 | #ifdef CONFIG_SYS_HAS_CPU_NEVADA | |
| 158 | case CPU_NEVADA: | |
| 159 | #endif | |
| 160 | ||
| 161 | #ifdef CONFIG_SYS_HAS_CPU_R8000 | |
| 162 | case CPU_R8000: | |
| 163 | #endif | |
| 164 | ||
| 165 | #ifdef CONFIG_SYS_HAS_CPU_R10000 | |
| 166 | case CPU_R10000: | |
| 167 | case CPU_R12000: | |
| 168 | case CPU_R14000: | |
| 30577391 | 169 | case CPU_R16000: |
| 69f24d17 RB |
170 | #endif |
| 171 | #ifdef CONFIG_SYS_HAS_CPU_RM7000 | |
| 172 | case CPU_RM7000: | |
| 173 | case CPU_SR71000: | |
| 174 | #endif | |
| 69f24d17 RB |
175 | #ifdef CONFIG_SYS_HAS_CPU_SB1 |
| 176 | case CPU_SB1: | |
| 177 | case CPU_SB1A: | |
| 178 | #endif | |
| 179 | #ifdef CONFIG_SYS_HAS_CPU_CAVIUM_OCTEON | |
| 180 | case CPU_CAVIUM_OCTEON: | |
| 181 | case CPU_CAVIUM_OCTEON_PLUS: | |
| 182 | case CPU_CAVIUM_OCTEON2: | |
| cd3f5389 | 183 | case CPU_CAVIUM_OCTEON3: |
| 69f24d17 RB |
184 | #endif |
| 185 | ||
| baaac02e JG |
186 | #if defined(CONFIG_SYS_HAS_CPU_BMIPS32_3300) || \ |
| 187 | defined (CONFIG_SYS_HAS_CPU_MIPS32_R1) | |
| 188 | case CPU_BMIPS32: | |
| 189 | case CPU_BMIPS3300: | |
| 190 | #endif | |
| 191 | ||
| 192 | #ifdef CONFIG_SYS_HAS_CPU_BMIPS4350 | |
| 193 | case CPU_BMIPS4350: | |
| 194 | #endif | |
| 195 | ||
| 69f24d17 RB |
196 | #ifdef CONFIG_SYS_HAS_CPU_BMIPS4380 |
| 197 | case CPU_BMIPS4380: | |
| 198 | #endif | |
| 199 | ||
| 200 | #ifdef CONFIG_SYS_HAS_CPU_BMIPS5000 | |
| 201 | case CPU_BMIPS5000: | |
| 202 | #endif | |
| 203 | ||
| 204 | #ifdef CONFIG_SYS_HAS_CPU_XLP | |
| 205 | case CPU_XLP: | |
| 206 | #endif | |
| 207 | ||
| 208 | #ifdef CONFIG_SYS_HAS_CPU_XLR | |
| 209 | case CPU_XLR: | |
| 210 | #endif | |
| 211 | break; | |
| 212 | default: | |
| 213 | unreachable(); | |
| 214 | } | |
| 215 | ||
| 216 | return cpu_type; | |
| 217 | } | |
| 218 | ||
| 219 | static inline int __pure current_cpu_type(void) | |
| 220 | { | |
| 221 | const int cpu_type = current_cpu_data.cputype; | |
| 222 | ||
| 223 | return __get_cpu_type(cpu_type); | |
| 224 | } | |
| 225 | ||
| 226 | static inline int __pure boot_cpu_type(void) | |
| 227 | { | |
| 228 | const int cpu_type = cpu_data[0].cputype; | |
| 229 | ||
| 230 | return __get_cpu_type(cpu_type); | |
| 231 | } | |
| 232 | ||
| 233 | #endif /* __ASM_CPU_TYPE_H */ |