Merge tag 'mac80211-for-davem-2015-01-23' of git://git.kernel.org/pub/scm/linux/kerne...
[deliverable/linux.git] / arch / mips / include / asm / elf.h
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
f039b5d3
RB
5 *
6 * Much of this is taken from binutils and GNU libc ...
1da177e4
LT
7 */
8#ifndef _ASM_ELF_H
9#define _ASM_ELF_H
10
90cee759
PB
11#include <linux/fs.h>
12#include <uapi/linux/elf.h>
1da177e4
LT
13
14/* ELF header e_flags defines. */
15/* MIPS architecture level. */
70342287
RB
16#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
17#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
18#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
19#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
20#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
21#define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
22#define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
97fb5de1
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23#define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32 R2 code. */
24#define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64 R2 code. */
1da177e4
LT
25
26/* The ABI of a file. */
27#define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
28#define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */
29
30#define PT_MIPS_REGINFO 0x70000000
31#define PT_MIPS_RTPROC 0x70000001
32#define PT_MIPS_OPTIONS 0x70000002
6cd96229 33#define PT_MIPS_ABIFLAGS 0x70000003
1da177e4
LT
34
35/* Flags in the e_flags field of the header */
36#define EF_MIPS_NOREORDER 0x00000001
37#define EF_MIPS_PIC 0x00000002
38#define EF_MIPS_CPIC 0x00000004
39#define EF_MIPS_ABI2 0x00000020
40#define EF_MIPS_OPTIONS_FIRST 0x00000080
41#define EF_MIPS_32BITMODE 0x00000100
597ce172 42#define EF_MIPS_FP64 0x00000200
1da177e4
LT
43#define EF_MIPS_ABI 0x0000f000
44#define EF_MIPS_ARCH 0xf0000000
45
46#define DT_MIPS_RLD_VERSION 0x70000001
47#define DT_MIPS_TIME_STAMP 0x70000002
48#define DT_MIPS_ICHECKSUM 0x70000003
49#define DT_MIPS_IVERSION 0x70000004
50#define DT_MIPS_FLAGS 0x70000005
51 #define RHF_NONE 0x00000000
52 #define RHF_HARDWAY 0x00000001
53 #define RHF_NOTPOT 0x00000002
54 #define RHF_SGI_ONLY 0x00000010
55#define DT_MIPS_BASE_ADDRESS 0x70000006
56#define DT_MIPS_CONFLICT 0x70000008
57#define DT_MIPS_LIBLIST 0x70000009
58#define DT_MIPS_LOCAL_GOTNO 0x7000000a
59#define DT_MIPS_CONFLICTNO 0x7000000b
60#define DT_MIPS_LIBLISTNO 0x70000010
61#define DT_MIPS_SYMTABNO 0x70000011
62#define DT_MIPS_UNREFEXTNO 0x70000012
63#define DT_MIPS_GOTSYM 0x70000013
64#define DT_MIPS_HIPAGENO 0x70000014
65#define DT_MIPS_RLD_MAP 0x70000016
66
67#define R_MIPS_NONE 0
68#define R_MIPS_16 1
69#define R_MIPS_32 2
70#define R_MIPS_REL32 3
71#define R_MIPS_26 4
72#define R_MIPS_HI16 5
73#define R_MIPS_LO16 6
74#define R_MIPS_GPREL16 7
75#define R_MIPS_LITERAL 8
76#define R_MIPS_GOT16 9
77#define R_MIPS_PC16 10
78#define R_MIPS_CALL16 11
79#define R_MIPS_GPREL32 12
80/* The remaining relocs are defined on Irix, although they are not
70342287 81 in the MIPS ELF ABI. */
1da177e4
LT
82#define R_MIPS_UNUSED1 13
83#define R_MIPS_UNUSED2 14
84#define R_MIPS_UNUSED3 15
85#define R_MIPS_SHIFT5 16
86#define R_MIPS_SHIFT6 17
87#define R_MIPS_64 18
88#define R_MIPS_GOT_DISP 19
89#define R_MIPS_GOT_PAGE 20
90#define R_MIPS_GOT_OFST 21
91/*
92 * The following two relocation types are specified in the MIPS ABI
93 * conformance guide version 1.2 but not yet in the psABI.
94 */
95#define R_MIPS_GOTHI16 22
96#define R_MIPS_GOTLO16 23
97#define R_MIPS_SUB 24
98#define R_MIPS_INSERT_A 25
99#define R_MIPS_INSERT_B 26
100#define R_MIPS_DELETE 27
101#define R_MIPS_HIGHER 28
102#define R_MIPS_HIGHEST 29
103/*
104 * The following two relocation types are specified in the MIPS ABI
105 * conformance guide version 1.2 but not yet in the psABI.
106 */
107#define R_MIPS_CALLHI16 30
108#define R_MIPS_CALLLO16 31
109/*
110 * This range is reserved for vendor specific relocations.
111 */
112#define R_MIPS_LOVENDOR 100
113#define R_MIPS_HIVENDOR 127
114
f039b5d3
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115#define SHN_MIPS_ACCOMON 0xff00 /* Allocated common symbols */
116#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */
117#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */
118#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */
119#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */
1da177e4
LT
120
121#define SHT_MIPS_LIST 0x70000000
122#define SHT_MIPS_CONFLICT 0x70000002
123#define SHT_MIPS_GPTAB 0x70000003
124#define SHT_MIPS_UCODE 0x70000004
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RB
125#define SHT_MIPS_DEBUG 0x70000005
126#define SHT_MIPS_REGINFO 0x70000006
127#define SHT_MIPS_PACKAGE 0x70000007
128#define SHT_MIPS_PACKSYM 0x70000008
129#define SHT_MIPS_RELD 0x70000009
130#define SHT_MIPS_IFACE 0x7000000b
131#define SHT_MIPS_CONTENT 0x7000000c
132#define SHT_MIPS_OPTIONS 0x7000000d
133#define SHT_MIPS_SHDR 0x70000010
134#define SHT_MIPS_FDESC 0x70000011
135#define SHT_MIPS_EXTSYM 0x70000012
136#define SHT_MIPS_DENSE 0x70000013
137#define SHT_MIPS_PDESC 0x70000014
138#define SHT_MIPS_LOCSYM 0x70000015
139#define SHT_MIPS_AUXSYM 0x70000016
140#define SHT_MIPS_OPTSYM 0x70000017
141#define SHT_MIPS_LOCSTR 0x70000018
142#define SHT_MIPS_LINE 0x70000019
143#define SHT_MIPS_RFDESC 0x7000001a
144#define SHT_MIPS_DELTASYM 0x7000001b
145#define SHT_MIPS_DELTAINST 0x7000001c
146#define SHT_MIPS_DELTACLASS 0x7000001d
147#define SHT_MIPS_DWARF 0x7000001e
148#define SHT_MIPS_DELTADECL 0x7000001f
149#define SHT_MIPS_SYMBOL_LIB 0x70000020
150#define SHT_MIPS_EVENTS 0x70000021
151#define SHT_MIPS_TRANSLATE 0x70000022
152#define SHT_MIPS_PIXIE 0x70000023
153#define SHT_MIPS_XLATE 0x70000024
154#define SHT_MIPS_XLATE_DEBUG 0x70000025
155#define SHT_MIPS_WHIRL 0x70000026
156#define SHT_MIPS_EH_REGION 0x70000027
157#define SHT_MIPS_XLATE_OLD 0x70000028
158#define SHT_MIPS_PDR_EXCEPTION 0x70000029
1da177e4 159
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RB
160#define SHF_MIPS_GPREL 0x10000000
161#define SHF_MIPS_MERGE 0x20000000
162#define SHF_MIPS_ADDR 0x40000000
163#define SHF_MIPS_STRING 0x80000000
164#define SHF_MIPS_NOSTRIP 0x08000000
165#define SHF_MIPS_LOCAL 0x04000000
166#define SHF_MIPS_NAMES 0x02000000
167#define SHF_MIPS_NODUPES 0x01000000
1da177e4
LT
168
169#ifndef ELF_ARCH
170/* ELF register definitions */
171#define ELF_NGREG 45
172#define ELF_NFPREG 33
173
174typedef unsigned long elf_greg_t;
175typedef elf_greg_t elf_gregset_t[ELF_NGREG];
176
177typedef double elf_fpreg_t;
178typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
179
6cd96229
PB
180struct mips_elf_abiflags_v0 {
181 uint16_t version; /* Version of flags structure */
182 uint8_t isa_level; /* The level of the ISA: 1-5, 32, 64 */
183 uint8_t isa_rev; /* The revision of ISA: 0 for MIPS V and below,
184 1-n otherwise */
185 uint8_t gpr_size; /* The size of general purpose registers */
186 uint8_t cpr1_size; /* The size of co-processor 1 registers */
187 uint8_t cpr2_size; /* The size of co-processor 2 registers */
188 uint8_t fp_abi; /* The floating-point ABI */
189 uint32_t isa_ext; /* Mask of processor-specific extensions */
190 uint32_t ases; /* Mask of ASEs used */
191 uint32_t flags1; /* Mask of general flags */
192 uint32_t flags2;
193};
194
195#define MIPS_ABI_FP_ANY 0 /* FP ABI doesn't matter */
196#define MIPS_ABI_FP_DOUBLE 1 /* -mdouble-float */
197#define MIPS_ABI_FP_SINGLE 2 /* -msingle-float */
198#define MIPS_ABI_FP_SOFT 3 /* -msoft-float */
199#define MIPS_ABI_FP_OLD_64 4 /* -mips32r2 -mfp64 */
200#define MIPS_ABI_FP_XX 5 /* -mfpxx */
201#define MIPS_ABI_FP_64 6 /* -mips32r2 -mfp64 */
202#define MIPS_ABI_FP_64A 7 /* -mips32r2 -mfp64 -mno-odd-spreg */
203
875d43e7 204#ifdef CONFIG_32BIT
1da177e4 205
597ce172
PB
206/*
207 * In order to be sure that we don't attempt to execute an O32 binary which
208 * requires 64 bit FP (FR=1) on a system which does not support it we refuse
209 * to execute any binary which has bits specified by the following macro set
210 * in its ELF header flags.
211 */
212#ifdef CONFIG_MIPS_O32_FP64_SUPPORT
213# define __MIPS_O32_FP64_MUST_BE_ZERO 0
214#else
215# define __MIPS_O32_FP64_MUST_BE_ZERO EF_MIPS_FP64
216#endif
217
1da177e4
LT
218/*
219 * This is used to ensure we don't load something for the wrong architecture.
220 */
221#define elf_check_arch(hdr) \
222({ \
223 int __res = 1; \
224 struct elfhdr *__h = (hdr); \
225 \
226 if (__h->e_machine != EM_MIPS) \
227 __res = 0; \
228 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
229 __res = 0; \
230 if ((__h->e_flags & EF_MIPS_ABI2) != 0) \
231 __res = 0; \
232 if (((__h->e_flags & EF_MIPS_ABI) != 0) && \
233 ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \
597ce172
PB
234 __res = 0; \
235 if (__h->e_flags & __MIPS_O32_FP64_MUST_BE_ZERO) \
1da177e4
LT
236 __res = 0; \
237 \
238 __res; \
239})
240
241/*
242 * These are used to set parameters in the core dumps.
243 */
244#define ELF_CLASS ELFCLASS32
245
875d43e7 246#endif /* CONFIG_32BIT */
1da177e4 247
875d43e7 248#ifdef CONFIG_64BIT
1da177e4
LT
249/*
250 * This is used to ensure we don't load something for the wrong architecture.
251 */
252#define elf_check_arch(hdr) \
253({ \
254 int __res = 1; \
255 struct elfhdr *__h = (hdr); \
256 \
257 if (__h->e_machine != EM_MIPS) \
258 __res = 0; \
70342287 259 if (__h->e_ident[EI_CLASS] != ELFCLASS64) \
1da177e4
LT
260 __res = 0; \
261 \
262 __res; \
263})
264
265/*
266 * These are used to set parameters in the core dumps.
267 */
268#define ELF_CLASS ELFCLASS64
269
875d43e7 270#endif /* CONFIG_64BIT */
1da177e4
LT
271
272/*
273 * These are used to set parameters in the core dumps.
274 */
275#ifdef __MIPSEB__
276#define ELF_DATA ELFDATA2MSB
08d9d1c4 277#elif defined(__MIPSEL__)
1da177e4
LT
278#define ELF_DATA ELFDATA2LSB
279#endif
280#define ELF_ARCH EM_MIPS
281
282#endif /* !defined(ELF_ARCH) */
283
e50c0a8f
RB
284struct mips_abi;
285
286extern struct mips_abi mips_abi;
287extern struct mips_abi mips_abi_32;
288extern struct mips_abi mips_abi_n32;
289
875d43e7 290#ifdef CONFIG_32BIT
1da177e4 291
90cee759 292#define SET_PERSONALITY2(ex, state) \
e50c0a8f 293do { \
1c0d52b9
DD
294 if (personality(current->personality) != PER_LINUX) \
295 set_personality(PER_LINUX); \
e50c0a8f 296 \
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PB
297 mips_set_personality_fp(state); \
298 \
e50c0a8f 299 current->thread.abi = &mips_abi; \
1da177e4
LT
300} while (0)
301
875d43e7 302#endif /* CONFIG_32BIT */
1da177e4 303
875d43e7 304#ifdef CONFIG_64BIT
1da177e4 305
e50c0a8f
RB
306#ifdef CONFIG_MIPS32_N32
307#define __SET_PERSONALITY32_N32() \
308 do { \
293c5bd1 309 set_thread_flag(TIF_32BIT_ADDR); \
e50c0a8f
RB
310 current->thread.abi = &mips_abi_n32; \
311 } while (0)
312#else
313#define __SET_PERSONALITY32_N32() \
314 do { } while (0)
315#endif
316
317#ifdef CONFIG_MIPS32_O32
90cee759 318#define __SET_PERSONALITY32_O32(ex, state) \
e50c0a8f 319 do { \
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RB
320 set_thread_flag(TIF_32BIT_REGS); \
321 set_thread_flag(TIF_32BIT_ADDR); \
597ce172 322 \
90cee759 323 mips_set_personality_fp(state); \
597ce172 324 \
e50c0a8f
RB
325 current->thread.abi = &mips_abi_32; \
326 } while (0)
327#else
90cee759 328#define __SET_PERSONALITY32_O32(ex, state) \
e50c0a8f
RB
329 do { } while (0)
330#endif
331
332#ifdef CONFIG_MIPS32_COMPAT
90cee759 333#define __SET_PERSONALITY32(ex, state) \
e50c0a8f
RB
334do { \
335 if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \
336 ((ex).e_flags & EF_MIPS_ABI) == 0) \
337 __SET_PERSONALITY32_N32(); \
338 else \
90cee759 339 __SET_PERSONALITY32_O32(ex, state); \
e50c0a8f
RB
340} while (0)
341#else
90cee759 342#define __SET_PERSONALITY32(ex, state) do { } while (0)
e50c0a8f
RB
343#endif
344
90cee759 345#define SET_PERSONALITY2(ex, state) \
e50c0a8f 346do { \
1c0d52b9
DD
347 unsigned int p; \
348 \
293c5bd1 349 clear_thread_flag(TIF_32BIT_REGS); \
597ce172 350 clear_thread_flag(TIF_32BIT_FPREGS); \
4227a2d4 351 clear_thread_flag(TIF_HYBRID_FPREGS); \
293c5bd1
RB
352 clear_thread_flag(TIF_32BIT_ADDR); \
353 \
e50c0a8f 354 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
90cee759 355 __SET_PERSONALITY32(ex, state); \
293c5bd1 356 else \
e50c0a8f 357 current->thread.abi = &mips_abi; \
e50c0a8f 358 \
1c0d52b9
DD
359 p = personality(current->personality); \
360 if (p != PER_LINUX32 && p != PER_LINUX) \
e50c0a8f 361 set_personality(PER_LINUX); \
1da177e4
LT
362} while (0)
363
875d43e7 364#endif /* CONFIG_64BIT */
1da177e4 365
6a9c001b 366#define CORE_DUMP_USE_REGSET
1da177e4
LT
367#define ELF_EXEC_PAGESIZE PAGE_SIZE
368
369/* This yields a mask that user programs can use to figure out what
370 instruction set this cpu supports. This could be done in userspace,
371 but it's not easy, and we've already done it here. */
372
70342287 373#define ELF_HWCAP (0)
1da177e4 374
874fd3b5
DD
375/*
376 * This yields a string that ld.so will use to load implementation
70342287 377 * specific libraries for optimization. This is more specific in
874fd3b5
DD
378 * intent than poking at uname or /proc/cpuinfo.
379 */
1da177e4 380
874fd3b5
DD
381#define ELF_PLATFORM __elf_platform
382extern const char *__elf_platform;
1da177e4
LT
383
384/*
385 * See comments in asm-alpha/elf.h, this is the same thing
386 * on the MIPS.
387 */
388#define ELF_PLAT_INIT(_r, load_addr) do { \
389 _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \
390 _r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; \
391 _r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; \
392 _r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; \
393 _r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; \
394 _r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; \
395 _r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0; \
396 _r->regs[30] = _r->regs[31] = 0; \
397} while (0)
398
399/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
400 use of this is to invoke "./ld.so someprog" to test out a new version of
70342287
RB
401 the loader. We need to make sure that it is out of the way of the program
402 that it will "exec", and that there is sufficient room for the brk. */
1da177e4
LT
403
404#ifndef ELF_ET_DYN_BASE
70342287 405#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
1da177e4
LT
406#endif
407
c52d0d30
DD
408#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
409struct linux_binprm;
410extern int arch_setup_additional_pages(struct linux_binprm *bprm,
411 int uses_interp);
652b14aa
DD
412
413struct mm_struct;
414extern unsigned long arch_randomize_brk(struct mm_struct *mm);
415#define arch_randomize_brk arch_randomize_brk
416
90cee759
PB
417struct arch_elf_state {
418 int fp_abi;
419 int interp_fp_abi;
420 int overall_abi;
421};
422
423#define INIT_ARCH_ELF_STATE { \
424 .fp_abi = -1, \
425 .interp_fp_abi = -1, \
426 .overall_abi = -1, \
427}
428
429extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
430 bool is_interp, struct arch_elf_state *state);
431
432extern int arch_check_elf(void *ehdr, bool has_interpreter,
433 struct arch_elf_state *state);
434
435extern void mips_set_personality_fp(struct arch_elf_state *state);
436
1da177e4 437#endif /* _ASM_ELF_H */
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