projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 5b3b1688 DD |
1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public | |
| 3 | * License. See the file "COPYING" in the main directory of this archive | |
| 4 | * for more details. | |
| 5 | * | |
| 6 | * Copyright (C) 2004-2008 Cavium Networks | |
| 7 | */ | |
| 8 | #ifndef __OCTEON_IRQ_H__ | |
| 9 | #define __OCTEON_IRQ_H__ | |
| 10 | ||
| 11 | #define NR_IRQS OCTEON_IRQ_LAST | |
| 12 | #define MIPS_CPU_IRQ_BASE OCTEON_IRQ_SW0 | |
| 13 | ||
| 0c326387 DD |
14 | enum octeon_irq { |
| 15 | /* 1 - 8 represent the 8 MIPS standard interrupt sources */ | |
| 16 | OCTEON_IRQ_SW0 = 1, | |
| 17 | OCTEON_IRQ_SW1, | |
| 18 | /* CIU0, CUI2, CIU4 are 3, 4, 5 */ | |
| 19 | OCTEON_IRQ_5 = 6, | |
| 20 | OCTEON_IRQ_PERF, | |
| 21 | OCTEON_IRQ_TIMER, | |
| 22 | /* sources in CIU_INTX_EN0 */ | |
| 23 | OCTEON_IRQ_WORKQ0, | |
| 9787c56e DD |
24 | OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 64, |
| 25 | OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 32, | |
| 0c326387 | 26 | OCTEON_IRQ_MBOX1, |
| 9787c56e DD |
27 | OCTEON_IRQ_MBOX2, |
| 28 | OCTEON_IRQ_MBOX3, | |
| 0c326387 DD |
29 | OCTEON_IRQ_PCI_INT0, |
| 30 | OCTEON_IRQ_PCI_INT1, | |
| 31 | OCTEON_IRQ_PCI_INT2, | |
| 32 | OCTEON_IRQ_PCI_INT3, | |
| 33 | OCTEON_IRQ_PCI_MSI0, | |
| 34 | OCTEON_IRQ_PCI_MSI1, | |
| 35 | OCTEON_IRQ_PCI_MSI2, | |
| 36 | OCTEON_IRQ_PCI_MSI3, | |
| 37 | ||
| a53825ef ES |
38 | OCTEON_IRQ_TWSI, |
| 39 | OCTEON_IRQ_TWSI2, | |
| 0c326387 | 40 | OCTEON_IRQ_RML, |
| 0c326387 DD |
41 | OCTEON_IRQ_TIMER0, |
| 42 | OCTEON_IRQ_TIMER1, | |
| 43 | OCTEON_IRQ_TIMER2, | |
| 44 | OCTEON_IRQ_TIMER3, | |
| 0b28b823 DD |
45 | #ifndef CONFIG_PCI_MSI |
| 46 | OCTEON_IRQ_LAST = 127 | |
| 47 | #endif | |
| 0c326387 | 48 | }; |
| 5b3b1688 DD |
49 | |
| 50 | #ifdef CONFIG_PCI_MSI | |
| f5e08284 DD |
51 | /* 256 - 511 represent the MSI interrupts 0-255 */ |
| 52 | #define OCTEON_IRQ_MSI_BIT0 (256) | |
| 5b3b1688 | 53 | |
| 70342287 RB |
54 | #define OCTEON_IRQ_MSI_LAST (OCTEON_IRQ_MSI_BIT0 + 255) |
| 55 | #define OCTEON_IRQ_LAST (OCTEON_IRQ_MSI_LAST + 1) | |
| 5b3b1688 DD |
56 | #endif |
| 57 | ||
| 58 | #endif |