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1 | /***********************license start*************** |
2 | * Author: Cavium Networks | |
3 | * | |
4 | * Contact: support@caviumnetworks.com | |
5 | * This file is part of the OCTEON SDK | |
6 | * | |
7 | * Copyright (c) 2003-2008 Cavium Networks | |
8 | * | |
9 | * This file is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License, Version 2, as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This file is distributed in the hope that it will be useful, but | |
14 | * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty | |
15 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or | |
16 | * NONINFRINGEMENT. See the GNU General Public License for more | |
17 | * details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this file; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
22 | * or visit http://www.gnu.org/licenses/. | |
23 | * | |
24 | * This file may also be available under a different license from Cavium. | |
25 | * Contact Cavium Networks for more information | |
26 | ***********************license end**************************************/ | |
27 | ||
28 | /* | |
29 | * File defining checks for different Octeon features. | |
30 | */ | |
31 | ||
32 | #ifndef __OCTEON_FEATURE_H__ | |
33 | #define __OCTEON_FEATURE_H__ | |
26afc5e3 DD |
34 | #include <asm/octeon/cvmx-mio-defs.h> |
35 | #include <asm/octeon/cvmx-rnm-defs.h> | |
58f07778 DD |
36 | |
37 | enum octeon_feature { | |
70342287 | 38 | /* CN68XX uses port kinds for packet interface */ |
26afc5e3 DD |
39 | OCTEON_FEATURE_PKND, |
40 | /* CN68XX has different fields in word0 - word2 */ | |
41 | OCTEON_FEATURE_CN68XX_WQE, | |
58f07778 DD |
42 | /* |
43 | * Octeon models in the CN5XXX family and higher support | |
44 | * atomic add instructions to memory (saa/saad). | |
45 | */ | |
46 | OCTEON_FEATURE_SAAD, | |
47 | /* Does this Octeon support the ZIP offload engine? */ | |
48 | OCTEON_FEATURE_ZIP, | |
26afc5e3 | 49 | OCTEON_FEATURE_DORM_CRYPTO, |
58f07778 DD |
50 | /* Does this Octeon support PCI express? */ |
51 | OCTEON_FEATURE_PCIE, | |
70342287 | 52 | /* Does this Octeon support SRIOs */ |
26afc5e3 DD |
53 | OCTEON_FEATURE_SRIO, |
54 | /* Does this Octeon support Interlaken */ | |
55 | OCTEON_FEATURE_ILK, | |
58f07778 DD |
56 | /* Some Octeon models support internal memory for storing |
57 | * cryptographic keys */ | |
58 | OCTEON_FEATURE_KEY_MEMORY, | |
59 | /* Octeon has a LED controller for banks of external LEDs */ | |
60 | OCTEON_FEATURE_LED_CONTROLLER, | |
61 | /* Octeon has a trace buffer */ | |
62 | OCTEON_FEATURE_TRA, | |
63 | /* Octeon has a management port */ | |
64 | OCTEON_FEATURE_MGMT_PORT, | |
65 | /* Octeon has a raid unit */ | |
66 | OCTEON_FEATURE_RAID, | |
67 | /* Octeon has a builtin USB */ | |
68 | OCTEON_FEATURE_USB, | |
f1f1f590 DD |
69 | /* Octeon IPD can run without using work queue entries */ |
70 | OCTEON_FEATURE_NO_WPTR, | |
71 | /* Octeon has DFA state machines */ | |
72 | OCTEON_FEATURE_DFA, | |
73 | /* Octeon MDIO block supports clause 45 transactions for 10 | |
74 | * Gig support */ | |
75 | OCTEON_FEATURE_MDIO_CLAUSE_45, | |
70342287 | 76 | /* |
26afc5e3 DD |
77 | * CN52XX and CN56XX used a block named NPEI for PCIe |
78 | * access. Newer chips replaced this with SLI+DPI. | |
79 | */ | |
80 | OCTEON_FEATURE_NPEI, | |
81 | OCTEON_FEATURE_HFA, | |
82 | OCTEON_FEATURE_DFM, | |
83 | OCTEON_FEATURE_CIU2, | |
84 | OCTEON_MAX_FEATURE | |
58f07778 DD |
85 | }; |
86 | ||
011f3c6c AK |
87 | enum octeon_feature_bits { |
88 | OCTEON_HAS_CRYPTO = 0x0001, /* Crypto acceleration using COP2 */ | |
89 | }; | |
90 | extern enum octeon_feature_bits __octeon_feature_bits; | |
91 | ||
92 | /** | |
93 | * octeon_has_crypto() - Check if this OCTEON has crypto acceleration support. | |
94 | * | |
95 | * Returns: Non-zero if the feature exists. Zero if the feature does not exist. | |
96 | */ | |
97 | static inline int octeon_has_crypto(void) | |
98 | { | |
99 | return __octeon_feature_bits & OCTEON_HAS_CRYPTO; | |
100 | } | |
101 | ||
58f07778 DD |
102 | /** |
103 | * Determine if the current Octeon supports a specific feature. These | |
104 | * checks have been optimized to be fairly quick, but they should still | |
105 | * be kept out of fast path code. | |
106 | * | |
107 | * @feature: Feature to check for. This should always be a constant so the | |
70342287 | 108 | * compiler can remove the switch statement through optimization. |
58f07778 DD |
109 | * |
110 | * Returns Non zero if the feature exists. Zero if the feature does not | |
70342287 | 111 | * exist. |
58f07778 DD |
112 | */ |
113 | static inline int octeon_has_feature(enum octeon_feature feature) | |
114 | { | |
115 | switch (feature) { | |
116 | case OCTEON_FEATURE_SAAD: | |
117 | return !OCTEON_IS_MODEL(OCTEON_CN3XXX); | |
118 | ||
26afc5e3 DD |
119 | case OCTEON_FEATURE_DORM_CRYPTO: |
120 | if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { | |
121 | union cvmx_mio_fus_dat2 fus_2; | |
122 | fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2); | |
123 | return !fus_2.s.nocrypto && !fus_2.s.nomul && fus_2.s.dorm_crypto; | |
124 | } else { | |
125 | return 0; | |
126 | } | |
58f07778 DD |
127 | |
128 | case OCTEON_FEATURE_PCIE: | |
129 | return OCTEON_IS_MODEL(OCTEON_CN56XX) | |
26afc5e3 | 130 | || OCTEON_IS_MODEL(OCTEON_CN52XX) |
b96d6a80 ZLK |
131 | || OCTEON_IS_MODEL(OCTEON_CN6XXX) |
132 | || OCTEON_IS_MODEL(OCTEON_CN7XXX); | |
26afc5e3 DD |
133 | |
134 | case OCTEON_FEATURE_SRIO: | |
135 | return OCTEON_IS_MODEL(OCTEON_CN63XX) | |
136 | || OCTEON_IS_MODEL(OCTEON_CN66XX); | |
137 | ||
138 | case OCTEON_FEATURE_ILK: | |
139 | return (OCTEON_IS_MODEL(OCTEON_CN68XX)); | |
58f07778 DD |
140 | |
141 | case OCTEON_FEATURE_KEY_MEMORY: | |
26afc5e3 DD |
142 | return OCTEON_IS_MODEL(OCTEON_CN38XX) |
143 | || OCTEON_IS_MODEL(OCTEON_CN58XX) | |
144 | || OCTEON_IS_MODEL(OCTEON_CN56XX) | |
145 | || OCTEON_IS_MODEL(OCTEON_CN6XXX); | |
146 | ||
58f07778 DD |
147 | case OCTEON_FEATURE_LED_CONTROLLER: |
148 | return OCTEON_IS_MODEL(OCTEON_CN38XX) | |
149 | || OCTEON_IS_MODEL(OCTEON_CN58XX) | |
150 | || OCTEON_IS_MODEL(OCTEON_CN56XX); | |
26afc5e3 | 151 | |
58f07778 DD |
152 | case OCTEON_FEATURE_TRA: |
153 | return !(OCTEON_IS_MODEL(OCTEON_CN30XX) | |
154 | || OCTEON_IS_MODEL(OCTEON_CN50XX)); | |
26afc5e3 DD |
155 | case OCTEON_FEATURE_MGMT_PORT: |
156 | return OCTEON_IS_MODEL(OCTEON_CN56XX) | |
157 | || OCTEON_IS_MODEL(OCTEON_CN52XX) | |
158 | || OCTEON_IS_MODEL(OCTEON_CN6XXX); | |
159 | ||
160 | case OCTEON_FEATURE_RAID: | |
161 | return OCTEON_IS_MODEL(OCTEON_CN56XX) | |
162 | || OCTEON_IS_MODEL(OCTEON_CN52XX) | |
163 | || OCTEON_IS_MODEL(OCTEON_CN6XXX); | |
164 | ||
58f07778 DD |
165 | case OCTEON_FEATURE_USB: |
166 | return !(OCTEON_IS_MODEL(OCTEON_CN38XX) | |
167 | || OCTEON_IS_MODEL(OCTEON_CN58XX)); | |
26afc5e3 | 168 | |
f1f1f590 DD |
169 | case OCTEON_FEATURE_NO_WPTR: |
170 | return (OCTEON_IS_MODEL(OCTEON_CN56XX) | |
26afc5e3 DD |
171 | || OCTEON_IS_MODEL(OCTEON_CN52XX) |
172 | || OCTEON_IS_MODEL(OCTEON_CN6XXX)) | |
173 | && !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X) | |
174 | && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X); | |
175 | ||
f1f1f590 DD |
176 | case OCTEON_FEATURE_MDIO_CLAUSE_45: |
177 | return !(OCTEON_IS_MODEL(OCTEON_CN3XXX) | |
178 | || OCTEON_IS_MODEL(OCTEON_CN58XX) | |
179 | || OCTEON_IS_MODEL(OCTEON_CN50XX)); | |
26afc5e3 DD |
180 | |
181 | case OCTEON_FEATURE_NPEI: | |
182 | return OCTEON_IS_MODEL(OCTEON_CN56XX) | |
183 | || OCTEON_IS_MODEL(OCTEON_CN52XX); | |
184 | ||
185 | case OCTEON_FEATURE_PKND: | |
186 | return OCTEON_IS_MODEL(OCTEON_CN68XX); | |
187 | ||
188 | case OCTEON_FEATURE_CN68XX_WQE: | |
189 | return OCTEON_IS_MODEL(OCTEON_CN68XX); | |
190 | ||
191 | case OCTEON_FEATURE_CIU2: | |
192 | return OCTEON_IS_MODEL(OCTEON_CN68XX); | |
193 | ||
194 | default: | |
195 | break; | |
58f07778 DD |
196 | } |
197 | return 0; | |
198 | } | |
199 | ||
200 | #endif /* __OCTEON_FEATURE_H__ */ |