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1da177e4 LT |
1 | /* thread_info.h: MIPS low-level thread information |
2 | * | |
3 | * Copyright (C) 2002 David Howells (dhowells@redhat.com) | |
4 | * - Incorporating suggestions made by Linus Torvalds and Dave Miller | |
5 | */ | |
6 | ||
7 | #ifndef _ASM_THREAD_INFO_H | |
8 | #define _ASM_THREAD_INFO_H | |
9 | ||
10 | #ifdef __KERNEL__ | |
11 | ||
1da177e4 LT |
12 | |
13 | #ifndef __ASSEMBLY__ | |
14 | ||
15 | #include <asm/processor.h> | |
16 | ||
17 | /* | |
18 | * low level task data that entry.S needs immediate access to | |
19 | * - this struct should fit entirely inside of one cache line | |
20 | * - this struct shares the supervisor stack pages | |
21 | * - if the contents of this structure are changed, the assembly constants | |
22 | * must also be changed | |
23 | */ | |
24 | struct thread_info { | |
25 | struct task_struct *task; /* main task structure */ | |
1da177e4 | 26 | unsigned long flags; /* low level flags */ |
3c37026d | 27 | unsigned long tp_value; /* thread pointer */ |
1da177e4 | 28 | __u32 cpu; /* current CPU */ |
dcd497f9 | 29 | int preempt_count; /* 0 => preemptable, <0 => BUG */ |
7c151d3d | 30 | int r2_emul_return; /* 1 => Returning from R2 emulator */ |
02637b85 RB |
31 | mm_segment_t addr_limit; /* |
32 | * thread address space limit: | |
33 | * 0x7fffffff for user-thead | |
34 | * 0xffffffff for kernel-thread | |
35 | */ | |
937a8015 | 36 | struct pt_regs *regs; |
c2d9f177 | 37 | long syscall; /* syscall number */ |
1da177e4 LT |
38 | }; |
39 | ||
40 | /* | |
41 | * macros/functions for gaining access to the thread information structure | |
1da177e4 LT |
42 | */ |
43 | #define INIT_THREAD_INFO(tsk) \ | |
44 | { \ | |
45 | .task = &tsk, \ | |
293c5bd1 | 46 | .flags = _TIF_FIXADE, \ |
1da177e4 | 47 | .cpu = 0, \ |
c99e6efe | 48 | .preempt_count = INIT_PREEMPT_COUNT, \ |
1da177e4 | 49 | .addr_limit = KERNEL_DS, \ |
1da177e4 LT |
50 | } |
51 | ||
52 | #define init_thread_info (init_thread_union.thread_info) | |
53 | #define init_stack (init_thread_union.stack) | |
54 | ||
55 | /* How to get the thread information struct from C. */ | |
fe92da0f DS |
56 | register struct thread_info *__current_thread_info __asm__("$28"); |
57 | ||
ad04c2e9 RB |
58 | static inline struct thread_info *current_thread_info(void) |
59 | { | |
ad04c2e9 RB |
60 | return __current_thread_info; |
61 | } | |
1da177e4 | 62 | |
7b1c0d26 DD |
63 | #endif /* !__ASSEMBLY__ */ |
64 | ||
1da177e4 | 65 | /* thread information allocation */ |
875d43e7 | 66 | #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT) |
1da177e4 LT |
67 | #define THREAD_SIZE_ORDER (1) |
68 | #endif | |
875d43e7 | 69 | #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_64BIT) |
1da177e4 LT |
70 | #define THREAD_SIZE_ORDER (2) |
71 | #endif | |
72 | #ifdef CONFIG_PAGE_SIZE_8KB | |
73 | #define THREAD_SIZE_ORDER (1) | |
74 | #endif | |
75 | #ifdef CONFIG_PAGE_SIZE_16KB | |
76 | #define THREAD_SIZE_ORDER (0) | |
77 | #endif | |
c52399be RB |
78 | #ifdef CONFIG_PAGE_SIZE_32KB |
79 | #define THREAD_SIZE_ORDER (0) | |
80 | #endif | |
1da177e4 LT |
81 | #ifdef CONFIG_PAGE_SIZE_64KB |
82 | #define THREAD_SIZE_ORDER (0) | |
83 | #endif | |
84 | ||
85 | #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) | |
86 | #define THREAD_MASK (THREAD_SIZE - 1UL) | |
87 | ||
334c86c4 F |
88 | #define STACK_WARN (THREAD_SIZE / 8) |
89 | ||
1da177e4 LT |
90 | /* |
91 | * thread information flags | |
92 | * - these are process state flags that various assembly files may need to | |
93 | * access | |
94 | * - pending work-to-be-done flags are in LSW | |
95 | * - other flags in MSW | |
96 | */ | |
a583f1b5 SE |
97 | #define TIF_SIGPENDING 1 /* signal pending */ |
98 | #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ | |
99 | #define TIF_SYSCALL_AUDIT 3 /* syscall auditing active */ | |
100 | #define TIF_SECCOMP 4 /* secure computing */ | |
d0420c83 | 101 | #define TIF_NOTIFY_RESUME 5 /* callback before returning to user */ |
40e084a5 | 102 | #define TIF_UPROBE 6 /* breakpointed or singlestepping */ |
7b3e2fc8 | 103 | #define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */ |
1da177e4 | 104 | #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ |
0ddc9324 | 105 | #define TIF_MEMDIE 18 /* is terminating due to OOM killer */ |
c3fc5cd5 | 106 | #define TIF_NOHZ 19 /* in adaptive nohz mode */ |
293c5bd1 RB |
107 | #define TIF_FIXADE 20 /* Fix address errors in software */ |
108 | #define TIF_LOGADE 21 /* Log address errors to syslog */ | |
597ce172 | 109 | #define TIF_32BIT_REGS 22 /* 32-bit general purpose registers */ |
293c5bd1 RB |
110 | #define TIF_32BIT_ADDR 23 /* 32-bit address space (o32/n32) */ |
111 | #define TIF_FPUBOUND 24 /* thread bound to FPU-full CPU set */ | |
6aa3524c | 112 | #define TIF_LOAD_WATCH 25 /* If set, load watch registers */ |
1d7bf993 | 113 | #define TIF_SYSCALL_TRACEPOINT 26 /* syscall tracepoint instrumentation */ |
597ce172 | 114 | #define TIF_32BIT_FPREGS 27 /* 32-bit floating point registers */ |
4227a2d4 | 115 | #define TIF_HYBRID_FPREGS 28 /* 64b FP registers, odd singles in bits 63:32 of even doubles */ |
1db1af84 PB |
116 | #define TIF_USEDMSA 29 /* MSA has been used this quantum */ |
117 | #define TIF_MSA_CTX_LIVE 30 /* MSA context must be preserved */ | |
1da177e4 LT |
118 | #define TIF_SYSCALL_TRACE 31 /* syscall trace active */ |
119 | ||
120 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) | |
1da177e4 LT |
121 | #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) |
122 | #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) | |
123 | #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) | |
127c6f66 | 124 | #define _TIF_SECCOMP (1<<TIF_SECCOMP) |
d0420c83 | 125 | #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) |
40e084a5 | 126 | #define _TIF_UPROBE (1<<TIF_UPROBE) |
1da177e4 | 127 | #define _TIF_USEDFPU (1<<TIF_USEDFPU) |
c3fc5cd5 | 128 | #define _TIF_NOHZ (1<<TIF_NOHZ) |
293c5bd1 RB |
129 | #define _TIF_FIXADE (1<<TIF_FIXADE) |
130 | #define _TIF_LOGADE (1<<TIF_LOGADE) | |
131 | #define _TIF_32BIT_REGS (1<<TIF_32BIT_REGS) | |
132 | #define _TIF_32BIT_ADDR (1<<TIF_32BIT_ADDR) | |
133 | #define _TIF_FPUBOUND (1<<TIF_FPUBOUND) | |
6aa3524c | 134 | #define _TIF_LOAD_WATCH (1<<TIF_LOAD_WATCH) |
597ce172 | 135 | #define _TIF_32BIT_FPREGS (1<<TIF_32BIT_FPREGS) |
4227a2d4 | 136 | #define _TIF_HYBRID_FPREGS (1<<TIF_HYBRID_FPREGS) |
1db1af84 PB |
137 | #define _TIF_USEDMSA (1<<TIF_USEDMSA) |
138 | #define _TIF_MSA_CTX_LIVE (1<<TIF_MSA_CTX_LIVE) | |
1d7bf993 | 139 | #define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT) |
1da177e4 | 140 | |
c3fc5cd5 | 141 | #define _TIF_WORK_SYSCALL_ENTRY (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \ |
137f7df8 MC |
142 | _TIF_SYSCALL_AUDIT | \ |
143 | _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP) | |
e7f3b48a | 144 | |
c19c20ac | 145 | /* work to do in syscall_trace_leave() */ |
c3fc5cd5 | 146 | #define _TIF_WORK_SYSCALL_EXIT (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \ |
1d7bf993 | 147 | _TIF_SYSCALL_AUDIT | _TIF_SYSCALL_TRACEPOINT) |
c19c20ac | 148 | |
127c6f66 | 149 | /* work to do on interrupt/exception return */ |
f925725d | 150 | #define _TIF_WORK_MASK \ |
40e084a5 RB |
151 | (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME | \ |
152 | _TIF_UPROBE) | |
127c6f66 | 153 | /* work to do on any return to u-space */ |
c3fc5cd5 | 154 | #define _TIF_ALLWORK_MASK (_TIF_NOHZ | _TIF_WORK_MASK | \ |
1d7bf993 RB |
155 | _TIF_WORK_SYSCALL_EXIT | \ |
156 | _TIF_SYSCALL_TRACEPOINT) | |
1da177e4 | 157 | |
c2377a42 J |
158 | /* |
159 | * We stash processor id into a COP0 register to retrieve it fast | |
160 | * at kernel exception entry. | |
161 | */ | |
b633648c | 162 | #if defined(CONFIG_MIPS_PGD_C0_CONTEXT) |
c2377a42 J |
163 | #define SMP_CPUID_REG 20, 0 /* XCONTEXT */ |
164 | #define ASM_SMP_CPUID_REG $20 | |
165 | #define SMP_CPUID_PTRSHIFT 48 | |
166 | #else | |
167 | #define SMP_CPUID_REG 4, 0 /* CONTEXT */ | |
168 | #define ASM_SMP_CPUID_REG $4 | |
169 | #define SMP_CPUID_PTRSHIFT 23 | |
170 | #endif | |
1da177e4 | 171 | |
c2377a42 J |
172 | #ifdef CONFIG_64BIT |
173 | #define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 3) | |
174 | #else | |
175 | #define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 2) | |
176 | #endif | |
177 | ||
c2377a42 J |
178 | #define ASM_CPUID_MFC0 MFC0 |
179 | #define UASM_i_CPUID_MFC0 UASM_i_MFC0 | |
c2377a42 J |
180 | |
181 | #endif /* __KERNEL__ */ | |
1da177e4 | 182 | #endif /* _ASM_THREAD_INFO_H */ |