Merge remote-tracking branch 'spi/topic/rspi' into spi-pdata
[deliverable/linux.git] / arch / mips / include / asm / uasm.h
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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
70342287 6 * Copyright (C) 2004, 2005, 2006, 2008 Thiemo Seufer
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7 * Copyright (C) 2005 Maciej W. Rozycki
8 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
abc597fe 9 * Copyright (C) 2012, 2013 MIPS Technologies, Inc. All rights reserved.
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10 */
11
12#include <linux/types.h>
13
22b0763a 14#ifdef CONFIG_EXPORT_UASM
baab01b2 15#include <linux/export.h>
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16#define UASM_EXPORT_SYMBOL(sym) EXPORT_SYMBOL(sym)
17#else
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18#define UASM_EXPORT_SYMBOL(sym)
19#endif
20
abc597fe 21#define _UASM_ISA_CLASSIC 0
a6a4834c 22#define _UASM_ISA_MICROMIPS 1
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23
24#ifndef UASM_ISA
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25#ifdef CONFIG_CPU_MICROMIPS
26#define UASM_ISA _UASM_ISA_MICROMIPS
27#else
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28#define UASM_ISA _UASM_ISA_CLASSIC
29#endif
cf6d9058 30#endif
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31
32#if (UASM_ISA == _UASM_ISA_CLASSIC)
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33#ifdef CONFIG_CPU_MICROMIPS
34#define ISAOPC(op) CL_uasm_i##op
35#define ISAFUNC(x) CL_##x
36#else
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37#define ISAOPC(op) uasm_i##op
38#define ISAFUNC(x) x
cf6d9058 39#endif
a6a4834c 40#elif (UASM_ISA == _UASM_ISA_MICROMIPS)
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41#ifdef CONFIG_CPU_MICROMIPS
42#define ISAOPC(op) uasm_i##op
43#define ISAFUNC(x) x
44#else
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45#define ISAOPC(op) MM_uasm_i##op
46#define ISAFUNC(x) MM_##x
cf6d9058 47#endif
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48#else
49#error Unsupported micro-assembler ISA!!!
50#endif
51
e30ec452 52#define Ip_u1u2u3(op) \
078a55fc 53void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
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54
55#define Ip_u2u1u3(op) \
078a55fc 56void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
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57
58#define Ip_u3u1u2(op) \
078a55fc 59void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
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60
61#define Ip_u1u2s3(op) \
078a55fc 62void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
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63
64#define Ip_u2s3u1(op) \
078a55fc 65void ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c)
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66
67#define Ip_u2u1s3(op) \
078a55fc 68void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
e30ec452 69
92078e06 70#define Ip_u2u1msbu3(op) \
078a55fc 71void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c, \
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72 unsigned int d)
73
e30ec452 74#define Ip_u1u2(op) \
078a55fc 75void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)
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76
77#define Ip_u1s2(op) \
078a55fc 78void ISAOPC(op)(u32 **buf, unsigned int a, signed int b)
e30ec452 79
078a55fc 80#define Ip_u1(op) void ISAOPC(op)(u32 **buf, unsigned int a)
e30ec452 81
078a55fc 82#define Ip_0(op) void ISAOPC(op)(u32 **buf)
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83
84Ip_u2u1s3(_addiu);
85Ip_u3u1u2(_addu);
e30ec452 86Ip_u3u1u2(_and);
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87Ip_u2u1u3(_andi);
88Ip_u1u2s3(_bbit0);
89Ip_u1u2s3(_bbit1);
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90Ip_u1u2s3(_beq);
91Ip_u1u2s3(_beql);
92Ip_u1s2(_bgez);
93Ip_u1s2(_bgezl);
94Ip_u1s2(_bltz);
95Ip_u1s2(_bltzl);
96Ip_u1u2s3(_bne);
fb2a27e7 97Ip_u2s3u1(_cache);
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98Ip_u2u1s3(_daddiu);
99Ip_u3u1u2(_daddu);
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100Ip_u2u1msbu3(_dins);
101Ip_u2u1msbu3(_dinsm);
102Ip_u1u2u3(_dmfc0);
103Ip_u1u2u3(_dmtc0);
104Ip_u2u1u3(_drotr);
105Ip_u2u1u3(_drotr32);
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106Ip_u2u1u3(_dsll);
107Ip_u2u1u3(_dsll32);
108Ip_u2u1u3(_dsra);
109Ip_u2u1u3(_dsrl);
110Ip_u2u1u3(_dsrl32);
111Ip_u3u1u2(_dsubu);
112Ip_0(_eret);
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113Ip_u2u1msbu3(_ext);
114Ip_u2u1msbu3(_ins);
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115Ip_u1(_j);
116Ip_u1(_jal);
117Ip_u1(_jr);
118Ip_u2s3u1(_ld);
71a1c776 119Ip_u3u1u2(_ldx);
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120Ip_u2s3u1(_ll);
121Ip_u2s3u1(_lld);
122Ip_u1s2(_lui);
123Ip_u2s3u1(_lw);
71a1c776 124Ip_u3u1u2(_lwx);
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125Ip_u1u2u3(_mfc0);
126Ip_u1u2u3(_mtc0);
5808184f 127Ip_u3u1u2(_or);
71a1c776 128Ip_u2u1u3(_ori);
fb2a27e7 129Ip_u2s3u1(_pref);
e30ec452 130Ip_0(_rfe);
71a1c776 131Ip_u2u1u3(_rotr);
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132Ip_u2s3u1(_sc);
133Ip_u2s3u1(_scd);
134Ip_u2s3u1(_sd);
135Ip_u2u1u3(_sll);
136Ip_u2u1u3(_sra);
137Ip_u2u1u3(_srl);
138Ip_u3u1u2(_subu);
139Ip_u2s3u1(_sw);
71a1c776 140Ip_u1(_syscall);
e30ec452 141Ip_0(_tlbp);
32546f38 142Ip_0(_tlbr);
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143Ip_0(_tlbwi);
144Ip_0(_tlbwr);
145Ip_u3u1u2(_xor);
146Ip_u2u1u3(_xori);
71a1c776 147
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148
149/* Handle labels. */
150struct uasm_label {
151 u32 *addr;
152 int lab;
153};
154
078a55fc 155void ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr,
abc597fe 156 int lid);
e30ec452 157#ifdef CONFIG_64BIT
abc597fe 158int ISAFUNC(uasm_in_compat_space_p)(long addr);
e30ec452 159#endif
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160int ISAFUNC(uasm_rel_hi)(long val);
161int ISAFUNC(uasm_rel_lo)(long val);
162void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr);
163void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr);
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164
165#define UASM_L_LA(lb) \
078a55fc 166static inline void ISAFUNC(uasm_l##lb)(struct uasm_label **lab, u32 *addr) \
e30ec452 167{ \
cf6d9058 168 ISAFUNC(uasm_build_label)(lab, addr, label##lb); \
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169}
170
171/* convenience macros for instructions */
172#ifdef CONFIG_64BIT
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173# define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val)
174# define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd)
175# define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off)
e30ec452 176# define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off)
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177# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd)
178# define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd)
179# define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd)
180# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh)
181# define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off)
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182# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh)
183# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh)
184# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh)
f0daaaf5 185# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh)
e30ec452 186# define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd)
71a1c776 187# define UASM_i_SW(buf, rs, rt, off) uasm_i_sd(buf, rs, rt, off)
e30ec452 188#else
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189# define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_addiu(buf, rs, rt, val)
190# define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_addu(buf, rs, rt, rd)
191# define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off)
e30ec452 192# define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off)
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193# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd)
194# define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd)
195# define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd)
196# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh)
197# define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off)
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198# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh)
199# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh)
200# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
f0daaaf5 201# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
e30ec452 202# define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd)
71a1c776 203# define UASM_i_SW(buf, rs, rt, off) uasm_i_sw(buf, rs, rt, off)
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204#endif
205
206#define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off)
207#define uasm_i_beqz(buf, rs, off) uasm_i_beq(buf, rs, 0, off)
208#define uasm_i_beqzl(buf, rs, off) uasm_i_beql(buf, rs, 0, off)
209#define uasm_i_bnez(buf, rs, off) uasm_i_bne(buf, rs, 0, off)
210#define uasm_i_bnezl(buf, rs, off) uasm_i_bnel(buf, rs, 0, off)
71a1c776 211#define uasm_i_ehb(buf) uasm_i_sll(buf, 0, 0, 3)
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212#define uasm_i_move(buf, a, b) UASM_i_ADDU(buf, a, 0, b)
213#define uasm_i_nop(buf) uasm_i_sll(buf, 0, 0, 0)
214#define uasm_i_ssnop(buf) uasm_i_sll(buf, 0, 0, 1)
26b9e547 215
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216static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1,
217 unsigned int a2, unsigned int a3)
218{
219 if (a3 < 32)
abc597fe 220 ISAOPC(_drotr)(p, a1, a2, a3);
de6d5b55 221 else
abc597fe 222 ISAOPC(_drotr32)(p, a1, a2, a3 - 32);
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223}
224
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225static inline void uasm_i_dsll_safe(u32 **p, unsigned int a1,
226 unsigned int a2, unsigned int a3)
227{
228 if (a3 < 32)
abc597fe 229 ISAOPC(_dsll)(p, a1, a2, a3);
26b9e547 230 else
abc597fe 231 ISAOPC(_dsll32)(p, a1, a2, a3 - 32);
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232}
233
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234static inline void uasm_i_dsrl_safe(u32 **p, unsigned int a1,
235 unsigned int a2, unsigned int a3)
236{
237 if (a3 < 32)
abc597fe 238 ISAOPC(_dsrl)(p, a1, a2, a3);
71a1c776 239 else
abc597fe 240 ISAOPC(_dsrl32)(p, a1, a2, a3 - 32);
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241}
242
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243/* Handle relocations. */
244struct uasm_reloc {
245 u32 *addr;
246 unsigned int type;
247 int lab;
248};
249
250/* This is zero so we can use zeroed label arrays. */
251#define UASM_LABEL_INVALID 0
252
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253void uasm_r_mips_pc16(struct uasm_reloc **rel, u32 *addr, int lid);
254void uasm_resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab);
255void uasm_move_relocs(struct uasm_reloc *rel, u32 *first, u32 *end, long off);
256void uasm_move_labels(struct uasm_label *lab, u32 *first, u32 *end, long off);
257void uasm_copy_handler(struct uasm_reloc *rel, struct uasm_label *lab,
258 u32 *first, u32 *end, u32 *target);
259int uasm_insn_has_bdelay(struct uasm_reloc *rel, u32 *addr);
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260
261/* Convenience functions for labeled branches. */
234fcd14 262void uasm_il_b(u32 **p, struct uasm_reloc **r, int lid);
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263void uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg,
264 unsigned int bit, int lid);
265void uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg,
266 unsigned int bit, int lid);
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267void uasm_il_beqz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
268void uasm_il_beqzl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
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269void uasm_il_bgezl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
270void uasm_il_bgez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
271void uasm_il_bltz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
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272void uasm_il_bne(u32 **p, struct uasm_reloc **r, unsigned int reg1,
273 unsigned int reg2, int lid);
234fcd14 274void uasm_il_bnez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
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