[deliverable/linux.git] / arch / mips / kernel / i8253.c

/*
 * i8253.c  8253/PIT functions
 *
 */
#include <linux/clockchips.h>
#include <linux/i8253.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/jiffies.h>
#include <linux/module.h>
#include <linux/smp.h>
#include <linux/spinlock.h>
#include <linux/irq.h>

#include <asm/delay.h>
#include <asm/io.h>
#include <asm/time.h>

/*
 * Initialize the PIT timer.
 *
 * This is also called after resume to bring the PIT into operation again.
 */
static void init_pit_timer(enum clock_event_mode mode,
			   struct clock_event_device *evt)
{
	raw_spin_lock(&i8253_lock);

	switch(mode) {
	case CLOCK_EVT_MODE_PERIODIC:
		/* binary, mode 2, LSB/MSB, ch 0 */
		outb_p(0x34, PIT_MODE);
		outb_p(LATCH & 0xff , PIT_CH0);	/* LSB */
		outb(LATCH >> 8 , PIT_CH0);	/* MSB */
		break;

	case CLOCK_EVT_MODE_SHUTDOWN:
	case CLOCK_EVT_MODE_UNUSED:
		if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
		    evt->mode == CLOCK_EVT_MODE_ONESHOT) {
			outb_p(0x30, PIT_MODE);
			outb_p(0, PIT_CH0);
			outb_p(0, PIT_CH0);
		}
		break;

	case CLOCK_EVT_MODE_ONESHOT:
		/* One shot setup */
		outb_p(0x38, PIT_MODE);
		break;

	case CLOCK_EVT_MODE_RESUME:
		/* Nothing to do here */
		break;
	}
	raw_spin_unlock(&i8253_lock);
}

/*
 * Program the next event in oneshot mode
 *
 * Delta is given in PIT ticks
 */
static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
{
	raw_spin_lock(&i8253_lock);
	outb_p(delta & 0xff , PIT_CH0);	/* LSB */
	outb(delta >> 8 , PIT_CH0);	/* MSB */
	raw_spin_unlock(&i8253_lock);

	return 0;
}

/*
 * On UP the PIT can serve all of the possible timer functions. On SMP systems
 * it can be solely used for the global tick.
 *
 * The profiling and update capabilites are switched off once the local apic is
 * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
 * !using_apic_timer decisions in do_timer_interrupt_hook()
 */
static struct clock_event_device pit_clockevent = {
	.name		= "pit",
	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
	.set_mode	= init_pit_timer,
	.set_next_event = pit_next_event,
	.irq		= 0,
};

static irqreturn_t timer_interrupt(int irq, void *dev_id)
{
	pit_clockevent.event_handler(&pit_clockevent);

	return IRQ_HANDLED;
}

static struct irqaction irq0  = {
	.handler = timer_interrupt,
	.flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER,
	.name = "timer"
};

/*
 * Initialize the conversion factor and the min/max deltas of the clock event
 * structure and register the clock event source with the framework.
 */
void __init setup_pit_timer(void)
{
	struct clock_event_device *cd = &pit_clockevent;
	unsigned int cpu = smp_processor_id();

	/*
	 * Start pit with the boot cpu mask and make it global after the
	 * IO_APIC has been initialized.
	 */
	cd->cpumask = cpumask_of(cpu);
	clockevent_set_clock(cd, CLOCK_TICK_RATE);
	cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd);
	cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
	clockevents_register_device(cd);

	setup_irq(0, &irq0);
}

static int __init init_pit_clocksource(void)
{
	if (num_possible_cpus() > 1) /* PIT does not scale! */
		return 0;

	return clocksource_i8253_init();
}
arch_initcall(init_pit_clocksource);
Commit	Line	Data
d865bea4 RB	1	/*
	2	* i8253.c 8253/PIT functions
	3	*
	4	*/
	5	#include <linux/clockchips.h>
334955ef	6	#include <linux/i8253.h>
d865bea4 RB	7	#include <linux/init.h>
	8	#include <linux/interrupt.h>
	9	#include <linux/jiffies.h>
	10	#include <linux/module.h>
631330f5	11	#include <linux/smp.h>
d865bea4	12	#include <linux/spinlock.h>
ca4d3e67	13	#include <linux/irq.h>
d865bea4 RB	14
d865bea4 RB	15	#include <asm/delay.h>
d865bea4	16	#include <asm/io.h>
dd3db6eb	17	#include <asm/time.h>
d865bea4	18
d865bea4 RB	19	/*
	20	* Initialize the PIT timer.
	21	*
	22	* This is also called after resume to bring the PIT into operation again.
	23	*/
	24	static void init_pit_timer(enum clock_event_mode mode,
	25	struct clock_event_device *evt)
	26	{
ced918eb	27	raw_spin_lock(&i8253_lock);
d865bea4 RB	28
	29	switch(mode) {
	30	case CLOCK_EVT_MODE_PERIODIC:
	31	/* binary, mode 2, LSB/MSB, ch 0 */
	32	outb_p(0x34, PIT_MODE);
	33	outb_p(LATCH & 0xff , PIT_CH0); /* LSB */
	34	outb(LATCH >> 8 , PIT_CH0); /* MSB */
	35	break;
	36
	37	case CLOCK_EVT_MODE_SHUTDOWN:
	38	case CLOCK_EVT_MODE_UNUSED:
	39	if (evt->mode == CLOCK_EVT_MODE_PERIODIC \|\|
	40	evt->mode == CLOCK_EVT_MODE_ONESHOT) {
	41	outb_p(0x30, PIT_MODE);
	42	outb_p(0, PIT_CH0);
	43	outb_p(0, PIT_CH0);
	44	}
	45	break;
	46
	47	case CLOCK_EVT_MODE_ONESHOT:
	48	/* One shot setup */
	49	outb_p(0x38, PIT_MODE);
	50	break;
	51
	52	case CLOCK_EVT_MODE_RESUME:
	53	/* Nothing to do here */
	54	break;
	55	}
ced918eb	56	raw_spin_unlock(&i8253_lock);
d865bea4 RB	57	}
	58
	59	/*
	60	* Program the next event in oneshot mode
	61	*
	62	* Delta is given in PIT ticks
	63	*/
	64	static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
	65	{
ced918eb	66	raw_spin_lock(&i8253_lock);
d865bea4 RB	67	outb_p(delta & 0xff , PIT_CH0); /* LSB */
d865bea4 RB	68	outb(delta >> 8 , PIT_CH0); /* MSB */
ced918eb	69	raw_spin_unlock(&i8253_lock);
d865bea4 RB	70
	71	return 0;
	72	}
	73
	74	/*
	75	* On UP the PIT can serve all of the possible timer functions. On SMP systems
	76	* it can be solely used for the global tick.
	77	*
	78	* The profiling and update capabilites are switched off once the local apic is
	79	* registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
	80	* !using_apic_timer decisions in do_timer_interrupt_hook()
	81	*/
1ea6428c	82	static struct clock_event_device pit_clockevent = {
d865bea4 RB	83	.name = "pit",
	84	.features = CLOCK_EVT_FEAT_PERIODIC \| CLOCK_EVT_FEAT_ONESHOT,
	85	.set_mode = init_pit_timer,
	86	.set_next_event = pit_next_event,
d865bea4 RB	87	.irq = 0,
	88	};
	89
dd3db6eb	90	static irqreturn_t timer_interrupt(int irq, void *dev_id)
d865bea4 RB	91	{
	92	pit_clockevent.event_handler(&pit_clockevent);
	93
	94	return IRQ_HANDLED;
	95	}
	96
	97	static struct irqaction irq0 = {
	98	.handler = timer_interrupt,
f45e5183	99	.flags = IRQF_DISABLED \| IRQF_NOBALANCING \| IRQF_TIMER,
d865bea4 RB	100	.name = "timer"
	101	};
	102
	103	/*
	104	* Initialize the conversion factor and the min/max deltas of the clock event
	105	* structure and register the clock event source with the framework.
	106	*/
	107	void __init setup_pit_timer(void)
	108	{
dd3db6eb RB	109	struct clock_event_device *cd = &pit_clockevent;
	110	unsigned int cpu = smp_processor_id();
	111
d865bea4 RB	112	/*
	113	* Start pit with the boot cpu mask and make it global after the
	114	* IO_APIC has been initialized.
	115	*/
320ab2b0	116	cd->cpumask = cpumask_of(cpu);
dd3db6eb RB	117	clockevent_set_clock(cd, CLOCK_TICK_RATE);
	118	cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd);
	119	cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
	120	clockevents_register_device(cd);
	121
d865bea4 RB	122	setup_irq(0, &irq0);
	123	}
	124
d865bea4 RB	125	static int __init init_pit_clocksource(void)
	126	{
	127	if (num_possible_cpus() > 1) /* PIT does not scale! */
	128	return 0;
	129
798778b8	130	return clocksource_i8253_init();
d865bea4 RB	131	}
d865bea4 RB	132	arch_initcall(init_pit_clocksource);