projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * linux/arch/mips/kernel/proc.c | |
| 3 | * | |
| 4 | * Copyright (C) 1995, 1996, 2001 Ralf Baechle | |
| 4194318c RB |
5 | * Copyright (C) 2001, 2004 MIPS Technologies, Inc. |
| 6 | * Copyright (C) 2004 Maciej W. Rozycki | |
| 1da177e4 | 7 | */ |
| 1da177e4 LT |
8 | #include <linux/delay.h> |
| 9 | #include <linux/kernel.h> | |
| 10 | #include <linux/sched.h> | |
| 11 | #include <linux/seq_file.h> | |
| 12 | #include <asm/bootinfo.h> | |
| 13 | #include <asm/cpu.h> | |
| 14 | #include <asm/cpu-features.h> | |
| 15 | #include <asm/mipsregs.h> | |
| 16 | #include <asm/processor.h> | |
| 1da177e4 LT |
17 | |
| 18 | unsigned int vced_count, vcei_count; | |
| 19 | ||
| 1da177e4 LT |
20 | static int show_cpuinfo(struct seq_file *m, void *v) |
| 21 | { | |
| 1da177e4 | 22 | unsigned long n = (unsigned long) v - 1; |
| 31aa3665 KJK |
23 | unsigned int version = cpu_data[n].processor_id; |
| 24 | unsigned int fp_vers = cpu_data[n].fpu_id; | |
| 1da177e4 LT |
25 | char fmt [64]; |
| 26 | ||
| 27 | #ifdef CONFIG_SMP | |
| 28 | if (!cpu_isset(n, cpu_online_map)) | |
| 29 | return 0; | |
| 30 | #endif | |
| 31 | ||
| 32 | /* | |
| 33 | * For the first processor also print the system type | |
| 34 | */ | |
| 35 | if (n == 0) | |
| 36 | seq_printf(m, "system type\t\t: %s\n", get_system_type()); | |
| 37 | ||
| 38 | seq_printf(m, "processor\t\t: %ld\n", n); | |
| 39 | sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", | |
| e04582b7 | 40 | cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : ""); |
| 9966db25 | 41 | seq_printf(m, fmt, __cpu_name[smp_processor_id()], |
| 1da177e4 LT |
42 | (version >> 4) & 0x0f, version & 0x0f, |
| 43 | (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); | |
| 44 | seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n", | |
| 0ac35480 RB |
45 | cpu_data[n].udelay_val / (500000/HZ), |
| 46 | (cpu_data[n].udelay_val / (5000/HZ)) % 100); | |
| 1da177e4 LT |
47 | seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); |
| 48 | seq_printf(m, "microsecond timers\t: %s\n", | |
| 49 | cpu_has_counter ? "yes" : "no"); | |
| 31aa3665 | 50 | seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize); |
| 1da177e4 LT |
51 | seq_printf(m, "extra interrupt vector\t: %s\n", |
| 52 | cpu_has_divec ? "yes" : "no"); | |
| 53 | seq_printf(m, "hardware watchpoint\t: %s\n", | |
| 54 | cpu_has_watch ? "yes" : "no"); | |
| e027802e | 55 | seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n", |
| 4194318c RB |
56 | cpu_has_mips16 ? " mips16" : "", |
| 57 | cpu_has_mdmx ? " mdmx" : "", | |
| 58 | cpu_has_mips3d ? " mips3d" : "", | |
| e027802e RB |
59 | cpu_has_smartmips ? " smartmips" : "", |
| 60 | cpu_has_dsp ? " dsp" : "", | |
| 61 | cpu_has_mipsmt ? " mt" : "" | |
| 62 | ); | |
| 1da177e4 LT |
63 | |
| 64 | sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", | |
| 65 | cpu_has_vce ? "%u" : "not available"); | |
| 66 | seq_printf(m, fmt, 'D', vced_count); | |
| 67 | seq_printf(m, fmt, 'I', vcei_count); | |
| 17256052 | 68 | seq_printf(m, "\n"); |
| 1da177e4 LT |
69 | |
| 70 | return 0; | |
| 71 | } | |
| 72 | ||
| 73 | static void *c_start(struct seq_file *m, loff_t *pos) | |
| 74 | { | |
| 75 | unsigned long i = *pos; | |
| 76 | ||
| 77 | return i < NR_CPUS ? (void *) (i + 1) : NULL; | |
| 78 | } | |
| 79 | ||
| 80 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
| 81 | { | |
| 82 | ++*pos; | |
| 83 | return c_start(m, pos); | |
| 84 | } | |
| 85 | ||
| 86 | static void c_stop(struct seq_file *m, void *v) | |
| 87 | { | |
| 88 | } | |
| 89 | ||
| 90 | struct seq_operations cpuinfo_op = { | |
| 91 | .start = c_start, | |
| 92 | .next = c_next, | |
| 93 | .stop = c_stop, | |
| 94 | .show = show_cpuinfo, | |
| 95 | }; |