MIPS: microMIPS: Add unaligned access support.
[deliverable/linux.git] / arch / mips / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
40ac5d47 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
1da177e4
LT
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004 Thiemo Seufer
34c2f668 10 * Copyright (C) 2013 Imagination Technologies Ltd.
1da177e4 11 */
1da177e4 12#include <linux/errno.h>
1da177e4 13#include <linux/sched.h>
7bcf7717 14#include <linux/tick.h>
1da177e4
LT
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
cae39d13 19#include <linux/export.h>
1da177e4 20#include <linux/ptrace.h>
1da177e4
LT
21#include <linux/mman.h>
22#include <linux/personality.h>
23#include <linux/sys.h>
24#include <linux/user.h>
1da177e4
LT
25#include <linux/init.h>
26#include <linux/completion.h>
63077519 27#include <linux/kallsyms.h>
94109102 28#include <linux/random.h>
1da177e4 29
94109102 30#include <asm/asm.h>
1da177e4
LT
31#include <asm/bootinfo.h>
32#include <asm/cpu.h>
e50c0a8f 33#include <asm/dsp.h>
1da177e4
LT
34#include <asm/fpu.h>
35#include <asm/pgtable.h>
1da177e4
LT
36#include <asm/mipsregs.h>
37#include <asm/processor.h>
38#include <asm/uaccess.h>
39#include <asm/io.h>
40#include <asm/elf.h>
41#include <asm/isadep.h>
42#include <asm/inst.h>
1df0f0ff 43#include <asm/stacktrace.h>
1da177e4 44
1da177e4
LT
45/*
46 * The idle thread. There's no useful work to be done, so just try to conserve
47 * power and have a low exit latency (ie sit in a loop waiting for somebody to
48 * say that they'd like to reschedule)
49 */
b3f6df9f 50void __noreturn cpu_idle(void)
1da177e4 51{
1b2bc75c
RB
52 int cpu;
53
54 /* CPU is going idle. */
55 cpu = smp_processor_id();
56
1da177e4
LT
57 /* endless idle loop with no priority at all */
58 while (1) {
1268fbc7
FW
59 tick_nohz_idle_enter();
60 rcu_idle_enter();
1b2bc75c 61 while (!need_resched() && cpu_online(cpu)) {
9cc12363 62#ifdef CONFIG_MIPS_MT_SMTC
447deafb
RB
63 extern void smtc_idle_loop_hook(void);
64
41c594ab 65 smtc_idle_loop_hook();
c68644d3 66#endif
7a7ac952
WZ
67
68 if (cpu_wait) {
69 /* Don't trace irqs off for idle */
70 stop_critical_timings();
1da177e4 71 (*cpu_wait)();
7a7ac952
WZ
72 start_critical_timings();
73 }
41c594ab 74 }
1b2bc75c 75#ifdef CONFIG_HOTPLUG_CPU
8add1ecb 76 if (!cpu_online(cpu) && !cpu_isset(cpu, cpu_callin_map))
1b2bc75c
RB
77 play_dead();
78#endif
1268fbc7
FW
79 rcu_idle_exit();
80 tick_nohz_idle_exit();
bd2f5536 81 schedule_preempt_disabled();
1da177e4
LT
82 }
83}
84
85asmlinkage void ret_from_fork(void);
8f54bcac 86asmlinkage void ret_from_kernel_thread(void);
1da177e4
LT
87
88void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
89{
90 unsigned long status;
91
92 /* New thread loses kernel privileges. */
bbaf238b 93 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
875d43e7 94#ifdef CONFIG_64BIT
293c5bd1 95 status |= test_thread_flag(TIF_32BIT_REGS) ? 0 : ST0_FR;
1da177e4
LT
96#endif
97 status |= KU_USER;
98 regs->cp0_status = status;
99 clear_used_math();
e04582b7 100 clear_fpu_owner();
e50c0a8f
RB
101 if (cpu_has_dsp)
102 __init_dsp();
1da177e4
LT
103 regs->cp0_epc = pc;
104 regs->regs[29] = sp;
1da177e4
LT
105}
106
107void exit_thread(void)
108{
109}
110
111void flush_thread(void)
112{
113}
114
6f2c55b8 115int copy_thread(unsigned long clone_flags, unsigned long usp,
afa86fc4 116 unsigned long arg, struct task_struct *p)
1da177e4 117{
75bb07e7 118 struct thread_info *ti = task_thread_info(p);
afa86fc4 119 struct pt_regs *childregs, *regs = current_pt_regs();
484889fc 120 unsigned long childksp;
3c37026d 121 p->set_child_tid = p->clear_child_tid = NULL;
1da177e4 122
75bb07e7 123 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
1da177e4
LT
124
125 preempt_disable();
126
e50c0a8f 127 if (is_fpu_owner())
1da177e4 128 save_fp(p);
e50c0a8f
RB
129
130 if (cpu_has_dsp)
131 save_dsp(p);
1da177e4
LT
132
133 preempt_enable();
134
135 /* set up new TSS. */
136 childregs = (struct pt_regs *) childksp - 1;
484889fc
DD
137 /* Put the stack after the struct pt_regs. */
138 childksp = (unsigned long) childregs;
8f54bcac
AV
139 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
140 if (unlikely(p->flags & PF_KTHREAD)) {
141 unsigned long status = p->thread.cp0_status;
142 memset(childregs, 0, sizeof(struct pt_regs));
143 ti->addr_limit = KERNEL_DS;
144 p->thread.reg16 = usp; /* fn */
145 p->thread.reg17 = arg;
146 p->thread.reg29 = childksp;
147 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
148#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
149 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
150 ((status & (ST0_KUC | ST0_IEC)) << 2);
151#else
152 status |= ST0_EXL;
153#endif
154 childregs->cp0_status = status;
155 return 0;
156 }
1da177e4 157 *childregs = *regs;
70342287
RB
158 childregs->regs[7] = 0; /* Clear error flag */
159 childregs->regs[2] = 0; /* Child gets zero as return value */
64b3122d
AV
160 if (usp)
161 childregs->regs[29] = usp;
8f54bcac 162 ti->addr_limit = USER_DS;
1da177e4 163
1da177e4
LT
164 p->thread.reg29 = (unsigned long) childregs;
165 p->thread.reg31 = (unsigned long) ret_from_fork;
166
167 /*
168 * New tasks lose permission to use the fpu. This accelerates context
169 * switching for most programs since they don't use the fpu.
170 */
1da177e4 171 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
1da177e4 172
9cc12363 173#ifdef CONFIG_MIPS_MT_SMTC
f088fc84 174 /*
9cc12363
KK
175 * SMTC restores TCStatus after Status, and the CU bits
176 * are aliased there.
f088fc84 177 */
9cc12363
KK
178 childregs->cp0_tcstatus &= ~(ST0_CU2|ST0_CU1);
179#endif
1da177e4
LT
180 clear_tsk_thread_flag(p, TIF_USEDFPU);
181
f088fc84 182#ifdef CONFIG_MIPS_MT_FPAFF
6657fe0a 183 clear_tsk_thread_flag(p, TIF_FPUBOUND);
f088fc84
RB
184#endif /* CONFIG_MIPS_MT_FPAFF */
185
3c37026d
RB
186 if (clone_flags & CLONE_SETTLS)
187 ti->tp_value = regs->regs[7];
188
1da177e4
LT
189 return 0;
190}
191
192/* Fill in the fpu structure for a core dump.. */
193int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
194{
195 memcpy(r, &current->thread.fpu, sizeof(current->thread.fpu));
196
197 return 1;
198}
199
d56efda4 200void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs)
1da177e4
LT
201{
202 int i;
203
204 for (i = 0; i < EF_R0; i++)
205 gp[i] = 0;
206 gp[EF_R0] = 0;
207 for (i = 1; i <= 31; i++)
208 gp[EF_R0 + i] = regs->regs[i];
209 gp[EF_R26] = 0;
210 gp[EF_R27] = 0;
211 gp[EF_LO] = regs->lo;
212 gp[EF_HI] = regs->hi;
213 gp[EF_CP0_EPC] = regs->cp0_epc;
214 gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
215 gp[EF_CP0_STATUS] = regs->cp0_status;
216 gp[EF_CP0_CAUSE] = regs->cp0_cause;
217#ifdef EF_UNUSED0
218 gp[EF_UNUSED0] = 0;
219#endif
220}
221
49a89efb 222int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
71e0e556 223{
40bc9c67 224 elf_dump_regs(*regs, task_pt_regs(tsk));
71e0e556
RB
225 return 1;
226}
227
49a89efb 228int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)
1da177e4
LT
229{
230 memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu));
231
232 return 1;
233}
234
b5943182
FBH
235/*
236 *
237 */
238struct mips_frame_info {
239 void *func;
240 unsigned long func_size;
241 int frame_size;
242 int pc_offset;
243};
dc953df1 244
c0efbb6d
FBH
245static inline int is_ra_save_ins(union mips_instruction *ip)
246{
34c2f668
LY
247#ifdef CONFIG_CPU_MICROMIPS
248 union mips_instruction mmi;
249
250 /*
251 * swsp ra,offset
252 * swm16 reglist,offset(sp)
253 * swm32 reglist,offset(sp)
254 * sw32 ra,offset(sp)
255 * jradiussp - NOT SUPPORTED
256 *
257 * microMIPS is way more fun...
258 */
259 if (mm_insn_16bit(ip->halfword[0])) {
260 mmi.word = (ip->halfword[0] << 16);
261 return ((mmi.mm16_r5_format.opcode == mm_swsp16_op &&
262 mmi.mm16_r5_format.rt == 31) ||
263 (mmi.mm16_m_format.opcode == mm_pool16c_op &&
264 mmi.mm16_m_format.func == mm_swm16_op));
265 }
266 else {
267 mmi.halfword[0] = ip->halfword[1];
268 mmi.halfword[1] = ip->halfword[0];
269 return ((mmi.mm_m_format.opcode == mm_pool32b_op &&
270 mmi.mm_m_format.rd > 9 &&
271 mmi.mm_m_format.base == 29 &&
272 mmi.mm_m_format.func == mm_swm32_func) ||
273 (mmi.i_format.opcode == mm_sw32_op &&
274 mmi.i_format.rs == 29 &&
275 mmi.i_format.rt == 31));
276 }
277#else
c0efbb6d
FBH
278 /* sw / sd $ra, offset($sp) */
279 return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
280 ip->i_format.rs == 29 &&
281 ip->i_format.rt == 31;
34c2f668 282#endif
c0efbb6d
FBH
283}
284
285static inline int is_jal_jalr_jr_ins(union mips_instruction *ip)
286{
34c2f668
LY
287#ifdef CONFIG_CPU_MICROMIPS
288 /*
289 * jr16,jrc,jalr16,jalr16
290 * jal
291 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
292 * jraddiusp - NOT SUPPORTED
293 *
294 * microMIPS is kind of more fun...
295 */
296 union mips_instruction mmi;
297
298 mmi.word = (ip->halfword[0] << 16);
299
300 if ((mmi.mm16_r5_format.opcode == mm_pool16c_op &&
301 (mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) ||
302 ip->j_format.opcode == mm_jal32_op)
303 return 1;
304 if (ip->r_format.opcode != mm_pool32a_op ||
305 ip->r_format.func != mm_pool32axf_op)
306 return 0;
307 return (((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op);
308#else
c0efbb6d
FBH
309 if (ip->j_format.opcode == jal_op)
310 return 1;
311 if (ip->r_format.opcode != spec_op)
312 return 0;
313 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
34c2f668 314#endif
c0efbb6d
FBH
315}
316
317static inline int is_sp_move_ins(union mips_instruction *ip)
318{
34c2f668
LY
319#ifdef CONFIG_CPU_MICROMIPS
320 /*
321 * addiusp -imm
322 * addius5 sp,-imm
323 * addiu32 sp,sp,-imm
324 * jradiussp - NOT SUPPORTED
325 *
326 * microMIPS is not more fun...
327 */
328 if (mm_insn_16bit(ip->halfword[0])) {
329 union mips_instruction mmi;
330
331 mmi.word = (ip->halfword[0] << 16);
332 return ((mmi.mm16_r3_format.opcode == mm_pool16d_op &&
333 mmi.mm16_r3_format.simmediate && mm_addiusp_func) ||
334 (mmi.mm16_r5_format.opcode == mm_pool16d_op &&
335 mmi.mm16_r5_format.rt == 29));
336 }
337 return (ip->mm_i_format.opcode == mm_addiu32_op &&
338 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29);
339#else
c0efbb6d
FBH
340 /* addiu/daddiu sp,sp,-imm */
341 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
342 return 0;
343 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
344 return 1;
34c2f668 345#endif
c0efbb6d
FBH
346 return 0;
347}
348
f66686f7 349static int get_frame_info(struct mips_frame_info *info)
1da177e4 350{
34c2f668
LY
351#ifdef CONFIG_CPU_MICROMIPS
352 union mips_instruction *ip = (void *) (((char *) info->func) - 1);
353#else
c0efbb6d 354 union mips_instruction *ip = info->func;
34c2f668 355#endif
29b376ff
FBH
356 unsigned max_insns = info->func_size / sizeof(union mips_instruction);
357 unsigned i;
c0efbb6d 358
1da177e4 359 info->pc_offset = -1;
63077519 360 info->frame_size = 0;
1da177e4 361
29b376ff
FBH
362 if (!ip)
363 goto err;
364
365 if (max_insns == 0)
366 max_insns = 128U; /* unknown function size */
367 max_insns = min(128U, max_insns);
368
c0efbb6d
FBH
369 for (i = 0; i < max_insns; i++, ip++) {
370
371 if (is_jal_jalr_jr_ins(ip))
63077519 372 break;
0cceb4aa
FBH
373 if (!info->frame_size) {
374 if (is_sp_move_ins(ip))
34c2f668
LY
375 {
376#ifdef CONFIG_CPU_MICROMIPS
377 if (mm_insn_16bit(ip->halfword[0]))
378 {
379 unsigned short tmp;
380
381 if (ip->halfword[0] & mm_addiusp_func)
382 {
383 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
384 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
385 } else {
386 tmp = (ip->halfword[0] >> 1);
387 info->frame_size = -(signed short)(tmp & 0xf);
388 }
389 ip = (void *) &ip->halfword[1];
390 ip--;
391 } else
392#endif
0cceb4aa 393 info->frame_size = - ip->i_format.simmediate;
34c2f668 394 }
0cceb4aa 395 continue;
63077519 396 }
0cceb4aa 397 if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
63077519
AN
398 info->pc_offset =
399 ip->i_format.simmediate / sizeof(long);
0cceb4aa 400 break;
1da177e4
LT
401 }
402 }
f66686f7
AN
403 if (info->frame_size && info->pc_offset >= 0) /* nested */
404 return 0;
405 if (info->pc_offset < 0) /* leaf */
406 return 1;
407 /* prologue seems boggus... */
29b376ff 408err:
f66686f7 409 return -1;
1da177e4
LT
410}
411
b5943182
FBH
412static struct mips_frame_info schedule_mfi __read_mostly;
413
1da177e4
LT
414static int __init frame_info_init(void)
415{
b5943182 416 unsigned long size = 0;
63077519 417#ifdef CONFIG_KALLSYMS
b5943182 418 unsigned long ofs;
b5943182 419
55b74283 420 kallsyms_lookup_size_offset((unsigned long)schedule, &size, &ofs);
63077519 421#endif
b5943182
FBH
422 schedule_mfi.func = schedule;
423 schedule_mfi.func_size = size;
424
425 get_frame_info(&schedule_mfi);
6057a798
FBH
426
427 /*
428 * Without schedule() frame info, result given by
429 * thread_saved_pc() and get_wchan() are not reliable.
430 */
b5943182 431 if (schedule_mfi.pc_offset < 0)
6057a798 432 printk("Can't analyze schedule() prologue at %p\n", schedule);
63077519 433
1da177e4
LT
434 return 0;
435}
436
437arch_initcall(frame_info_init);
438
439/*
440 * Return saved PC of a blocked thread.
441 */
442unsigned long thread_saved_pc(struct task_struct *tsk)
443{
444 struct thread_struct *t = &tsk->thread;
445
446 /* New born processes are a special case */
447 if (t->reg31 == (unsigned long) ret_from_fork)
448 return t->reg31;
b5943182 449 if (schedule_mfi.pc_offset < 0)
1da177e4 450 return 0;
b5943182 451 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
1da177e4
LT
452}
453
1da177e4 454
f66686f7 455#ifdef CONFIG_KALLSYMS
94ea09c6
DK
456/* generic stack unwinding function */
457unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
458 unsigned long *sp,
459 unsigned long pc,
460 unsigned long *ra)
f66686f7 461{
f66686f7 462 struct mips_frame_info info;
f66686f7 463 unsigned long size, ofs;
4d157d5e 464 int leaf;
1924600c
AN
465 extern void ret_from_irq(void);
466 extern void ret_from_exception(void);
f66686f7 467
f66686f7
AN
468 if (!stack_page)
469 return 0;
470
1924600c
AN
471 /*
472 * If we reached the bottom of interrupt context,
473 * return saved pc in pt_regs.
474 */
475 if (pc == (unsigned long)ret_from_irq ||
476 pc == (unsigned long)ret_from_exception) {
477 struct pt_regs *regs;
478 if (*sp >= stack_page &&
479 *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
480 regs = (struct pt_regs *)*sp;
481 pc = regs->cp0_epc;
482 if (__kernel_text_address(pc)) {
483 *sp = regs->regs[29];
484 *ra = regs->regs[31];
485 return pc;
486 }
487 }
488 return 0;
489 }
55b74283 490 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
f66686f7 491 return 0;
1fd69098 492 /*
25985edc 493 * Return ra if an exception occurred at the first instruction
1fd69098 494 */
1924600c
AN
495 if (unlikely(ofs == 0)) {
496 pc = *ra;
497 *ra = 0;
498 return pc;
499 }
f66686f7
AN
500
501 info.func = (void *)(pc - ofs);
502 info.func_size = ofs; /* analyze from start to ofs */
4d157d5e
FBH
503 leaf = get_frame_info(&info);
504 if (leaf < 0)
f66686f7 505 return 0;
4d157d5e
FBH
506
507 if (*sp < stack_page ||
508 *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
f66686f7
AN
509 return 0;
510
4d157d5e
FBH
511 if (leaf)
512 /*
513 * For some extreme cases, get_frame_info() can
514 * consider wrongly a nested function as a leaf
515 * one. In that cases avoid to return always the
516 * same value.
517 */
1924600c 518 pc = pc != *ra ? *ra : 0;
4d157d5e
FBH
519 else
520 pc = ((unsigned long *)(*sp))[info.pc_offset];
521
522 *sp += info.frame_size;
1924600c 523 *ra = 0;
4d157d5e 524 return __kernel_text_address(pc) ? pc : 0;
f66686f7 525}
94ea09c6
DK
526EXPORT_SYMBOL(unwind_stack_by_address);
527
528/* used by show_backtrace() */
529unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
530 unsigned long pc, unsigned long *ra)
531{
532 unsigned long stack_page = (unsigned long)task_stack_page(task);
533 return unwind_stack_by_address(stack_page, sp, pc, ra);
534}
f66686f7 535#endif
b5943182
FBH
536
537/*
538 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
539 */
540unsigned long get_wchan(struct task_struct *task)
541{
542 unsigned long pc = 0;
543#ifdef CONFIG_KALLSYMS
544 unsigned long sp;
1924600c 545 unsigned long ra = 0;
b5943182
FBH
546#endif
547
548 if (!task || task == current || task->state == TASK_RUNNING)
549 goto out;
550 if (!task_stack_page(task))
551 goto out;
552
553 pc = thread_saved_pc(task);
554
555#ifdef CONFIG_KALLSYMS
556 sp = task->thread.reg29 + schedule_mfi.frame_size;
557
558 while (in_sched_functions(pc))
1924600c 559 pc = unwind_stack(task, &sp, pc, &ra);
b5943182
FBH
560#endif
561
562out:
563 return pc;
564}
94109102
FBH
565
566/*
567 * Don't forget that the stack pointer must be aligned on a 8 bytes
568 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
569 */
570unsigned long arch_align_stack(unsigned long sp)
571{
572 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
573 sp -= get_random_int() & ~PAGE_MASK;
574
575 return sp & ALMASK;
576}
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