MIPS: Fix C0_Pagegrain[IEC] support.
[deliverable/linux.git] / arch / mips / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
40ac5d47 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
1da177e4
LT
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004 Thiemo Seufer
34c2f668 10 * Copyright (C) 2013 Imagination Technologies Ltd.
1da177e4 11 */
1da177e4 12#include <linux/errno.h>
1da177e4 13#include <linux/sched.h>
7bcf7717 14#include <linux/tick.h>
1da177e4
LT
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
cae39d13 19#include <linux/export.h>
1da177e4 20#include <linux/ptrace.h>
1da177e4
LT
21#include <linux/mman.h>
22#include <linux/personality.h>
23#include <linux/sys.h>
1da177e4
LT
24#include <linux/init.h>
25#include <linux/completion.h>
63077519 26#include <linux/kallsyms.h>
94109102 27#include <linux/random.h>
1da177e4 28
94109102 29#include <asm/asm.h>
1da177e4
LT
30#include <asm/bootinfo.h>
31#include <asm/cpu.h>
e50c0a8f 32#include <asm/dsp.h>
1da177e4 33#include <asm/fpu.h>
1db1af84 34#include <asm/msa.h>
1da177e4 35#include <asm/pgtable.h>
1da177e4
LT
36#include <asm/mipsregs.h>
37#include <asm/processor.h>
60be939c 38#include <asm/reg.h>
1da177e4
LT
39#include <asm/uaccess.h>
40#include <asm/io.h>
41#include <asm/elf.h>
42#include <asm/isadep.h>
43#include <asm/inst.h>
1df0f0ff 44#include <asm/stacktrace.h>
856839b7 45#include <asm/irq_regs.h>
1da177e4 46
cdbedc61
TG
47#ifdef CONFIG_HOTPLUG_CPU
48void arch_cpu_idle_dead(void)
1da177e4 49{
cdbedc61
TG
50 /* What the heck is this check doing ? */
51 if (!cpu_isset(smp_processor_id(), cpu_callin_map))
52 play_dead();
53}
54#endif
1b2bc75c 55
1da177e4 56asmlinkage void ret_from_fork(void);
8f54bcac 57asmlinkage void ret_from_kernel_thread(void);
1da177e4
LT
58
59void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
60{
61 unsigned long status;
62
63 /* New thread loses kernel privileges. */
bbaf238b 64 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
1da177e4
LT
65 status |= KU_USER;
66 regs->cp0_status = status;
67 clear_used_math();
e04582b7 68 clear_fpu_owner();
a3056b1c 69 init_dsp();
7daef8f2 70 clear_thread_flag(TIF_USEDMSA);
1db1af84
PB
71 clear_thread_flag(TIF_MSA_CTX_LIVE);
72 disable_msa();
1da177e4
LT
73 regs->cp0_epc = pc;
74 regs->regs[29] = sp;
1da177e4
LT
75}
76
77void exit_thread(void)
78{
79}
80
81void flush_thread(void)
82{
83}
84
6f2c55b8 85int copy_thread(unsigned long clone_flags, unsigned long usp,
afa86fc4 86 unsigned long arg, struct task_struct *p)
1da177e4 87{
75bb07e7 88 struct thread_info *ti = task_thread_info(p);
afa86fc4 89 struct pt_regs *childregs, *regs = current_pt_regs();
484889fc 90 unsigned long childksp;
3c37026d 91 p->set_child_tid = p->clear_child_tid = NULL;
1da177e4 92
75bb07e7 93 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
1da177e4
LT
94
95 preempt_disable();
96
1db1af84
PB
97 if (is_msa_enabled())
98 save_msa(p);
99 else if (is_fpu_owner())
1da177e4 100 save_fp(p);
e50c0a8f
RB
101
102 if (cpu_has_dsp)
103 save_dsp(p);
1da177e4
LT
104
105 preempt_enable();
106
107 /* set up new TSS. */
108 childregs = (struct pt_regs *) childksp - 1;
484889fc
DD
109 /* Put the stack after the struct pt_regs. */
110 childksp = (unsigned long) childregs;
8f54bcac
AV
111 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
112 if (unlikely(p->flags & PF_KTHREAD)) {
113 unsigned long status = p->thread.cp0_status;
114 memset(childregs, 0, sizeof(struct pt_regs));
115 ti->addr_limit = KERNEL_DS;
116 p->thread.reg16 = usp; /* fn */
117 p->thread.reg17 = arg;
118 p->thread.reg29 = childksp;
119 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
120#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
121 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
122 ((status & (ST0_KUC | ST0_IEC)) << 2);
123#else
124 status |= ST0_EXL;
125#endif
126 childregs->cp0_status = status;
127 return 0;
128 }
1da177e4 129 *childregs = *regs;
70342287
RB
130 childregs->regs[7] = 0; /* Clear error flag */
131 childregs->regs[2] = 0; /* Child gets zero as return value */
64b3122d
AV
132 if (usp)
133 childregs->regs[29] = usp;
8f54bcac 134 ti->addr_limit = USER_DS;
1da177e4 135
1da177e4
LT
136 p->thread.reg29 = (unsigned long) childregs;
137 p->thread.reg31 = (unsigned long) ret_from_fork;
138
139 /*
140 * New tasks lose permission to use the fpu. This accelerates context
141 * switching for most programs since they don't use the fpu.
142 */
1da177e4 143 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
1da177e4 144
1da177e4 145 clear_tsk_thread_flag(p, TIF_USEDFPU);
7daef8f2
PB
146 clear_tsk_thread_flag(p, TIF_USEDMSA);
147 clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
1da177e4 148
f088fc84 149#ifdef CONFIG_MIPS_MT_FPAFF
6657fe0a 150 clear_tsk_thread_flag(p, TIF_FPUBOUND);
f088fc84
RB
151#endif /* CONFIG_MIPS_MT_FPAFF */
152
3c37026d
RB
153 if (clone_flags & CLONE_SETTLS)
154 ti->tp_value = regs->regs[7];
155
1da177e4
LT
156 return 0;
157}
158
36ecafc5
GF
159#ifdef CONFIG_CC_STACKPROTECTOR
160#include <linux/stackprotector.h>
161unsigned long __stack_chk_guard __read_mostly;
162EXPORT_SYMBOL(__stack_chk_guard);
163#endif
164
b5943182
FBH
165struct mips_frame_info {
166 void *func;
167 unsigned long func_size;
168 int frame_size;
169 int pc_offset;
170};
dc953df1 171
5000653e
TW
172#define J_TARGET(pc,target) \
173 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
174
c0efbb6d
FBH
175static inline int is_ra_save_ins(union mips_instruction *ip)
176{
34c2f668
LY
177#ifdef CONFIG_CPU_MICROMIPS
178 union mips_instruction mmi;
179
180 /*
181 * swsp ra,offset
182 * swm16 reglist,offset(sp)
183 * swm32 reglist,offset(sp)
184 * sw32 ra,offset(sp)
185 * jradiussp - NOT SUPPORTED
186 *
187 * microMIPS is way more fun...
188 */
189 if (mm_insn_16bit(ip->halfword[0])) {
190 mmi.word = (ip->halfword[0] << 16);
635c9907
RB
191 return (mmi.mm16_r5_format.opcode == mm_swsp16_op &&
192 mmi.mm16_r5_format.rt == 31) ||
193 (mmi.mm16_m_format.opcode == mm_pool16c_op &&
194 mmi.mm16_m_format.func == mm_swm16_op);
34c2f668
LY
195 }
196 else {
197 mmi.halfword[0] = ip->halfword[1];
198 mmi.halfword[1] = ip->halfword[0];
635c9907
RB
199 return (mmi.mm_m_format.opcode == mm_pool32b_op &&
200 mmi.mm_m_format.rd > 9 &&
201 mmi.mm_m_format.base == 29 &&
202 mmi.mm_m_format.func == mm_swm32_func) ||
203 (mmi.i_format.opcode == mm_sw32_op &&
204 mmi.i_format.rs == 29 &&
205 mmi.i_format.rt == 31);
34c2f668
LY
206 }
207#else
c0efbb6d
FBH
208 /* sw / sd $ra, offset($sp) */
209 return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
210 ip->i_format.rs == 29 &&
211 ip->i_format.rt == 31;
34c2f668 212#endif
c0efbb6d
FBH
213}
214
e7438c4b 215static inline int is_jump_ins(union mips_instruction *ip)
c0efbb6d 216{
34c2f668
LY
217#ifdef CONFIG_CPU_MICROMIPS
218 /*
219 * jr16,jrc,jalr16,jalr16
220 * jal
221 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
222 * jraddiusp - NOT SUPPORTED
223 *
224 * microMIPS is kind of more fun...
225 */
226 union mips_instruction mmi;
227
228 mmi.word = (ip->halfword[0] << 16);
229
230 if ((mmi.mm16_r5_format.opcode == mm_pool16c_op &&
231 (mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) ||
232 ip->j_format.opcode == mm_jal32_op)
233 return 1;
234 if (ip->r_format.opcode != mm_pool32a_op ||
235 ip->r_format.func != mm_pool32axf_op)
236 return 0;
635c9907 237 return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
34c2f668 238#else
e7438c4b
TW
239 if (ip->j_format.opcode == j_op)
240 return 1;
c0efbb6d
FBH
241 if (ip->j_format.opcode == jal_op)
242 return 1;
243 if (ip->r_format.opcode != spec_op)
244 return 0;
245 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
34c2f668 246#endif
c0efbb6d
FBH
247}
248
249static inline int is_sp_move_ins(union mips_instruction *ip)
250{
34c2f668
LY
251#ifdef CONFIG_CPU_MICROMIPS
252 /*
253 * addiusp -imm
254 * addius5 sp,-imm
255 * addiu32 sp,sp,-imm
256 * jradiussp - NOT SUPPORTED
257 *
258 * microMIPS is not more fun...
259 */
260 if (mm_insn_16bit(ip->halfword[0])) {
261 union mips_instruction mmi;
262
263 mmi.word = (ip->halfword[0] << 16);
635c9907
RB
264 return (mmi.mm16_r3_format.opcode == mm_pool16d_op &&
265 mmi.mm16_r3_format.simmediate && mm_addiusp_func) ||
266 (mmi.mm16_r5_format.opcode == mm_pool16d_op &&
267 mmi.mm16_r5_format.rt == 29);
34c2f668 268 }
635c9907
RB
269 return ip->mm_i_format.opcode == mm_addiu32_op &&
270 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
34c2f668 271#else
c0efbb6d
FBH
272 /* addiu/daddiu sp,sp,-imm */
273 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
274 return 0;
275 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
276 return 1;
34c2f668 277#endif
c0efbb6d
FBH
278 return 0;
279}
280
f66686f7 281static int get_frame_info(struct mips_frame_info *info)
1da177e4 282{
34c2f668
LY
283#ifdef CONFIG_CPU_MICROMIPS
284 union mips_instruction *ip = (void *) (((char *) info->func) - 1);
285#else
c0efbb6d 286 union mips_instruction *ip = info->func;
34c2f668 287#endif
29b376ff
FBH
288 unsigned max_insns = info->func_size / sizeof(union mips_instruction);
289 unsigned i;
c0efbb6d 290
1da177e4 291 info->pc_offset = -1;
63077519 292 info->frame_size = 0;
1da177e4 293
29b376ff
FBH
294 if (!ip)
295 goto err;
296
297 if (max_insns == 0)
298 max_insns = 128U; /* unknown function size */
299 max_insns = min(128U, max_insns);
300
c0efbb6d
FBH
301 for (i = 0; i < max_insns; i++, ip++) {
302
e7438c4b 303 if (is_jump_ins(ip))
63077519 304 break;
0cceb4aa
FBH
305 if (!info->frame_size) {
306 if (is_sp_move_ins(ip))
34c2f668
LY
307 {
308#ifdef CONFIG_CPU_MICROMIPS
309 if (mm_insn_16bit(ip->halfword[0]))
310 {
311 unsigned short tmp;
312
313 if (ip->halfword[0] & mm_addiusp_func)
314 {
315 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
316 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
317 } else {
318 tmp = (ip->halfword[0] >> 1);
319 info->frame_size = -(signed short)(tmp & 0xf);
320 }
321 ip = (void *) &ip->halfword[1];
322 ip--;
323 } else
324#endif
0cceb4aa 325 info->frame_size = - ip->i_format.simmediate;
34c2f668 326 }
0cceb4aa 327 continue;
63077519 328 }
0cceb4aa 329 if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
63077519
AN
330 info->pc_offset =
331 ip->i_format.simmediate / sizeof(long);
0cceb4aa 332 break;
1da177e4
LT
333 }
334 }
f66686f7
AN
335 if (info->frame_size && info->pc_offset >= 0) /* nested */
336 return 0;
337 if (info->pc_offset < 0) /* leaf */
338 return 1;
339 /* prologue seems boggus... */
29b376ff 340err:
f66686f7 341 return -1;
1da177e4
LT
342}
343
b5943182
FBH
344static struct mips_frame_info schedule_mfi __read_mostly;
345
5000653e
TW
346#ifdef CONFIG_KALLSYMS
347static unsigned long get___schedule_addr(void)
348{
349 return kallsyms_lookup_name("__schedule");
350}
351#else
352static unsigned long get___schedule_addr(void)
353{
354 union mips_instruction *ip = (void *)schedule;
355 int max_insns = 8;
356 int i;
357
358 for (i = 0; i < max_insns; i++, ip++) {
359 if (ip->j_format.opcode == j_op)
360 return J_TARGET(ip, ip->j_format.target);
361 }
362 return 0;
363}
364#endif
365
1da177e4
LT
366static int __init frame_info_init(void)
367{
b5943182 368 unsigned long size = 0;
63077519 369#ifdef CONFIG_KALLSYMS
b5943182 370 unsigned long ofs;
5000653e
TW
371#endif
372 unsigned long addr;
b5943182 373
5000653e
TW
374 addr = get___schedule_addr();
375 if (!addr)
376 addr = (unsigned long)schedule;
377
378#ifdef CONFIG_KALLSYMS
379 kallsyms_lookup_size_offset(addr, &size, &ofs);
63077519 380#endif
5000653e 381 schedule_mfi.func = (void *)addr;
b5943182
FBH
382 schedule_mfi.func_size = size;
383
384 get_frame_info(&schedule_mfi);
6057a798
FBH
385
386 /*
387 * Without schedule() frame info, result given by
388 * thread_saved_pc() and get_wchan() are not reliable.
389 */
b5943182 390 if (schedule_mfi.pc_offset < 0)
6057a798 391 printk("Can't analyze schedule() prologue at %p\n", schedule);
63077519 392
1da177e4
LT
393 return 0;
394}
395
396arch_initcall(frame_info_init);
397
398/*
399 * Return saved PC of a blocked thread.
400 */
401unsigned long thread_saved_pc(struct task_struct *tsk)
402{
403 struct thread_struct *t = &tsk->thread;
404
405 /* New born processes are a special case */
406 if (t->reg31 == (unsigned long) ret_from_fork)
407 return t->reg31;
b5943182 408 if (schedule_mfi.pc_offset < 0)
1da177e4 409 return 0;
b5943182 410 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
1da177e4
LT
411}
412
1da177e4 413
f66686f7 414#ifdef CONFIG_KALLSYMS
94ea09c6
DK
415/* generic stack unwinding function */
416unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
417 unsigned long *sp,
418 unsigned long pc,
419 unsigned long *ra)
f66686f7 420{
f66686f7 421 struct mips_frame_info info;
f66686f7 422 unsigned long size, ofs;
4d157d5e 423 int leaf;
1924600c
AN
424 extern void ret_from_irq(void);
425 extern void ret_from_exception(void);
f66686f7 426
f66686f7
AN
427 if (!stack_page)
428 return 0;
429
1924600c
AN
430 /*
431 * If we reached the bottom of interrupt context,
432 * return saved pc in pt_regs.
433 */
434 if (pc == (unsigned long)ret_from_irq ||
435 pc == (unsigned long)ret_from_exception) {
436 struct pt_regs *regs;
437 if (*sp >= stack_page &&
438 *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
439 regs = (struct pt_regs *)*sp;
440 pc = regs->cp0_epc;
441 if (__kernel_text_address(pc)) {
442 *sp = regs->regs[29];
443 *ra = regs->regs[31];
444 return pc;
445 }
446 }
447 return 0;
448 }
55b74283 449 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
f66686f7 450 return 0;
1fd69098 451 /*
25985edc 452 * Return ra if an exception occurred at the first instruction
1fd69098 453 */
1924600c
AN
454 if (unlikely(ofs == 0)) {
455 pc = *ra;
456 *ra = 0;
457 return pc;
458 }
f66686f7
AN
459
460 info.func = (void *)(pc - ofs);
461 info.func_size = ofs; /* analyze from start to ofs */
4d157d5e
FBH
462 leaf = get_frame_info(&info);
463 if (leaf < 0)
f66686f7 464 return 0;
4d157d5e
FBH
465
466 if (*sp < stack_page ||
467 *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
f66686f7
AN
468 return 0;
469
4d157d5e
FBH
470 if (leaf)
471 /*
472 * For some extreme cases, get_frame_info() can
473 * consider wrongly a nested function as a leaf
474 * one. In that cases avoid to return always the
475 * same value.
476 */
1924600c 477 pc = pc != *ra ? *ra : 0;
4d157d5e
FBH
478 else
479 pc = ((unsigned long *)(*sp))[info.pc_offset];
480
481 *sp += info.frame_size;
1924600c 482 *ra = 0;
4d157d5e 483 return __kernel_text_address(pc) ? pc : 0;
f66686f7 484}
94ea09c6
DK
485EXPORT_SYMBOL(unwind_stack_by_address);
486
487/* used by show_backtrace() */
488unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
489 unsigned long pc, unsigned long *ra)
490{
491 unsigned long stack_page = (unsigned long)task_stack_page(task);
492 return unwind_stack_by_address(stack_page, sp, pc, ra);
493}
f66686f7 494#endif
b5943182
FBH
495
496/*
497 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
498 */
499unsigned long get_wchan(struct task_struct *task)
500{
501 unsigned long pc = 0;
502#ifdef CONFIG_KALLSYMS
503 unsigned long sp;
1924600c 504 unsigned long ra = 0;
b5943182
FBH
505#endif
506
507 if (!task || task == current || task->state == TASK_RUNNING)
508 goto out;
509 if (!task_stack_page(task))
510 goto out;
511
512 pc = thread_saved_pc(task);
513
514#ifdef CONFIG_KALLSYMS
515 sp = task->thread.reg29 + schedule_mfi.frame_size;
516
517 while (in_sched_functions(pc))
1924600c 518 pc = unwind_stack(task, &sp, pc, &ra);
b5943182
FBH
519#endif
520
521out:
522 return pc;
523}
94109102
FBH
524
525/*
526 * Don't forget that the stack pointer must be aligned on a 8 bytes
527 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
528 */
529unsigned long arch_align_stack(unsigned long sp)
530{
531 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
532 sp -= get_random_int() & ~PAGE_MASK;
533
534 return sp & ALMASK;
535}
856839b7
ES
536
537static void arch_dump_stack(void *info)
538{
539 struct pt_regs *regs;
540
541 regs = get_irq_regs();
542
543 if (regs)
544 show_regs(regs);
545
546 dump_stack();
547}
548
549void arch_trigger_all_cpu_backtrace(bool include_self)
550{
551 smp_call_function(arch_dump_stack, NULL, 1);
552}
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