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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1992 Ross Biro | |
7 | * Copyright (C) Linus Torvalds | |
8 | * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle | |
9 | * Copyright (C) 1996 David S. Miller | |
10 | * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com | |
11 | * Copyright (C) 1999 MIPS Technologies, Inc. | |
12 | * Copyright (C) 2000 Ulf Carlsson | |
13 | * | |
14 | * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit | |
15 | * binaries. | |
16 | */ | |
17 | #include <linux/config.h> | |
18 | #include <linux/compiler.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/sched.h> | |
21 | #include <linux/mm.h> | |
22 | #include <linux/errno.h> | |
23 | #include <linux/ptrace.h> | |
24 | #include <linux/audit.h> | |
25 | #include <linux/smp.h> | |
26 | #include <linux/smp_lock.h> | |
27 | #include <linux/user.h> | |
28 | #include <linux/security.h> | |
7ed20e1a | 29 | #include <linux/signal.h> |
1da177e4 | 30 | |
f8280c8d | 31 | #include <asm/byteorder.h> |
1da177e4 | 32 | #include <asm/cpu.h> |
e50c0a8f | 33 | #include <asm/dsp.h> |
1da177e4 LT |
34 | #include <asm/fpu.h> |
35 | #include <asm/mipsregs.h> | |
101b3531 | 36 | #include <asm/mipsmtregs.h> |
1da177e4 LT |
37 | #include <asm/pgtable.h> |
38 | #include <asm/page.h> | |
39 | #include <asm/system.h> | |
40 | #include <asm/uaccess.h> | |
41 | #include <asm/bootinfo.h> | |
ea3d710f | 42 | #include <asm/reg.h> |
1da177e4 LT |
43 | |
44 | /* | |
45 | * Called by kernel/ptrace.c when detaching.. | |
46 | * | |
47 | * Make sure single step bits etc are not set. | |
48 | */ | |
49 | void ptrace_disable(struct task_struct *child) | |
50 | { | |
51 | /* Nothing to do.. */ | |
52 | } | |
53 | ||
ea3d710f DJ |
54 | /* |
55 | * Read a general register set. We always use the 64-bit format, even | |
56 | * for 32-bit kernels and for 32-bit processes on a 64-bit kernel. | |
57 | * Registers are sign extended to fill the available space. | |
58 | */ | |
59 | int ptrace_getregs (struct task_struct *child, __s64 __user *data) | |
60 | { | |
61 | struct pt_regs *regs; | |
62 | int i; | |
63 | ||
64 | if (!access_ok(VERIFY_WRITE, data, 38 * 8)) | |
65 | return -EIO; | |
66 | ||
67 | regs = (struct pt_regs *) ((unsigned long) child->thread_info + | |
68 | THREAD_SIZE - 32 - sizeof(struct pt_regs)); | |
69 | ||
70 | for (i = 0; i < 32; i++) | |
71 | __put_user (regs->regs[i], data + i); | |
72 | __put_user (regs->lo, data + EF_LO - EF_R0); | |
73 | __put_user (regs->hi, data + EF_HI - EF_R0); | |
74 | __put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0); | |
75 | __put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0); | |
76 | __put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0); | |
77 | __put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0); | |
78 | ||
79 | return 0; | |
80 | } | |
81 | ||
82 | /* | |
83 | * Write a general register set. As for PTRACE_GETREGS, we always use | |
84 | * the 64-bit format. On a 32-bit kernel only the lower order half | |
85 | * (according to endianness) will be used. | |
86 | */ | |
87 | int ptrace_setregs (struct task_struct *child, __s64 __user *data) | |
88 | { | |
89 | struct pt_regs *regs; | |
90 | int i; | |
91 | ||
92 | if (!access_ok(VERIFY_READ, data, 38 * 8)) | |
93 | return -EIO; | |
94 | ||
95 | regs = (struct pt_regs *) ((unsigned long) child->thread_info + | |
96 | THREAD_SIZE - 32 - sizeof(struct pt_regs)); | |
97 | ||
98 | for (i = 0; i < 32; i++) | |
99 | __get_user (regs->regs[i], data + i); | |
100 | __get_user (regs->lo, data + EF_LO - EF_R0); | |
101 | __get_user (regs->hi, data + EF_HI - EF_R0); | |
102 | __get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0); | |
103 | ||
104 | /* badvaddr, status, and cause may not be written. */ | |
105 | ||
106 | return 0; | |
107 | } | |
108 | ||
109 | int ptrace_getfpregs (struct task_struct *child, __u32 __user *data) | |
110 | { | |
111 | int i; | |
112 | ||
113 | if (!access_ok(VERIFY_WRITE, data, 33 * 8)) | |
114 | return -EIO; | |
115 | ||
116 | if (tsk_used_math(child)) { | |
117 | fpureg_t *fregs = get_fpu_regs(child); | |
118 | for (i = 0; i < 32; i++) | |
119 | __put_user (fregs[i], i + (__u64 __user *) data); | |
120 | } else { | |
121 | for (i = 0; i < 32; i++) | |
122 | __put_user ((__u64) -1, i + (__u64 __user *) data); | |
123 | } | |
124 | ||
125 | if (cpu_has_fpu) { | |
126 | unsigned int flags, tmp; | |
127 | ||
128 | __put_user (child->thread.fpu.hard.fcr31, data + 64); | |
129 | ||
101b3531 RB |
130 | preempt_disable(); |
131 | if (cpu_has_mipsmt) { | |
132 | unsigned int vpflags = dvpe(); | |
133 | flags = read_c0_status(); | |
134 | __enable_fpu(); | |
135 | __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp)); | |
136 | write_c0_status(flags); | |
137 | evpe(vpflags); | |
138 | } else { | |
139 | flags = read_c0_status(); | |
140 | __enable_fpu(); | |
141 | __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp)); | |
142 | write_c0_status(flags); | |
143 | } | |
144 | preempt_enable(); | |
ea3d710f DJ |
145 | __put_user (tmp, data + 65); |
146 | } else { | |
147 | __put_user (child->thread.fpu.soft.fcr31, data + 64); | |
148 | __put_user ((__u32) 0, data + 65); | |
149 | } | |
150 | ||
151 | return 0; | |
152 | } | |
153 | ||
154 | int ptrace_setfpregs (struct task_struct *child, __u32 __user *data) | |
155 | { | |
156 | fpureg_t *fregs; | |
157 | int i; | |
158 | ||
159 | if (!access_ok(VERIFY_READ, data, 33 * 8)) | |
160 | return -EIO; | |
161 | ||
162 | fregs = get_fpu_regs(child); | |
163 | ||
164 | for (i = 0; i < 32; i++) | |
165 | __get_user (fregs[i], i + (__u64 __user *) data); | |
166 | ||
167 | if (cpu_has_fpu) | |
168 | __get_user (child->thread.fpu.hard.fcr31, data + 64); | |
169 | else | |
170 | __get_user (child->thread.fpu.soft.fcr31, data + 64); | |
171 | ||
172 | /* FIR may not be written. */ | |
173 | ||
174 | return 0; | |
175 | } | |
176 | ||
dfb7dac3 | 177 | asmlinkage long sys_ptrace(long request, long pid, long addr, long data) |
1da177e4 LT |
178 | { |
179 | struct task_struct *child; | |
180 | int ret; | |
181 | ||
182 | #if 0 | |
183 | printk("ptrace(r=%d,pid=%d,addr=%08lx,data=%08lx)\n", | |
184 | (int) request, (int) pid, (unsigned long) addr, | |
185 | (unsigned long) data); | |
186 | #endif | |
187 | lock_kernel(); | |
188 | ret = -EPERM; | |
189 | if (request == PTRACE_TRACEME) { | |
190 | /* are we already being traced? */ | |
191 | if (current->ptrace & PT_PTRACED) | |
192 | goto out; | |
193 | if ((ret = security_ptrace(current->parent, current))) | |
194 | goto out; | |
195 | /* set the ptrace bit in the process flags. */ | |
196 | current->ptrace |= PT_PTRACED; | |
197 | ret = 0; | |
198 | goto out; | |
199 | } | |
200 | ret = -ESRCH; | |
201 | read_lock(&tasklist_lock); | |
202 | child = find_task_by_pid(pid); | |
203 | if (child) | |
204 | get_task_struct(child); | |
205 | read_unlock(&tasklist_lock); | |
206 | if (!child) | |
207 | goto out; | |
208 | ||
209 | ret = -EPERM; | |
210 | if (pid == 1) /* you may not mess with init */ | |
211 | goto out_tsk; | |
212 | ||
213 | if (request == PTRACE_ATTACH) { | |
214 | ret = ptrace_attach(child); | |
215 | goto out_tsk; | |
216 | } | |
217 | ||
218 | ret = ptrace_check_attach(child, request == PTRACE_KILL); | |
219 | if (ret < 0) | |
220 | goto out_tsk; | |
221 | ||
222 | switch (request) { | |
223 | /* when I and D space are separate, these will need to be fixed. */ | |
224 | case PTRACE_PEEKTEXT: /* read word at location addr. */ | |
225 | case PTRACE_PEEKDATA: { | |
226 | unsigned long tmp; | |
227 | int copied; | |
228 | ||
229 | copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); | |
230 | ret = -EIO; | |
231 | if (copied != sizeof(tmp)) | |
232 | break; | |
fe00f943 | 233 | ret = put_user(tmp,(unsigned long __user *) data); |
1da177e4 LT |
234 | break; |
235 | } | |
236 | ||
237 | /* Read the word at location addr in the USER area. */ | |
238 | case PTRACE_PEEKUSR: { | |
239 | struct pt_regs *regs; | |
240 | unsigned long tmp = 0; | |
241 | ||
242 | regs = (struct pt_regs *) ((unsigned long) child->thread_info + | |
243 | THREAD_SIZE - 32 - sizeof(struct pt_regs)); | |
244 | ret = 0; /* Default return value. */ | |
245 | ||
246 | switch (addr) { | |
247 | case 0 ... 31: | |
248 | tmp = regs->regs[addr]; | |
249 | break; | |
250 | case FPR_BASE ... FPR_BASE + 31: | |
251 | if (tsk_used_math(child)) { | |
252 | fpureg_t *fregs = get_fpu_regs(child); | |
253 | ||
875d43e7 | 254 | #ifdef CONFIG_32BIT |
1da177e4 LT |
255 | /* |
256 | * The odd registers are actually the high | |
257 | * order bits of the values stored in the even | |
258 | * registers - unless we're using r2k_switch.S. | |
259 | */ | |
260 | if (addr & 1) | |
261 | tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32); | |
262 | else | |
263 | tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff); | |
264 | #endif | |
875d43e7 | 265 | #ifdef CONFIG_64BIT |
1da177e4 LT |
266 | tmp = fregs[addr - FPR_BASE]; |
267 | #endif | |
268 | } else { | |
269 | tmp = -1; /* FP not yet used */ | |
270 | } | |
271 | break; | |
272 | case PC: | |
273 | tmp = regs->cp0_epc; | |
274 | break; | |
275 | case CAUSE: | |
276 | tmp = regs->cp0_cause; | |
277 | break; | |
278 | case BADVADDR: | |
279 | tmp = regs->cp0_badvaddr; | |
280 | break; | |
281 | case MMHI: | |
282 | tmp = regs->hi; | |
283 | break; | |
284 | case MMLO: | |
285 | tmp = regs->lo; | |
286 | break; | |
287 | case FPC_CSR: | |
288 | if (cpu_has_fpu) | |
289 | tmp = child->thread.fpu.hard.fcr31; | |
290 | else | |
291 | tmp = child->thread.fpu.soft.fcr31; | |
292 | break; | |
293 | case FPC_EIR: { /* implementation / version register */ | |
294 | unsigned int flags; | |
295 | ||
296 | if (!cpu_has_fpu) | |
297 | break; | |
298 | ||
101b3531 RB |
299 | preempt_disable(); |
300 | if (cpu_has_mipsmt) { | |
301 | unsigned int vpflags = dvpe(); | |
302 | flags = read_c0_status(); | |
303 | __enable_fpu(); | |
304 | __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp)); | |
305 | write_c0_status(flags); | |
306 | evpe(vpflags); | |
307 | } else { | |
308 | flags = read_c0_status(); | |
309 | __enable_fpu(); | |
310 | __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp)); | |
311 | write_c0_status(flags); | |
312 | } | |
313 | preempt_enable(); | |
1da177e4 LT |
314 | break; |
315 | } | |
c134a5ec RB |
316 | case DSP_BASE ... DSP_BASE + 5: { |
317 | dspreg_t *dregs; | |
318 | ||
e50c0a8f RB |
319 | if (!cpu_has_dsp) { |
320 | tmp = 0; | |
321 | ret = -EIO; | |
322 | goto out_tsk; | |
323 | } | |
324 | if (child->thread.dsp.used_dsp) { | |
c134a5ec | 325 | dregs = __get_dsp_regs(child); |
e50c0a8f RB |
326 | tmp = (unsigned long) (dregs[addr - DSP_BASE]); |
327 | } else { | |
328 | tmp = -1; /* DSP registers yet used */ | |
329 | } | |
330 | break; | |
c134a5ec | 331 | } |
e50c0a8f RB |
332 | case DSP_CONTROL: |
333 | if (!cpu_has_dsp) { | |
334 | tmp = 0; | |
335 | ret = -EIO; | |
336 | goto out_tsk; | |
337 | } | |
338 | tmp = child->thread.dsp.dspcontrol; | |
339 | break; | |
1da177e4 LT |
340 | default: |
341 | tmp = 0; | |
342 | ret = -EIO; | |
343 | goto out_tsk; | |
344 | } | |
fe00f943 | 345 | ret = put_user(tmp, (unsigned long __user *) data); |
1da177e4 LT |
346 | break; |
347 | } | |
348 | ||
349 | /* when I and D space are separate, this will have to be fixed. */ | |
350 | case PTRACE_POKETEXT: /* write the word at location addr. */ | |
351 | case PTRACE_POKEDATA: | |
352 | ret = 0; | |
353 | if (access_process_vm(child, addr, &data, sizeof(data), 1) | |
354 | == sizeof(data)) | |
355 | break; | |
356 | ret = -EIO; | |
357 | break; | |
358 | ||
359 | case PTRACE_POKEUSR: { | |
360 | struct pt_regs *regs; | |
361 | ret = 0; | |
362 | regs = (struct pt_regs *) ((unsigned long) child->thread_info + | |
363 | THREAD_SIZE - 32 - sizeof(struct pt_regs)); | |
364 | ||
365 | switch (addr) { | |
366 | case 0 ... 31: | |
367 | regs->regs[addr] = data; | |
368 | break; | |
369 | case FPR_BASE ... FPR_BASE + 31: { | |
370 | fpureg_t *fregs = get_fpu_regs(child); | |
371 | ||
372 | if (!tsk_used_math(child)) { | |
373 | /* FP not yet used */ | |
374 | memset(&child->thread.fpu.hard, ~0, | |
375 | sizeof(child->thread.fpu.hard)); | |
376 | child->thread.fpu.hard.fcr31 = 0; | |
377 | } | |
875d43e7 | 378 | #ifdef CONFIG_32BIT |
1da177e4 LT |
379 | /* |
380 | * The odd registers are actually the high order bits | |
381 | * of the values stored in the even registers - unless | |
382 | * we're using r2k_switch.S. | |
383 | */ | |
384 | if (addr & 1) { | |
385 | fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff; | |
386 | fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32; | |
387 | } else { | |
388 | fregs[addr - FPR_BASE] &= ~0xffffffffLL; | |
389 | fregs[addr - FPR_BASE] |= data; | |
390 | } | |
391 | #endif | |
875d43e7 | 392 | #ifdef CONFIG_64BIT |
1da177e4 LT |
393 | fregs[addr - FPR_BASE] = data; |
394 | #endif | |
395 | break; | |
396 | } | |
397 | case PC: | |
398 | regs->cp0_epc = data; | |
399 | break; | |
400 | case MMHI: | |
401 | regs->hi = data; | |
402 | break; | |
403 | case MMLO: | |
404 | regs->lo = data; | |
405 | break; | |
406 | case FPC_CSR: | |
407 | if (cpu_has_fpu) | |
408 | child->thread.fpu.hard.fcr31 = data; | |
409 | else | |
410 | child->thread.fpu.soft.fcr31 = data; | |
411 | break; | |
c134a5ec RB |
412 | case DSP_BASE ... DSP_BASE + 5: { |
413 | dspreg_t *dregs; | |
414 | ||
e50c0a8f RB |
415 | if (!cpu_has_dsp) { |
416 | ret = -EIO; | |
417 | break; | |
418 | } | |
419 | ||
c134a5ec | 420 | dregs = __get_dsp_regs(child); |
e50c0a8f RB |
421 | dregs[addr - DSP_BASE] = data; |
422 | break; | |
c134a5ec | 423 | } |
e50c0a8f RB |
424 | case DSP_CONTROL: |
425 | if (!cpu_has_dsp) { | |
426 | ret = -EIO; | |
427 | break; | |
428 | } | |
429 | child->thread.dsp.dspcontrol = data; | |
430 | break; | |
1da177e4 LT |
431 | default: |
432 | /* The rest are not allowed. */ | |
433 | ret = -EIO; | |
434 | break; | |
435 | } | |
436 | break; | |
437 | } | |
438 | ||
ea3d710f DJ |
439 | case PTRACE_GETREGS: |
440 | ret = ptrace_getregs (child, (__u64 __user *) data); | |
441 | break; | |
442 | ||
443 | case PTRACE_SETREGS: | |
444 | ret = ptrace_setregs (child, (__u64 __user *) data); | |
445 | break; | |
446 | ||
447 | case PTRACE_GETFPREGS: | |
448 | ret = ptrace_getfpregs (child, (__u32 __user *) data); | |
449 | break; | |
450 | ||
451 | case PTRACE_SETFPREGS: | |
452 | ret = ptrace_setfpregs (child, (__u32 __user *) data); | |
453 | break; | |
454 | ||
1da177e4 LT |
455 | case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ |
456 | case PTRACE_CONT: { /* restart after signal. */ | |
457 | ret = -EIO; | |
7ed20e1a | 458 | if (!valid_signal(data)) |
1da177e4 LT |
459 | break; |
460 | if (request == PTRACE_SYSCALL) { | |
461 | set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
462 | } | |
463 | else { | |
464 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
465 | } | |
466 | child->exit_code = data; | |
467 | wake_up_process(child); | |
468 | ret = 0; | |
469 | break; | |
470 | } | |
471 | ||
472 | /* | |
473 | * make the child exit. Best I can do is send it a sigkill. | |
474 | * perhaps it should be put in the status that it wants to | |
475 | * exit. | |
476 | */ | |
477 | case PTRACE_KILL: | |
478 | ret = 0; | |
479 | if (child->exit_state == EXIT_ZOMBIE) /* already dead */ | |
480 | break; | |
481 | child->exit_code = SIGKILL; | |
482 | wake_up_process(child); | |
483 | break; | |
484 | ||
485 | case PTRACE_DETACH: /* detach a process that was attached. */ | |
486 | ret = ptrace_detach(child, data); | |
487 | break; | |
488 | ||
3c37026d RB |
489 | case PTRACE_GET_THREAD_AREA: |
490 | ret = put_user(child->thread_info->tp_value, | |
491 | (unsigned long __user *) data); | |
492 | break; | |
493 | ||
1da177e4 LT |
494 | default: |
495 | ret = ptrace_request(child, request, addr, data); | |
496 | break; | |
497 | } | |
498 | ||
499 | out_tsk: | |
500 | put_task_struct(child); | |
501 | out: | |
502 | unlock_kernel(); | |
503 | return ret; | |
504 | } | |
505 | ||
67eb81e1 | 506 | static inline int audit_arch(void) |
2fd6f58b | 507 | { |
f8280c8d | 508 | int arch = EM_MIPS; |
875d43e7 | 509 | #ifdef CONFIG_64BIT |
f8280c8d RB |
510 | arch |= __AUDIT_ARCH_64BIT; |
511 | #endif | |
512 | #if defined(__LITTLE_ENDIAN) | |
513 | arch |= __AUDIT_ARCH_LE; | |
514 | #endif | |
515 | return arch; | |
2fd6f58b | 516 | } |
517 | ||
1da177e4 LT |
518 | /* |
519 | * Notification of system call entry/exit | |
520 | * - triggered by current->work.syscall_trace | |
521 | */ | |
522 | asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit) | |
523 | { | |
2fd6f58b | 524 | if (unlikely(current->audit_context) && entryexit) |
f8280c8d RB |
525 | audit_syscall_exit(current, AUDITSC_RESULT(regs->regs[2]), |
526 | regs->regs[2]); | |
1da177e4 | 527 | |
1da177e4 | 528 | if (!(current->ptrace & PT_PTRACED)) |
2fd6f58b | 529 | goto out; |
f8280c8d RB |
530 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) |
531 | goto out; | |
1da177e4 LT |
532 | |
533 | /* The 0x80 provides a way for the tracing parent to distinguish | |
534 | between a syscall stop and SIGTRAP delivery */ | |
535 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ? | |
536 | 0x80 : 0)); | |
537 | ||
538 | /* | |
539 | * this isn't the same as continuing with a signal, but it will do | |
540 | * for normal use. strace only continues with a signal if the | |
541 | * stopping signal is not SIGTRAP. -brl | |
542 | */ | |
543 | if (current->exit_code) { | |
544 | send_sig(current->exit_code, current, 1); | |
545 | current->exit_code = 0; | |
546 | } | |
2fd6f58b | 547 | out: |
548 | if (unlikely(current->audit_context) && !entryexit) | |
549 | audit_syscall_entry(current, audit_arch(), regs->regs[2], | |
550 | regs->regs[4], regs->regs[5], | |
551 | regs->regs[6], regs->regs[7]); | |
1da177e4 | 552 | } |