[deliverable/linux.git] / arch / mips / kernel / ptrace.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1992 Ross Biro
 * Copyright (C) Linus Torvalds
 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
 * Copyright (C) 1996 David S. Miller
 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
 * Copyright (C) 1999 MIPS Technologies, Inc.
 * Copyright (C) 2000 Ulf Carlsson
 *
 * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
 * binaries.
 */
#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/errno.h>
#include <linux/ptrace.h>
#include <linux/audit.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/user.h>
#include <linux/security.h>
#include <linux/signal.h>

#include <asm/byteorder.h>
#include <asm/cpu.h>
#include <asm/dsp.h>
#include <asm/fpu.h>
#include <asm/mipsregs.h>
#include <asm/mipsmtregs.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/bootinfo.h>
#include <asm/reg.h>

/*
 * Called by kernel/ptrace.c when detaching..
 *
 * Make sure single step bits etc are not set.
 */
void ptrace_disable(struct task_struct *child)
{
	/* Nothing to do.. */
}

/*
 * Read a general register set.  We always use the 64-bit format, even
 * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
 * Registers are sign extended to fill the available space.
 */
int ptrace_getregs (struct task_struct *child, __s64 __user *data)
{
	struct pt_regs *regs;
	int i;

	if (!access_ok(VERIFY_WRITE, data, 38 * 8))
		return -EIO;

	regs = task_pt_regs(child);

	for (i = 0; i < 32; i++)
		__put_user (regs->regs[i], data + i);
	__put_user (regs->lo, data + EF_LO - EF_R0);
	__put_user (regs->hi, data + EF_HI - EF_R0);
	__put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
	__put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
	__put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
	__put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);

	return 0;
}

/*
 * Write a general register set.  As for PTRACE_GETREGS, we always use
 * the 64-bit format.  On a 32-bit kernel only the lower order half
 * (according to endianness) will be used.
 */
int ptrace_setregs (struct task_struct *child, __s64 __user *data)
{
	struct pt_regs *regs;
	int i;

	if (!access_ok(VERIFY_READ, data, 38 * 8))
		return -EIO;

	regs = task_pt_regs(child);

	for (i = 0; i < 32; i++)
		__get_user (regs->regs[i], data + i);
	__get_user (regs->lo, data + EF_LO - EF_R0);
	__get_user (regs->hi, data + EF_HI - EF_R0);
	__get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);

	/* badvaddr, status, and cause may not be written.  */

	return 0;
}

int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
{
	int i;
	unsigned int tmp;

	if (!access_ok(VERIFY_WRITE, data, 33 * 8))
		return -EIO;

	if (tsk_used_math(child)) {
		fpureg_t *fregs = get_fpu_regs(child);
		for (i = 0; i < 32; i++)
			__put_user (fregs[i], i + (__u64 __user *) data);
	} else {
		for (i = 0; i < 32; i++)
			__put_user ((__u64) -1, i + (__u64 __user *) data);
	}

	__put_user (child->thread.fpu.fcr31, data + 64);

	preempt_disable();
	if (cpu_has_fpu) {
		unsigned int flags;

		if (cpu_has_mipsmt) {
			unsigned int vpflags = dvpe();
			flags = read_c0_status();
			__enable_fpu();
			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
			write_c0_status(flags);
			evpe(vpflags);
		} else {
			flags = read_c0_status();
			__enable_fpu();
			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
			write_c0_status(flags);
		}
	} else {
		tmp = 0;
	}
	preempt_enable();
	__put_user (tmp, data + 65);

	return 0;
}

int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
{
	fpureg_t *fregs;
	int i;

	if (!access_ok(VERIFY_READ, data, 33 * 8))
		return -EIO;

	fregs = get_fpu_regs(child);

	for (i = 0; i < 32; i++)
		__get_user (fregs[i], i + (__u64 __user *) data);

	__get_user (child->thread.fpu.fcr31, data + 64);

	/* FIR may not be written.  */

	return 0;
}

long arch_ptrace(struct task_struct *child, long request, long addr, long data)
{
	int ret;

	switch (request) {
	/* when I and D space are separate, these will need to be fixed. */
	case PTRACE_PEEKTEXT: /* read word at location addr. */
	case PTRACE_PEEKDATA: {
		unsigned long tmp;
		int copied;

		copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
		ret = -EIO;
		if (copied != sizeof(tmp))
			break;
		ret = put_user(tmp,(unsigned long __user *) data);
		break;
	}

	/* Read the word at location addr in the USER area. */
	case PTRACE_PEEKUSR: {
		struct pt_regs *regs;
		unsigned long tmp = 0;

		regs = task_pt_regs(child);
		ret = 0;  /* Default return value. */

		switch (addr) {
		case 0 ... 31:
			tmp = regs->regs[addr];
			break;
		case FPR_BASE ... FPR_BASE + 31:
			if (tsk_used_math(child)) {
				fpureg_t *fregs = get_fpu_regs(child);

#ifdef CONFIG_32BIT
				/*
				 * The odd registers are actually the high
				 * order bits of the values stored in the even
				 * registers - unless we're using r2k_switch.S.
				 */
				if (addr & 1)
					tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
				else
					tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
#endif
#ifdef CONFIG_64BIT
				tmp = fregs[addr - FPR_BASE];
#endif
			} else {
				tmp = -1;	/* FP not yet used  */
			}
			break;
		case PC:
			tmp = regs->cp0_epc;
			break;
		case CAUSE:
			tmp = regs->cp0_cause;
			break;
		case BADVADDR:
			tmp = regs->cp0_badvaddr;
			break;
		case MMHI:
			tmp = regs->hi;
			break;
		case MMLO:
			tmp = regs->lo;
			break;
		case FPC_CSR:
			tmp = child->thread.fpu.fcr31;
			break;
		case FPC_EIR: {	/* implementation / version register */
			unsigned int flags;
#ifdef CONFIG_MIPS_MT_SMTC
			unsigned int irqflags;
			unsigned int mtflags;
#endif /* CONFIG_MIPS_MT_SMTC */

			preempt_disable();
			if (!cpu_has_fpu) {
				preempt_enable();
				break;
			}

#ifdef CONFIG_MIPS_MT_SMTC
			/* Read-modify-write of Status must be atomic */
			local_irq_save(irqflags);
			mtflags = dmt();
#endif /* CONFIG_MIPS_MT_SMTC */
			if (cpu_has_mipsmt) {
				unsigned int vpflags = dvpe();
				flags = read_c0_status();
				__enable_fpu();
				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
				write_c0_status(flags);
				evpe(vpflags);
			} else {
				flags = read_c0_status();
				__enable_fpu();
				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
				write_c0_status(flags);
			}
#ifdef CONFIG_MIPS_MT_SMTC
			emt(mtflags);
			local_irq_restore(irqflags);
#endif /* CONFIG_MIPS_MT_SMTC */
			preempt_enable();
			break;
		}
		case DSP_BASE ... DSP_BASE + 5: {
			dspreg_t *dregs;

			if (!cpu_has_dsp) {
				tmp = 0;
				ret = -EIO;
				goto out;
			}
			dregs = __get_dsp_regs(child);
			tmp = (unsigned long) (dregs[addr - DSP_BASE]);
			break;
		}
		case DSP_CONTROL:
			if (!cpu_has_dsp) {
				tmp = 0;
				ret = -EIO;
				goto out;
			}
			tmp = child->thread.dsp.dspcontrol;
			break;
		default:
			tmp = 0;
			ret = -EIO;
			goto out;
		}
		ret = put_user(tmp, (unsigned long __user *) data);
		break;
	}

	/* when I and D space are separate, this will have to be fixed. */
	case PTRACE_POKETEXT: /* write the word at location addr. */
	case PTRACE_POKEDATA:
		ret = 0;
		if (access_process_vm(child, addr, &data, sizeof(data), 1)
		    == sizeof(data))
			break;
		ret = -EIO;
		break;

	case PTRACE_POKEUSR: {
		struct pt_regs *regs;
		ret = 0;
		regs = task_pt_regs(child);

		switch (addr) {
		case 0 ... 31:
			regs->regs[addr] = data;
			break;
		case FPR_BASE ... FPR_BASE + 31: {
			fpureg_t *fregs = get_fpu_regs(child);

			if (!tsk_used_math(child)) {
				/* FP not yet used  */
				memset(&child->thread.fpu, ~0,
				       sizeof(child->thread.fpu));
				child->thread.fpu.fcr31 = 0;
			}
#ifdef CONFIG_32BIT
			/*
			 * The odd registers are actually the high order bits
			 * of the values stored in the even registers - unless
			 * we're using r2k_switch.S.
			 */
			if (addr & 1) {
				fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
				fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
			} else {
				fregs[addr - FPR_BASE] &= ~0xffffffffLL;
				fregs[addr - FPR_BASE] |= data;
			}
#endif
#ifdef CONFIG_64BIT
			fregs[addr - FPR_BASE] = data;
#endif
			break;
		}
		case PC:
			regs->cp0_epc = data;
			break;
		case MMHI:
			regs->hi = data;
			break;
		case MMLO:
			regs->lo = data;
			break;
		case FPC_CSR:
			child->thread.fpu.fcr31 = data;
			break;
		case DSP_BASE ... DSP_BASE + 5: {
			dspreg_t *dregs;

			if (!cpu_has_dsp) {
				ret = -EIO;
				break;
			}

			dregs = __get_dsp_regs(child);
			dregs[addr - DSP_BASE] = data;
			break;
		}
		case DSP_CONTROL:
			if (!cpu_has_dsp) {
				ret = -EIO;
				break;
			}
			child->thread.dsp.dspcontrol = data;
			break;
		default:
			/* The rest are not allowed. */
			ret = -EIO;
			break;
		}
		break;
		}

	case PTRACE_GETREGS:
		ret = ptrace_getregs (child, (__u64 __user *) data);
		break;

	case PTRACE_SETREGS:
		ret = ptrace_setregs (child, (__u64 __user *) data);
		break;

	case PTRACE_GETFPREGS:
		ret = ptrace_getfpregs (child, (__u32 __user *) data);
		break;

	case PTRACE_SETFPREGS:
		ret = ptrace_setfpregs (child, (__u32 __user *) data);
		break;

	case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
	case PTRACE_CONT: { /* restart after signal. */
		ret = -EIO;
		if (!valid_signal(data))
			break;
		if (request == PTRACE_SYSCALL) {
			set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
		}
		else {
			clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
		}
		child->exit_code = data;
		wake_up_process(child);
		ret = 0;
		break;
	}

	/*
	 * make the child exit.  Best I can do is send it a sigkill.
	 * perhaps it should be put in the status that it wants to
	 * exit.
	 */
	case PTRACE_KILL:
		ret = 0;
		if (child->exit_state == EXIT_ZOMBIE)	/* already dead */
			break;
		child->exit_code = SIGKILL;
		wake_up_process(child);
		break;

	case PTRACE_DETACH: /* detach a process that was attached. */
		ret = ptrace_detach(child, data);
		break;

	case PTRACE_GET_THREAD_AREA:
		ret = put_user(task_thread_info(child)->tp_value,
				(unsigned long __user *) data);
		break;

	default:
		ret = ptrace_request(child, request, addr, data);
		break;
	}
 out:
	return ret;
}

static inline int audit_arch(void)
{
	int arch = EM_MIPS;
#ifdef CONFIG_64BIT
	arch |=  __AUDIT_ARCH_64BIT;
#endif
#if defined(__LITTLE_ENDIAN)
	arch |=  __AUDIT_ARCH_LE;
#endif
	return arch;
}

/*
 * Notification of system call entry/exit
 * - triggered by current->work.syscall_trace
 */
asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
{
	if (unlikely(current->audit_context) && entryexit)
		audit_syscall_exit(AUDITSC_RESULT(regs->regs[2]),
		                   regs->regs[2]);

	if (!(current->ptrace & PT_PTRACED))
		goto out;
	if (!test_thread_flag(TIF_SYSCALL_TRACE))
		goto out;

	/* The 0x80 provides a way for the tracing parent to distinguish
	   between a syscall stop and SIGTRAP delivery */
	ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
	                         0x80 : 0));

	/*
	 * this isn't the same as continuing with a signal, but it will do
	 * for normal use.  strace only continues with a signal if the
	 * stopping signal is not SIGTRAP.  -brl
	 */
	if (current->exit_code) {
		send_sig(current->exit_code, current, 1);
		current->exit_code = 0;
	}
 out:
	if (unlikely(current->audit_context) && !entryexit)
		audit_syscall_entry(audit_arch(), regs->regs[2],
				    regs->regs[4], regs->regs[5],
				    regs->regs[6], regs->regs[7]);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1992 Ross Biro
	7	* Copyright (C) Linus Torvalds
	8	* Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
	9	* Copyright (C) 1996 David S. Miller
	10	* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
	11	* Copyright (C) 1999 MIPS Technologies, Inc.
	12	* Copyright (C) 2000 Ulf Carlsson
	13	*
	14	* At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
	15	* binaries.
	16	*/
1da177e4 LT	17	#include <linux/compiler.h>
	18	#include <linux/kernel.h>
	19	#include <linux/sched.h>
	20	#include <linux/mm.h>
	21	#include <linux/errno.h>
	22	#include <linux/ptrace.h>
	23	#include <linux/audit.h>
	24	#include <linux/smp.h>
	25	#include <linux/smp_lock.h>
	26	#include <linux/user.h>
	27	#include <linux/security.h>
7ed20e1a	28	#include <linux/signal.h>
1da177e4	29
f8280c8d	30	#include <asm/byteorder.h>
1da177e4	31	#include <asm/cpu.h>
e50c0a8f	32	#include <asm/dsp.h>
1da177e4 LT	33	#include <asm/fpu.h>
1da177e4 LT	34	#include <asm/mipsregs.h>
101b3531	35	#include <asm/mipsmtregs.h>
1da177e4 LT	36	#include <asm/pgtable.h>
	37	#include <asm/page.h>
	38	#include <asm/system.h>
	39	#include <asm/uaccess.h>
	40	#include <asm/bootinfo.h>
ea3d710f	41	#include <asm/reg.h>
1da177e4 LT	42
	43	/*
	44	* Called by kernel/ptrace.c when detaching..
	45	*
	46	* Make sure single step bits etc are not set.
	47	*/
	48	void ptrace_disable(struct task_struct *child)
	49	{
	50	/* Nothing to do.. */
	51	}
	52
ea3d710f DJ	53	/*
	54	* Read a general register set. We always use the 64-bit format, even
	55	* for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
	56	* Registers are sign extended to fill the available space.
	57	*/
	58	int ptrace_getregs (struct task_struct child, __s64 __user data)
	59	{
	60	struct pt_regs *regs;
	61	int i;
	62
	63	if (!access_ok(VERIFY_WRITE, data, 38 * 8))
	64	return -EIO;
	65
40bc9c67	66	regs = task_pt_regs(child);
ea3d710f DJ	67
	68	for (i = 0; i < 32; i++)
	69	__put_user (regs->regs[i], data + i);
	70	__put_user (regs->lo, data + EF_LO - EF_R0);
	71	__put_user (regs->hi, data + EF_HI - EF_R0);
	72	__put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
	73	__put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
	74	__put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
	75	__put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
	76
	77	return 0;
	78	}
	79
	80	/*
	81	* Write a general register set. As for PTRACE_GETREGS, we always use
	82	* the 64-bit format. On a 32-bit kernel only the lower order half
	83	* (according to endianness) will be used.
	84	*/
	85	int ptrace_setregs (struct task_struct child, __s64 __user data)
	86	{
	87	struct pt_regs *regs;
	88	int i;
	89
	90	if (!access_ok(VERIFY_READ, data, 38 * 8))
	91	return -EIO;
	92
40bc9c67	93	regs = task_pt_regs(child);
ea3d710f DJ	94
	95	for (i = 0; i < 32; i++)
	96	__get_user (regs->regs[i], data + i);
	97	__get_user (regs->lo, data + EF_LO - EF_R0);
	98	__get_user (regs->hi, data + EF_HI - EF_R0);
	99	__get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
	100
	101	/* badvaddr, status, and cause may not be written. */
	102
	103	return 0;
	104	}
	105
	106	int ptrace_getfpregs (struct task_struct child, __u32 __user data)
	107	{
	108	int i;
e04582b7	109	unsigned int tmp;
ea3d710f DJ	110
	111	if (!access_ok(VERIFY_WRITE, data, 33 * 8))
	112	return -EIO;
	113
	114	if (tsk_used_math(child)) {
	115	fpureg_t *fregs = get_fpu_regs(child);
	116	for (i = 0; i < 32; i++)
	117	__put_user (fregs[i], i + (__u64 __user *) data);
	118	} else {
	119	for (i = 0; i < 32; i++)
	120	__put_user ((__u64) -1, i + (__u64 __user *) data);
	121	}
	122
eae89076 AN	123	__put_user (child->thread.fpu.fcr31, data + 64);
eae89076 AN	124
e04582b7	125	preempt_disable();
ea3d710f	126	if (cpu_has_fpu) {
e04582b7	127	unsigned int flags;
ea3d710f	128
101b3531 RB	129	if (cpu_has_mipsmt) {
	130	unsigned int vpflags = dvpe();
	131	flags = read_c0_status();
	132	__enable_fpu();
	133	__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
	134	write_c0_status(flags);
	135	evpe(vpflags);
	136	} else {
	137	flags = read_c0_status();
	138	__enable_fpu();
	139	__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
	140	write_c0_status(flags);
	141	}
ea3d710f	142	} else {
e04582b7	143	tmp = 0;
ea3d710f	144	}
e04582b7 AN	145	preempt_enable();
e04582b7 AN	146	__put_user (tmp, data + 65);
ea3d710f DJ	147
	148	return 0;
	149	}
	150
	151	int ptrace_setfpregs (struct task_struct child, __u32 __user data)
	152	{
	153	fpureg_t *fregs;
	154	int i;
	155
	156	if (!access_ok(VERIFY_READ, data, 33 * 8))
	157	return -EIO;
	158
	159	fregs = get_fpu_regs(child);
	160
	161	for (i = 0; i < 32; i++)
	162	__get_user (fregs[i], i + (__u64 __user *) data);
	163
eae89076	164	__get_user (child->thread.fpu.fcr31, data + 64);
ea3d710f DJ	165
	166	/* FIR may not be written. */
	167
	168	return 0;
	169	}
	170
481bed45	171	long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1da177e4	172	{
1da177e4 LT	173	int ret;
1da177e4 LT	174
1da177e4 LT	175	switch (request) {
	176	/* when I and D space are separate, these will need to be fixed. */
	177	case PTRACE_PEEKTEXT: /* read word at location addr. */
	178	case PTRACE_PEEKDATA: {
	179	unsigned long tmp;
	180	int copied;
	181
	182	copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
	183	ret = -EIO;
	184	if (copied != sizeof(tmp))
	185	break;
fe00f943	186	ret = put_user(tmp,(unsigned long __user *) data);
1da177e4 LT	187	break;
	188	}
	189
	190	/* Read the word at location addr in the USER area. */
	191	case PTRACE_PEEKUSR: {
	192	struct pt_regs *regs;
	193	unsigned long tmp = 0;
	194
40bc9c67	195	regs = task_pt_regs(child);
1da177e4 LT	196	ret = 0; /* Default return value. */
	197
	198	switch (addr) {
	199	case 0 ... 31:
	200	tmp = regs->regs[addr];
	201	break;
	202	case FPR_BASE ... FPR_BASE + 31:
	203	if (tsk_used_math(child)) {
	204	fpureg_t *fregs = get_fpu_regs(child);
	205
875d43e7	206	#ifdef CONFIG_32BIT
1da177e4 LT	207	/*
	208	* The odd registers are actually the high
	209	* order bits of the values stored in the even
	210	* registers - unless we're using r2k_switch.S.
	211	*/
	212	if (addr & 1)
	213	tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
	214	else
	215	tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
	216	#endif
875d43e7	217	#ifdef CONFIG_64BIT
1da177e4 LT	218	tmp = fregs[addr - FPR_BASE];
	219	#endif
	220	} else {
	221	tmp = -1; /* FP not yet used */
	222	}
	223	break;
	224	case PC:
	225	tmp = regs->cp0_epc;
	226	break;
	227	case CAUSE:
	228	tmp = regs->cp0_cause;
	229	break;
	230	case BADVADDR:
	231	tmp = regs->cp0_badvaddr;
	232	break;
	233	case MMHI:
	234	tmp = regs->hi;
	235	break;
	236	case MMLO:
	237	tmp = regs->lo;
	238	break;
	239	case FPC_CSR:
eae89076	240	tmp = child->thread.fpu.fcr31;
1da177e4 LT	241	break;
	242	case FPC_EIR: { /* implementation / version register */
	243	unsigned int flags;
41c594ab RB	244	#ifdef CONFIG_MIPS_MT_SMTC
	245	unsigned int irqflags;
	246	unsigned int mtflags;
	247	#endif /* CONFIG_MIPS_MT_SMTC */
1da177e4	248
e04582b7 AN	249	preempt_disable();
	250	if (!cpu_has_fpu) {
	251	preempt_enable();
1da177e4	252	break;
e04582b7	253	}
1da177e4	254
41c594ab RB	255	#ifdef CONFIG_MIPS_MT_SMTC
	256	/* Read-modify-write of Status must be atomic */
	257	local_irq_save(irqflags);
	258	mtflags = dmt();
	259	#endif /* CONFIG_MIPS_MT_SMTC */
101b3531 RB	260	if (cpu_has_mipsmt) {
	261	unsigned int vpflags = dvpe();
	262	flags = read_c0_status();
	263	__enable_fpu();
	264	__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
	265	write_c0_status(flags);
	266	evpe(vpflags);
	267	} else {
	268	flags = read_c0_status();
	269	__enable_fpu();
	270	__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
	271	write_c0_status(flags);
	272	}
41c594ab RB	273	#ifdef CONFIG_MIPS_MT_SMTC
	274	emt(mtflags);
	275	local_irq_restore(irqflags);
	276	#endif /* CONFIG_MIPS_MT_SMTC */
101b3531	277	preempt_enable();
1da177e4 LT	278	break;
1da177e4 LT	279	}
c134a5ec RB	280	case DSP_BASE ... DSP_BASE + 5: {
	281	dspreg_t *dregs;
	282
e50c0a8f RB	283	if (!cpu_has_dsp) {
	284	tmp = 0;
	285	ret = -EIO;
481bed45	286	goto out;
e50c0a8f	287	}
6c355852 RB	288	dregs = __get_dsp_regs(child);
6c355852 RB	289	tmp = (unsigned long) (dregs[addr - DSP_BASE]);
e50c0a8f	290	break;
c134a5ec	291	}
e50c0a8f RB	292	case DSP_CONTROL:
	293	if (!cpu_has_dsp) {
	294	tmp = 0;
	295	ret = -EIO;
481bed45	296	goto out;
e50c0a8f RB	297	}
	298	tmp = child->thread.dsp.dspcontrol;
	299	break;
1da177e4 LT	300	default:
	301	tmp = 0;
	302	ret = -EIO;
481bed45	303	goto out;
1da177e4	304	}
fe00f943	305	ret = put_user(tmp, (unsigned long __user *) data);
1da177e4 LT	306	break;
	307	}
	308
	309	/* when I and D space are separate, this will have to be fixed. */
	310	case PTRACE_POKETEXT: /* write the word at location addr. */
	311	case PTRACE_POKEDATA:
	312	ret = 0;
	313	if (access_process_vm(child, addr, &data, sizeof(data), 1)
	314	== sizeof(data))
	315	break;
	316	ret = -EIO;
	317	break;
	318
	319	case PTRACE_POKEUSR: {
	320	struct pt_regs *regs;
	321	ret = 0;
40bc9c67	322	regs = task_pt_regs(child);
1da177e4 LT	323
	324	switch (addr) {
	325	case 0 ... 31:
	326	regs->regs[addr] = data;
	327	break;
	328	case FPR_BASE ... FPR_BASE + 31: {
	329	fpureg_t *fregs = get_fpu_regs(child);
	330
	331	if (!tsk_used_math(child)) {
	332	/* FP not yet used */
eae89076 AN	333	memset(&child->thread.fpu, ~0,
	334	sizeof(child->thread.fpu));
	335	child->thread.fpu.fcr31 = 0;
1da177e4	336	}
875d43e7	337	#ifdef CONFIG_32BIT
1da177e4 LT	338	/*
	339	* The odd registers are actually the high order bits
	340	* of the values stored in the even registers - unless
	341	* we're using r2k_switch.S.
	342	*/
	343	if (addr & 1) {
	344	fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
	345	fregs[(addr & ~1) - FPR_BASE] \|= ((unsigned long long) data) << 32;
	346	} else {
	347	fregs[addr - FPR_BASE] &= ~0xffffffffLL;
	348	fregs[addr - FPR_BASE] \|= data;
	349	}
	350	#endif
875d43e7	351	#ifdef CONFIG_64BIT
1da177e4 LT	352	fregs[addr - FPR_BASE] = data;
	353	#endif
	354	break;
	355	}
	356	case PC:
	357	regs->cp0_epc = data;
	358	break;
	359	case MMHI:
	360	regs->hi = data;
	361	break;
	362	case MMLO:
	363	regs->lo = data;
	364	break;
	365	case FPC_CSR:
eae89076	366	child->thread.fpu.fcr31 = data;
1da177e4	367	break;
c134a5ec RB	368	case DSP_BASE ... DSP_BASE + 5: {
	369	dspreg_t *dregs;
	370
e50c0a8f RB	371	if (!cpu_has_dsp) {
	372	ret = -EIO;
	373	break;
	374	}
	375
c134a5ec	376	dregs = __get_dsp_regs(child);
e50c0a8f RB	377	dregs[addr - DSP_BASE] = data;
e50c0a8f RB	378	break;
c134a5ec	379	}
e50c0a8f RB	380	case DSP_CONTROL:
	381	if (!cpu_has_dsp) {
	382	ret = -EIO;
	383	break;
	384	}
	385	child->thread.dsp.dspcontrol = data;
	386	break;
1da177e4 LT	387	default:
	388	/* The rest are not allowed. */
	389	ret = -EIO;
	390	break;
	391	}
	392	break;
	393	}
	394
ea3d710f DJ	395	case PTRACE_GETREGS:
	396	ret = ptrace_getregs (child, (__u64 __user *) data);
	397	break;
	398
	399	case PTRACE_SETREGS:
	400	ret = ptrace_setregs (child, (__u64 __user *) data);
	401	break;
	402
	403	case PTRACE_GETFPREGS:
	404	ret = ptrace_getfpregs (child, (__u32 __user *) data);
	405	break;
	406
	407	case PTRACE_SETFPREGS:
	408	ret = ptrace_setfpregs (child, (__u32 __user *) data);
	409	break;
	410
1da177e4 LT	411	case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
	412	case PTRACE_CONT: { /* restart after signal. */
	413	ret = -EIO;
7ed20e1a	414	if (!valid_signal(data))
1da177e4 LT	415	break;
	416	if (request == PTRACE_SYSCALL) {
	417	set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
	418	}
	419	else {
	420	clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
	421	}
	422	child->exit_code = data;
	423	wake_up_process(child);
	424	ret = 0;
	425	break;
	426	}
	427
	428	/*
	429	* make the child exit. Best I can do is send it a sigkill.
	430	* perhaps it should be put in the status that it wants to
	431	* exit.
	432	*/
	433	case PTRACE_KILL:
	434	ret = 0;
	435	if (child->exit_state == EXIT_ZOMBIE) /* already dead */
	436	break;
	437	child->exit_code = SIGKILL;
	438	wake_up_process(child);
	439	break;
	440
	441	case PTRACE_DETACH: /* detach a process that was attached. */
	442	ret = ptrace_detach(child, data);
	443	break;
	444
3c37026d	445	case PTRACE_GET_THREAD_AREA:
dc8f6029	446	ret = put_user(task_thread_info(child)->tp_value,
3c37026d RB	447	(unsigned long __user *) data);
	448	break;
	449
1da177e4 LT	450	default:
	451	ret = ptrace_request(child, request, addr, data);
	452	break;
	453	}
481bed45	454	out:
1da177e4 LT	455	return ret;
	456	}
	457
67eb81e1	458	static inline int audit_arch(void)
2fd6f58b	459	{
f8280c8d	460	int arch = EM_MIPS;
875d43e7	461	#ifdef CONFIG_64BIT
f8280c8d RB	462	arch \|= __AUDIT_ARCH_64BIT;
	463	#endif
	464	#if defined(__LITTLE_ENDIAN)
	465	arch \|= __AUDIT_ARCH_LE;
	466	#endif
	467	return arch;
2fd6f58b	468	}
2fd6f58b	469
1da177e4 LT	470	/*
	471	* Notification of system call entry/exit
	472	* - triggered by current->work.syscall_trace
	473	*/
	474	asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
	475	{
2fd6f58b	476	if (unlikely(current->audit_context) && entryexit)
5411be59	477	audit_syscall_exit(AUDITSC_RESULT(regs->regs[2]),
f8280c8d	478	regs->regs[2]);
1da177e4	479
1da177e4	480	if (!(current->ptrace & PT_PTRACED))
2fd6f58b	481	goto out;
f8280c8d RB	482	if (!test_thread_flag(TIF_SYSCALL_TRACE))
f8280c8d RB	483	goto out;
1da177e4 LT	484
	485	/* The 0x80 provides a way for the tracing parent to distinguish
	486	between a syscall stop and SIGTRAP delivery */
	487	ptrace_notify(SIGTRAP \| ((current->ptrace & PT_TRACESYSGOOD) ?
	488	0x80 : 0));
	489
	490	/*
	491	* this isn't the same as continuing with a signal, but it will do
	492	* for normal use. strace only continues with a signal if the
	493	* stopping signal is not SIGTRAP. -brl
	494	*/
	495	if (current->exit_code) {
	496	send_sig(current->exit_code, current, 1);
	497	current->exit_code = 0;
	498	}
2fd6f58b	499	out:
2fd6f58b	500	if (unlikely(current->audit_context) && !entryexit)
5411be59	501	audit_syscall_entry(audit_arch(), regs->regs[2],
2fd6f58b	502	regs->regs[4], regs->regs[5],
2fd6f58b	503	regs->regs[6], regs->regs[7]);
1da177e4	504	}