[deliverable/linux.git] / arch / mips / kernel / ptrace.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1992 Ross Biro
 * Copyright (C) Linus Torvalds
 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
 * Copyright (C) 1996 David S. Miller
 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
 * Copyright (C) 1999 MIPS Technologies, Inc.
 * Copyright (C) 2000 Ulf Carlsson
 *
 * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
 * binaries.
 */
#include <linux/config.h>
#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/errno.h>
#include <linux/ptrace.h>
#include <linux/audit.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/user.h>
#include <linux/security.h>
#include <linux/signal.h>

#include <asm/byteorder.h>
#include <asm/cpu.h>
#include <asm/dsp.h>
#include <asm/fpu.h>
#include <asm/mipsregs.h>
#include <asm/mipsmtregs.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/bootinfo.h>
#include <asm/reg.h>

/*
 * Called by kernel/ptrace.c when detaching..
 *
 * Make sure single step bits etc are not set.
 */
void ptrace_disable(struct task_struct *child)
{
	/* Nothing to do.. */
}

/*
 * Read a general register set.  We always use the 64-bit format, even
 * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
 * Registers are sign extended to fill the available space.
 */
int ptrace_getregs (struct task_struct *child, __s64 __user *data)
{
	struct pt_regs *regs;
	int i;

	if (!access_ok(VERIFY_WRITE, data, 38 * 8))
		return -EIO;

	regs = (struct pt_regs *) ((unsigned long) child->thread_info +
	       THREAD_SIZE - 32 - sizeof(struct pt_regs));

	for (i = 0; i < 32; i++)
		__put_user (regs->regs[i], data + i);
	__put_user (regs->lo, data + EF_LO - EF_R0);
	__put_user (regs->hi, data + EF_HI - EF_R0);
	__put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
	__put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
	__put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
	__put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);

	return 0;
}

/*
 * Write a general register set.  As for PTRACE_GETREGS, we always use
 * the 64-bit format.  On a 32-bit kernel only the lower order half
 * (according to endianness) will be used.
 */
int ptrace_setregs (struct task_struct *child, __s64 __user *data)
{
	struct pt_regs *regs;
	int i;

	if (!access_ok(VERIFY_READ, data, 38 * 8))
		return -EIO;

	regs = (struct pt_regs *) ((unsigned long) child->thread_info +
	       THREAD_SIZE - 32 - sizeof(struct pt_regs));

	for (i = 0; i < 32; i++)
		__get_user (regs->regs[i], data + i);
	__get_user (regs->lo, data + EF_LO - EF_R0);
	__get_user (regs->hi, data + EF_HI - EF_R0);
	__get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);

	/* badvaddr, status, and cause may not be written.  */

	return 0;
}

int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
{
	int i;

	if (!access_ok(VERIFY_WRITE, data, 33 * 8))
		return -EIO;

	if (tsk_used_math(child)) {
		fpureg_t *fregs = get_fpu_regs(child);
		for (i = 0; i < 32; i++)
			__put_user (fregs[i], i + (__u64 __user *) data);
	} else {
		for (i = 0; i < 32; i++)
			__put_user ((__u64) -1, i + (__u64 __user *) data);
	}

	if (cpu_has_fpu) {
		unsigned int flags, tmp;

		__put_user (child->thread.fpu.hard.fcr31, data + 64);

		preempt_disable();
		if (cpu_has_mipsmt) {
			unsigned int vpflags = dvpe();
			flags = read_c0_status();
			__enable_fpu();
			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
			write_c0_status(flags);
			evpe(vpflags);
		} else {
			flags = read_c0_status();
			__enable_fpu();
			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
			write_c0_status(flags);
		}
		preempt_enable();
		__put_user (tmp, data + 65);
	} else {
		__put_user (child->thread.fpu.soft.fcr31, data + 64);
		__put_user ((__u32) 0, data + 65);
	}

	return 0;
}

int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
{
	fpureg_t *fregs;
	int i;

	if (!access_ok(VERIFY_READ, data, 33 * 8))
		return -EIO;

	fregs = get_fpu_regs(child);

	for (i = 0; i < 32; i++)
		__get_user (fregs[i], i + (__u64 __user *) data);

	if (cpu_has_fpu)
		__get_user (child->thread.fpu.hard.fcr31, data + 64);
	else
		__get_user (child->thread.fpu.soft.fcr31, data + 64);

	/* FIR may not be written.  */

	return 0;
}

long arch_ptrace(struct task_struct *child, long request, long addr, long data)
{
	int ret;

	switch (request) {
	/* when I and D space are separate, these will need to be fixed. */
	case PTRACE_PEEKTEXT: /* read word at location addr. */
	case PTRACE_PEEKDATA: {
		unsigned long tmp;
		int copied;

		copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
		ret = -EIO;
		if (copied != sizeof(tmp))
			break;
		ret = put_user(tmp,(unsigned long __user *) data);
		break;
	}

	/* Read the word at location addr in the USER area. */
	case PTRACE_PEEKUSR: {
		struct pt_regs *regs;
		unsigned long tmp = 0;

		regs = (struct pt_regs *) ((unsigned long) child->thread_info +
		       THREAD_SIZE - 32 - sizeof(struct pt_regs));
		ret = 0;  /* Default return value. */

		switch (addr) {
		case 0 ... 31:
			tmp = regs->regs[addr];
			break;
		case FPR_BASE ... FPR_BASE + 31:
			if (tsk_used_math(child)) {
				fpureg_t *fregs = get_fpu_regs(child);

#ifdef CONFIG_32BIT
				/*
				 * The odd registers are actually the high
				 * order bits of the values stored in the even
				 * registers - unless we're using r2k_switch.S.
				 */
				if (addr & 1)
					tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
				else
					tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
#endif
#ifdef CONFIG_64BIT
				tmp = fregs[addr - FPR_BASE];
#endif
			} else {
				tmp = -1;	/* FP not yet used  */
			}
			break;
		case PC:
			tmp = regs->cp0_epc;
			break;
		case CAUSE:
			tmp = regs->cp0_cause;
			break;
		case BADVADDR:
			tmp = regs->cp0_badvaddr;
			break;
		case MMHI:
			tmp = regs->hi;
			break;
		case MMLO:
			tmp = regs->lo;
			break;
		case FPC_CSR:
			if (cpu_has_fpu)
				tmp = child->thread.fpu.hard.fcr31;
			else
				tmp = child->thread.fpu.soft.fcr31;
			break;
		case FPC_EIR: {	/* implementation / version register */
			unsigned int flags;

			if (!cpu_has_fpu)
				break;

			preempt_disable();
			if (cpu_has_mipsmt) {
				unsigned int vpflags = dvpe();
				flags = read_c0_status();
				__enable_fpu();
				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
				write_c0_status(flags);
				evpe(vpflags);
			} else {
				flags = read_c0_status();
				__enable_fpu();
				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
				write_c0_status(flags);
			}
			preempt_enable();
			break;
		}
		case DSP_BASE ... DSP_BASE + 5: {
			dspreg_t *dregs;

			if (!cpu_has_dsp) {
				tmp = 0;
				ret = -EIO;
				goto out;
			}
			if (child->thread.dsp.used_dsp) {
				dregs = __get_dsp_regs(child);
				tmp = (unsigned long) (dregs[addr - DSP_BASE]);
			} else {
				tmp = -1;	/* DSP registers yet used  */
			}
			break;
		}
		case DSP_CONTROL:
			if (!cpu_has_dsp) {
				tmp = 0;
				ret = -EIO;
				goto out;
			}
			tmp = child->thread.dsp.dspcontrol;
			break;
		default:
			tmp = 0;
			ret = -EIO;
			goto out;
		}
		ret = put_user(tmp, (unsigned long __user *) data);
		break;
	}

	/* when I and D space are separate, this will have to be fixed. */
	case PTRACE_POKETEXT: /* write the word at location addr. */
	case PTRACE_POKEDATA:
		ret = 0;
		if (access_process_vm(child, addr, &data, sizeof(data), 1)
		    == sizeof(data))
			break;
		ret = -EIO;
		break;

	case PTRACE_POKEUSR: {
		struct pt_regs *regs;
		ret = 0;
		regs = (struct pt_regs *) ((unsigned long) child->thread_info +
		       THREAD_SIZE - 32 - sizeof(struct pt_regs));

		switch (addr) {
		case 0 ... 31:
			regs->regs[addr] = data;
			break;
		case FPR_BASE ... FPR_BASE + 31: {
			fpureg_t *fregs = get_fpu_regs(child);

			if (!tsk_used_math(child)) {
				/* FP not yet used  */
				memset(&child->thread.fpu.hard, ~0,
				       sizeof(child->thread.fpu.hard));
				child->thread.fpu.hard.fcr31 = 0;
			}
#ifdef CONFIG_32BIT
			/*
			 * The odd registers are actually the high order bits
			 * of the values stored in the even registers - unless
			 * we're using r2k_switch.S.
			 */
			if (addr & 1) {
				fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
				fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
			} else {
				fregs[addr - FPR_BASE] &= ~0xffffffffLL;
				fregs[addr - FPR_BASE] |= data;
			}
#endif
#ifdef CONFIG_64BIT
			fregs[addr - FPR_BASE] = data;
#endif
			break;
		}
		case PC:
			regs->cp0_epc = data;
			break;
		case MMHI:
			regs->hi = data;
			break;
		case MMLO:
			regs->lo = data;
			break;
		case FPC_CSR:
			if (cpu_has_fpu)
				child->thread.fpu.hard.fcr31 = data;
			else
				child->thread.fpu.soft.fcr31 = data;
			break;
		case DSP_BASE ... DSP_BASE + 5: {
			dspreg_t *dregs;

			if (!cpu_has_dsp) {
				ret = -EIO;
				break;
			}

			dregs = __get_dsp_regs(child);
			dregs[addr - DSP_BASE] = data;
			break;
		}
		case DSP_CONTROL:
			if (!cpu_has_dsp) {
				ret = -EIO;
				break;
			}
			child->thread.dsp.dspcontrol = data;
			break;
		default:
			/* The rest are not allowed. */
			ret = -EIO;
			break;
		}
		break;
		}

	case PTRACE_GETREGS:
		ret = ptrace_getregs (child, (__u64 __user *) data);
		break;

	case PTRACE_SETREGS:
		ret = ptrace_setregs (child, (__u64 __user *) data);
		break;

	case PTRACE_GETFPREGS:
		ret = ptrace_getfpregs (child, (__u32 __user *) data);
		break;

	case PTRACE_SETFPREGS:
		ret = ptrace_setfpregs (child, (__u32 __user *) data);
		break;

	case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
	case PTRACE_CONT: { /* restart after signal. */
		ret = -EIO;
		if (!valid_signal(data))
			break;
		if (request == PTRACE_SYSCALL) {
			set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
		}
		else {
			clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
		}
		child->exit_code = data;
		wake_up_process(child);
		ret = 0;
		break;
	}

	/*
	 * make the child exit.  Best I can do is send it a sigkill.
	 * perhaps it should be put in the status that it wants to
	 * exit.
	 */
	case PTRACE_KILL:
		ret = 0;
		if (child->exit_state == EXIT_ZOMBIE)	/* already dead */
			break;
		child->exit_code = SIGKILL;
		wake_up_process(child);
		break;

	case PTRACE_DETACH: /* detach a process that was attached. */
		ret = ptrace_detach(child, data);
		break;

	case PTRACE_GET_THREAD_AREA:
		ret = put_user(child->thread_info->tp_value,
				(unsigned long __user *) data);
		break;

	default:
		ret = ptrace_request(child, request, addr, data);
		break;
	}
 out:
	return ret;
}

static inline int audit_arch(void)
{
	int arch = EM_MIPS;
#ifdef CONFIG_64BIT
	arch |=  __AUDIT_ARCH_64BIT;
#endif
#if defined(__LITTLE_ENDIAN)
	arch |=  __AUDIT_ARCH_LE;
#endif
	return arch;
}

/*
 * Notification of system call entry/exit
 * - triggered by current->work.syscall_trace
 */
asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
{
	if (unlikely(current->audit_context) && entryexit)
		audit_syscall_exit(current, AUDITSC_RESULT(regs->regs[2]),
		                   regs->regs[2]);

	if (!(current->ptrace & PT_PTRACED))
		goto out;
	if (!test_thread_flag(TIF_SYSCALL_TRACE))
		goto out;

	/* The 0x80 provides a way for the tracing parent to distinguish
	   between a syscall stop and SIGTRAP delivery */
	ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
	                         0x80 : 0));

	/*
	 * this isn't the same as continuing with a signal, but it will do
	 * for normal use.  strace only continues with a signal if the
	 * stopping signal is not SIGTRAP.  -brl
	 */
	if (current->exit_code) {
		send_sig(current->exit_code, current, 1);
		current->exit_code = 0;
	}
 out:
	if (unlikely(current->audit_context) && !entryexit)
		audit_syscall_entry(current, audit_arch(), regs->regs[2],
				    regs->regs[4], regs->regs[5],
				    regs->regs[6], regs->regs[7]);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1992 Ross Biro
	7	* Copyright (C) Linus Torvalds
	8	* Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
	9	* Copyright (C) 1996 David S. Miller
	10	* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
	11	* Copyright (C) 1999 MIPS Technologies, Inc.
	12	* Copyright (C) 2000 Ulf Carlsson
	13	*
	14	* At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
	15	* binaries.
	16	*/
	17	#include <linux/config.h>
	18	#include <linux/compiler.h>
	19	#include <linux/kernel.h>
	20	#include <linux/sched.h>
	21	#include <linux/mm.h>
	22	#include <linux/errno.h>
	23	#include <linux/ptrace.h>
	24	#include <linux/audit.h>
	25	#include <linux/smp.h>
	26	#include <linux/smp_lock.h>
	27	#include <linux/user.h>
	28	#include <linux/security.h>
7ed20e1a	29	#include <linux/signal.h>
1da177e4	30
f8280c8d	31	#include <asm/byteorder.h>
1da177e4	32	#include <asm/cpu.h>
e50c0a8f	33	#include <asm/dsp.h>
1da177e4 LT	34	#include <asm/fpu.h>
1da177e4 LT	35	#include <asm/mipsregs.h>
101b3531	36	#include <asm/mipsmtregs.h>
1da177e4 LT	37	#include <asm/pgtable.h>
	38	#include <asm/page.h>
	39	#include <asm/system.h>
	40	#include <asm/uaccess.h>
	41	#include <asm/bootinfo.h>
ea3d710f	42	#include <asm/reg.h>
1da177e4 LT	43
	44	/*
	45	* Called by kernel/ptrace.c when detaching..
	46	*
	47	* Make sure single step bits etc are not set.
	48	*/
	49	void ptrace_disable(struct task_struct *child)
	50	{
	51	/* Nothing to do.. */
	52	}
	53
ea3d710f DJ	54	/*
	55	* Read a general register set. We always use the 64-bit format, even
	56	* for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
	57	* Registers are sign extended to fill the available space.
	58	*/
	59	int ptrace_getregs (struct task_struct child, __s64 __user data)
	60	{
	61	struct pt_regs *regs;
	62	int i;
	63
	64	if (!access_ok(VERIFY_WRITE, data, 38 * 8))
	65	return -EIO;
	66
	67	regs = (struct pt_regs *) ((unsigned long) child->thread_info +
	68	THREAD_SIZE - 32 - sizeof(struct pt_regs));
	69
	70	for (i = 0; i < 32; i++)
	71	__put_user (regs->regs[i], data + i);
	72	__put_user (regs->lo, data + EF_LO - EF_R0);
	73	__put_user (regs->hi, data + EF_HI - EF_R0);
	74	__put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
	75	__put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
	76	__put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
	77	__put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
	78
	79	return 0;
	80	}
	81
	82	/*
	83	* Write a general register set. As for PTRACE_GETREGS, we always use
	84	* the 64-bit format. On a 32-bit kernel only the lower order half
	85	* (according to endianness) will be used.
	86	*/
	87	int ptrace_setregs (struct task_struct child, __s64 __user data)
	88	{
	89	struct pt_regs *regs;
	90	int i;
	91
	92	if (!access_ok(VERIFY_READ, data, 38 * 8))
	93	return -EIO;
	94
	95	regs = (struct pt_regs *) ((unsigned long) child->thread_info +
	96	THREAD_SIZE - 32 - sizeof(struct pt_regs));
	97
	98	for (i = 0; i < 32; i++)
	99	__get_user (regs->regs[i], data + i);
	100	__get_user (regs->lo, data + EF_LO - EF_R0);
	101	__get_user (regs->hi, data + EF_HI - EF_R0);
	102	__get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
	103
	104	/* badvaddr, status, and cause may not be written. */
	105
	106	return 0;
	107	}
	108
	109	int ptrace_getfpregs (struct task_struct child, __u32 __user data)
	110	{
	111	int i;
	112
	113	if (!access_ok(VERIFY_WRITE, data, 33 * 8))
	114	return -EIO;
	115
	116	if (tsk_used_math(child)) {
	117	fpureg_t *fregs = get_fpu_regs(child);
118	for (i = 0; i < 32; i++)
119	__put_user (fregs[i], i + (__u64 __user *) data);
120	} else {
121	for (i = 0; i < 32; i++)
122	__put_user ((__u64) -1, i + (__u64 __user *) data);
123	}
124
125	if (cpu_has_fpu) {
126	unsigned int flags, tmp;
127
128	__put_user (child->thread.fpu.hard.fcr31, data + 64);
129
101b3531 RB	130	preempt_disable();
	131	if (cpu_has_mipsmt) {
	132	unsigned int vpflags = dvpe();
	133	flags = read_c0_status();
	134	__enable_fpu();
	135	__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
	136	write_c0_status(flags);
	137	evpe(vpflags);
	138	} else {
	139	flags = read_c0_status();
	140	__enable_fpu();
	141	__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
	142	write_c0_status(flags);
	143	}
	144	preempt_enable();
ea3d710f DJ	145	__put_user (tmp, data + 65);
	146	} else {
	147	__put_user (child->thread.fpu.soft.fcr31, data + 64);
	148	__put_user ((__u32) 0, data + 65);
	149	}
	150
	151	return 0;
	152	}
	153
	154	int ptrace_setfpregs (struct task_struct child, __u32 __user data)
	155	{
	156	fpureg_t *fregs;
	157	int i;
	158
	159	if (!access_ok(VERIFY_READ, data, 33 * 8))
	160	return -EIO;
	161
	162	fregs = get_fpu_regs(child);
	163
	164	for (i = 0; i < 32; i++)
	165	__get_user (fregs[i], i + (__u64 __user *) data);
	166
	167	if (cpu_has_fpu)
	168	__get_user (child->thread.fpu.hard.fcr31, data + 64);
	169	else
	170	__get_user (child->thread.fpu.soft.fcr31, data + 64);
	171
	172	/* FIR may not be written. */
	173
	174	return 0;
	175	}
	176
481bed45	177	long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1da177e4	178	{
1da177e4 LT	179	int ret;
1da177e4 LT	180
1da177e4 LT	181	switch (request) {
	182	/* when I and D space are separate, these will need to be fixed. */
	183	case PTRACE_PEEKTEXT: /* read word at location addr. */
	184	case PTRACE_PEEKDATA: {
	185	unsigned long tmp;
	186	int copied;
	187
	188	copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
	189	ret = -EIO;
	190	if (copied != sizeof(tmp))
	191	break;
fe00f943	192	ret = put_user(tmp,(unsigned long __user *) data);
1da177e4 LT	193	break;
	194	}
	195
	196	/* Read the word at location addr in the USER area. */
	197	case PTRACE_PEEKUSR: {
	198	struct pt_regs *regs;
	199	unsigned long tmp = 0;
	200
	201	regs = (struct pt_regs *) ((unsigned long) child->thread_info +
	202	THREAD_SIZE - 32 - sizeof(struct pt_regs));
	203	ret = 0; /* Default return value. */
	204
	205	switch (addr) {
	206	case 0 ... 31:
	207	tmp = regs->regs[addr];
	208	break;
	209	case FPR_BASE ... FPR_BASE + 31:
	210	if (tsk_used_math(child)) {
	211	fpureg_t *fregs = get_fpu_regs(child);
	212
875d43e7	213	#ifdef CONFIG_32BIT
1da177e4 LT	214	/*
	215	* The odd registers are actually the high
	216	* order bits of the values stored in the even
	217	* registers - unless we're using r2k_switch.S.
	218	*/
	219	if (addr & 1)
	220	tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
	221	else
	222	tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
	223	#endif
875d43e7	224	#ifdef CONFIG_64BIT
1da177e4 LT	225	tmp = fregs[addr - FPR_BASE];
	226	#endif
	227	} else {
	228	tmp = -1; /* FP not yet used */
	229	}
	230	break;
	231	case PC:
	232	tmp = regs->cp0_epc;
	233	break;
	234	case CAUSE:
	235	tmp = regs->cp0_cause;
	236	break;
	237	case BADVADDR:
	238	tmp = regs->cp0_badvaddr;
	239	break;
	240	case MMHI:
	241	tmp = regs->hi;
	242	break;
	243	case MMLO:
	244	tmp = regs->lo;
	245	break;
	246	case FPC_CSR:
	247	if (cpu_has_fpu)
	248	tmp = child->thread.fpu.hard.fcr31;
	249	else
	250	tmp = child->thread.fpu.soft.fcr31;
	251	break;
	252	case FPC_EIR: { /* implementation / version register */
	253	unsigned int flags;
	254
	255	if (!cpu_has_fpu)
	256	break;
	257
101b3531 RB	258	preempt_disable();
	259	if (cpu_has_mipsmt) {
	260	unsigned int vpflags = dvpe();
	261	flags = read_c0_status();
	262	__enable_fpu();
	263	__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
	264	write_c0_status(flags);
	265	evpe(vpflags);
	266	} else {
	267	flags = read_c0_status();
	268	__enable_fpu();
	269	__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
	270	write_c0_status(flags);
	271	}
	272	preempt_enable();
1da177e4 LT	273	break;
1da177e4 LT	274	}
c134a5ec RB	275	case DSP_BASE ... DSP_BASE + 5: {
	276	dspreg_t *dregs;
	277
e50c0a8f RB	278	if (!cpu_has_dsp) {
	279	tmp = 0;
	280	ret = -EIO;
481bed45	281	goto out;
e50c0a8f RB	282	}
e50c0a8f RB	283	if (child->thread.dsp.used_dsp) {
c134a5ec	284	dregs = __get_dsp_regs(child);
e50c0a8f RB	285	tmp = (unsigned long) (dregs[addr - DSP_BASE]);
	286	} else {
	287	tmp = -1; /* DSP registers yet used */
	288	}
	289	break;
c134a5ec	290	}
e50c0a8f RB	291	case DSP_CONTROL:
	292	if (!cpu_has_dsp) {
	293	tmp = 0;
	294	ret = -EIO;
481bed45	295	goto out;
e50c0a8f RB	296	}
	297	tmp = child->thread.dsp.dspcontrol;
	298	break;
1da177e4 LT	299	default:
	300	tmp = 0;
	301	ret = -EIO;
481bed45	302	goto out;
1da177e4	303	}
fe00f943	304	ret = put_user(tmp, (unsigned long __user *) data);
1da177e4 LT	305	break;
	306	}
	307
	308	/* when I and D space are separate, this will have to be fixed. */
	309	case PTRACE_POKETEXT: /* write the word at location addr. */
	310	case PTRACE_POKEDATA:
	311	ret = 0;
	312	if (access_process_vm(child, addr, &data, sizeof(data), 1)
	313	== sizeof(data))
	314	break;
	315	ret = -EIO;
	316	break;
	317
	318	case PTRACE_POKEUSR: {
	319	struct pt_regs *regs;
	320	ret = 0;
	321	regs = (struct pt_regs *) ((unsigned long) child->thread_info +
	322	THREAD_SIZE - 32 - sizeof(struct pt_regs));
	323
	324	switch (addr) {
	325	case 0 ... 31:
	326	regs->regs[addr] = data;
	327	break;
	328	case FPR_BASE ... FPR_BASE + 31: {
	329	fpureg_t *fregs = get_fpu_regs(child);
	330
	331	if (!tsk_used_math(child)) {
	332	/* FP not yet used */
	333	memset(&child->thread.fpu.hard, ~0,
	334	sizeof(child->thread.fpu.hard));
	335	child->thread.fpu.hard.fcr31 = 0;
	336	}
875d43e7	337	#ifdef CONFIG_32BIT
1da177e4 LT	338	/*
	339	* The odd registers are actually the high order bits
	340	* of the values stored in the even registers - unless
	341	* we're using r2k_switch.S.
	342	*/
	343	if (addr & 1) {
	344	fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
	345	fregs[(addr & ~1) - FPR_BASE] \|= ((unsigned long long) data) << 32;
	346	} else {
	347	fregs[addr - FPR_BASE] &= ~0xffffffffLL;
	348	fregs[addr - FPR_BASE] \|= data;
	349	}
	350	#endif
875d43e7	351	#ifdef CONFIG_64BIT
1da177e4 LT	352	fregs[addr - FPR_BASE] = data;
	353	#endif
	354	break;
	355	}
	356	case PC:
	357	regs->cp0_epc = data;
	358	break;
	359	case MMHI:
	360	regs->hi = data;
	361	break;
	362	case MMLO:
	363	regs->lo = data;
	364	break;
	365	case FPC_CSR:
	366	if (cpu_has_fpu)
	367	child->thread.fpu.hard.fcr31 = data;
	368	else
	369	child->thread.fpu.soft.fcr31 = data;
	370	break;
c134a5ec RB	371	case DSP_BASE ... DSP_BASE + 5: {
	372	dspreg_t *dregs;
	373
e50c0a8f RB	374	if (!cpu_has_dsp) {
	375	ret = -EIO;
	376	break;
	377	}
	378
c134a5ec	379	dregs = __get_dsp_regs(child);
e50c0a8f RB	380	dregs[addr - DSP_BASE] = data;
e50c0a8f RB	381	break;
c134a5ec	382	}
e50c0a8f RB	383	case DSP_CONTROL:
	384	if (!cpu_has_dsp) {
	385	ret = -EIO;
	386	break;
	387	}
	388	child->thread.dsp.dspcontrol = data;
	389	break;
1da177e4 LT	390	default:
	391	/* The rest are not allowed. */
	392	ret = -EIO;
	393	break;
	394	}
	395	break;
	396	}
	397
ea3d710f DJ	398	case PTRACE_GETREGS:
	399	ret = ptrace_getregs (child, (__u64 __user *) data);
	400	break;
	401
	402	case PTRACE_SETREGS:
	403	ret = ptrace_setregs (child, (__u64 __user *) data);
	404	break;
	405
	406	case PTRACE_GETFPREGS:
	407	ret = ptrace_getfpregs (child, (__u32 __user *) data);
	408	break;
	409
	410	case PTRACE_SETFPREGS:
	411	ret = ptrace_setfpregs (child, (__u32 __user *) data);
	412	break;
	413
1da177e4 LT	414	case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
	415	case PTRACE_CONT: { /* restart after signal. */
	416	ret = -EIO;
7ed20e1a	417	if (!valid_signal(data))
1da177e4 LT	418	break;
	419	if (request == PTRACE_SYSCALL) {
	420	set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
	421	}
	422	else {
	423	clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
	424	}
	425	child->exit_code = data;
	426	wake_up_process(child);
	427	ret = 0;
	428	break;
	429	}
	430
	431	/*
	432	* make the child exit. Best I can do is send it a sigkill.
	433	* perhaps it should be put in the status that it wants to
	434	* exit.
	435	*/
	436	case PTRACE_KILL:
	437	ret = 0;
	438	if (child->exit_state == EXIT_ZOMBIE) /* already dead */
	439	break;
	440	child->exit_code = SIGKILL;
	441	wake_up_process(child);
	442	break;
	443
	444	case PTRACE_DETACH: /* detach a process that was attached. */
	445	ret = ptrace_detach(child, data);
	446	break;
	447
3c37026d RB	448	case PTRACE_GET_THREAD_AREA:
	449	ret = put_user(child->thread_info->tp_value,
	450	(unsigned long __user *) data);
	451	break;
	452
1da177e4 LT	453	default:
	454	ret = ptrace_request(child, request, addr, data);
	455	break;
	456	}
481bed45	457	out:
1da177e4 LT	458	return ret;
	459	}
	460
67eb81e1	461	static inline int audit_arch(void)
2fd6f58b	462	{
f8280c8d	463	int arch = EM_MIPS;
875d43e7	464	#ifdef CONFIG_64BIT
f8280c8d RB	465	arch \|= __AUDIT_ARCH_64BIT;
	466	#endif
	467	#if defined(__LITTLE_ENDIAN)
	468	arch \|= __AUDIT_ARCH_LE;
	469	#endif
	470	return arch;
2fd6f58b	471	}
2fd6f58b	472
1da177e4 LT	473	/*
	474	* Notification of system call entry/exit
	475	* - triggered by current->work.syscall_trace
	476	*/
	477	asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
	478	{
2fd6f58b	479	if (unlikely(current->audit_context) && entryexit)
f8280c8d RB	480	audit_syscall_exit(current, AUDITSC_RESULT(regs->regs[2]),
f8280c8d RB	481	regs->regs[2]);
1da177e4	482
1da177e4	483	if (!(current->ptrace & PT_PTRACED))
2fd6f58b	484	goto out;
f8280c8d RB	485	if (!test_thread_flag(TIF_SYSCALL_TRACE))
f8280c8d RB	486	goto out;
1da177e4 LT	487
	488	/* The 0x80 provides a way for the tracing parent to distinguish
	489	between a syscall stop and SIGTRAP delivery */
	490	ptrace_notify(SIGTRAP \| ((current->ptrace & PT_TRACESYSGOOD) ?
	491	0x80 : 0));
	492
	493	/*
	494	* this isn't the same as continuing with a signal, but it will do
	495	* for normal use. strace only continues with a signal if the
	496	* stopping signal is not SIGTRAP. -brl
	497	*/
	498	if (current->exit_code) {
	499	send_sig(current->exit_code, current, 1);
	500	current->exit_code = 0;
	501	}
2fd6f58b	502	out:
	503	if (unlikely(current->audit_context) && !entryexit)
	504	audit_syscall_entry(current, audit_arch(), regs->regs[2],
	505	regs->regs[4], regs->regs[5],
	506	regs->regs[6], regs->regs[7]);
1da177e4	507	}