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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1992 Ross Biro | |
7 | * Copyright (C) Linus Torvalds | |
8 | * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle | |
9 | * Copyright (C) 1996 David S. Miller | |
10 | * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com | |
11 | * Copyright (C) 1999 MIPS Technologies, Inc. | |
12 | * Copyright (C) 2000 Ulf Carlsson | |
13 | * | |
14 | * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit | |
15 | * binaries. | |
16 | */ | |
17 | #include <linux/compiler.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/mm.h> | |
21 | #include <linux/errno.h> | |
22 | #include <linux/ptrace.h> | |
23 | #include <linux/smp.h> | |
24 | #include <linux/smp_lock.h> | |
25 | #include <linux/user.h> | |
26 | #include <linux/security.h> | |
27 | ||
28 | #include <asm/cpu.h> | |
e50c0a8f | 29 | #include <asm/dsp.h> |
1da177e4 LT |
30 | #include <asm/fpu.h> |
31 | #include <asm/mipsregs.h> | |
101b3531 | 32 | #include <asm/mipsmtregs.h> |
1da177e4 LT |
33 | #include <asm/pgtable.h> |
34 | #include <asm/page.h> | |
35 | #include <asm/system.h> | |
36 | #include <asm/uaccess.h> | |
37 | #include <asm/bootinfo.h> | |
38 | ||
ea3d710f DJ |
39 | int ptrace_getregs (struct task_struct *child, __s64 __user *data); |
40 | int ptrace_setregs (struct task_struct *child, __s64 __user *data); | |
41 | ||
42 | int ptrace_getfpregs (struct task_struct *child, __u32 __user *data); | |
43 | int ptrace_setfpregs (struct task_struct *child, __u32 __user *data); | |
44 | ||
1da177e4 LT |
45 | /* |
46 | * Tracing a 32-bit process with a 64-bit strace and vice versa will not | |
47 | * work. I don't know how to fix this. | |
48 | */ | |
49 | asmlinkage int sys32_ptrace(int request, int pid, int addr, int data) | |
50 | { | |
51 | struct task_struct *child; | |
52 | int ret; | |
53 | ||
54 | #if 0 | |
55 | printk("ptrace(r=%d,pid=%d,addr=%08lx,data=%08lx)\n", | |
56 | (int) request, (int) pid, (unsigned long) addr, | |
57 | (unsigned long) data); | |
58 | #endif | |
59 | lock_kernel(); | |
1da177e4 | 60 | if (request == PTRACE_TRACEME) { |
6b9c7ed8 | 61 | ret = ptrace_traceme(); |
1da177e4 LT |
62 | goto out; |
63 | } | |
1da177e4 | 64 | |
6b9c7ed8 CH |
65 | child = ptrace_get_task_struct(pid); |
66 | if (IS_ERR(child)) { | |
67 | ret = PTR_ERR(child); | |
68 | goto out; | |
69 | } | |
1da177e4 LT |
70 | |
71 | if (request == PTRACE_ATTACH) { | |
72 | ret = ptrace_attach(child); | |
73 | goto out_tsk; | |
74 | } | |
75 | ||
76 | ret = ptrace_check_attach(child, request == PTRACE_KILL); | |
77 | if (ret < 0) | |
78 | goto out_tsk; | |
79 | ||
80 | switch (request) { | |
81 | /* when I and D space are separate, these will need to be fixed. */ | |
82 | case PTRACE_PEEKTEXT: /* read word at location addr. */ | |
83 | case PTRACE_PEEKDATA: { | |
84 | unsigned int tmp; | |
85 | int copied; | |
86 | ||
87 | copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); | |
88 | ret = -EIO; | |
89 | if (copied != sizeof(tmp)) | |
90 | break; | |
3055acb0 | 91 | ret = put_user(tmp, (unsigned int __user *) (unsigned long) data); |
1da177e4 LT |
92 | break; |
93 | } | |
94 | ||
ea3d710f DJ |
95 | /* |
96 | * Read 4 bytes of the other process' storage | |
97 | * data is a pointer specifying where the user wants the | |
98 | * 4 bytes copied into | |
99 | * addr is a pointer in the user's storage that contains an 8 byte | |
100 | * address in the other process of the 4 bytes that is to be read | |
101 | * (this is run in a 32-bit process looking at a 64-bit process) | |
102 | * when I and D space are separate, these will need to be fixed. | |
103 | */ | |
104 | case PTRACE_PEEKTEXT_3264: | |
105 | case PTRACE_PEEKDATA_3264: { | |
106 | u32 tmp; | |
107 | int copied; | |
108 | u32 __user * addrOthers; | |
109 | ||
110 | ret = -EIO; | |
111 | ||
112 | /* Get the addr in the other process that we want to read */ | |
113 | if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0) | |
114 | break; | |
115 | ||
116 | copied = access_process_vm(child, (u64)addrOthers, &tmp, | |
117 | sizeof(tmp), 0); | |
118 | if (copied != sizeof(tmp)) | |
119 | break; | |
120 | ret = put_user(tmp, (u32 __user *) (unsigned long) data); | |
121 | break; | |
122 | } | |
123 | ||
1da177e4 LT |
124 | /* Read the word at location addr in the USER area. */ |
125 | case PTRACE_PEEKUSR: { | |
126 | struct pt_regs *regs; | |
127 | unsigned int tmp; | |
128 | ||
40bc9c67 | 129 | regs = task_pt_regs(child); |
1da177e4 LT |
130 | ret = 0; /* Default return value. */ |
131 | ||
132 | switch (addr) { | |
133 | case 0 ... 31: | |
134 | tmp = regs->regs[addr]; | |
135 | break; | |
136 | case FPR_BASE ... FPR_BASE + 31: | |
137 | if (tsk_used_math(child)) { | |
138 | fpureg_t *fregs = get_fpu_regs(child); | |
139 | ||
140 | /* | |
141 | * The odd registers are actually the high | |
142 | * order bits of the values stored in the even | |
143 | * registers - unless we're using r2k_switch.S. | |
144 | */ | |
145 | if (addr & 1) | |
146 | tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32); | |
147 | else | |
148 | tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff); | |
149 | } else { | |
150 | tmp = -1; /* FP not yet used */ | |
151 | } | |
152 | break; | |
153 | case PC: | |
154 | tmp = regs->cp0_epc; | |
155 | break; | |
156 | case CAUSE: | |
157 | tmp = regs->cp0_cause; | |
158 | break; | |
159 | case BADVADDR: | |
160 | tmp = regs->cp0_badvaddr; | |
161 | break; | |
162 | case MMHI: | |
163 | tmp = regs->hi; | |
164 | break; | |
165 | case MMLO: | |
166 | tmp = regs->lo; | |
167 | break; | |
168 | case FPC_CSR: | |
169 | if (cpu_has_fpu) | |
170 | tmp = child->thread.fpu.hard.fcr31; | |
171 | else | |
172 | tmp = child->thread.fpu.soft.fcr31; | |
173 | break; | |
174 | case FPC_EIR: { /* implementation / version register */ | |
175 | unsigned int flags; | |
41c594ab RB |
176 | #ifdef CONFIG_MIPS_MT_SMTC |
177 | unsigned int irqflags; | |
178 | unsigned int mtflags; | |
179 | #endif /* CONFIG_MIPS_MT_SMTC */ | |
1da177e4 | 180 | |
3055acb0 AN |
181 | if (!cpu_has_fpu) { |
182 | tmp = 0; | |
1da177e4 | 183 | break; |
3055acb0 | 184 | } |
1da177e4 | 185 | |
41c594ab RB |
186 | #ifdef CONFIG_MIPS_MT_SMTC |
187 | /* Read-modify-write of Status must be atomic */ | |
188 | local_irq_save(irqflags); | |
189 | mtflags = dmt(); | |
190 | #endif /* CONFIG_MIPS_MT_SMTC */ | |
191 | ||
101b3531 RB |
192 | preempt_disable(); |
193 | if (cpu_has_mipsmt) { | |
194 | unsigned int vpflags = dvpe(); | |
195 | flags = read_c0_status(); | |
196 | __enable_fpu(); | |
197 | __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp)); | |
198 | write_c0_status(flags); | |
199 | evpe(vpflags); | |
200 | } else { | |
201 | flags = read_c0_status(); | |
202 | __enable_fpu(); | |
203 | __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp)); | |
204 | write_c0_status(flags); | |
205 | } | |
41c594ab RB |
206 | #ifdef CONFIG_MIPS_MT_SMTC |
207 | emt(mtflags); | |
208 | local_irq_restore(irqflags); | |
209 | #endif /* CONFIG_MIPS_MT_SMTC */ | |
101b3531 | 210 | preempt_enable(); |
1da177e4 LT |
211 | break; |
212 | } | |
3055acb0 AN |
213 | case DSP_BASE ... DSP_BASE + 5: { |
214 | dspreg_t *dregs; | |
215 | ||
e50c0a8f RB |
216 | if (!cpu_has_dsp) { |
217 | tmp = 0; | |
218 | ret = -EIO; | |
219 | goto out_tsk; | |
220 | } | |
3055acb0 | 221 | dregs = __get_dsp_regs(child); |
6c355852 | 222 | tmp = (unsigned long) (dregs[addr - DSP_BASE]); |
e50c0a8f | 223 | break; |
3055acb0 | 224 | } |
e50c0a8f RB |
225 | case DSP_CONTROL: |
226 | if (!cpu_has_dsp) { | |
227 | tmp = 0; | |
228 | ret = -EIO; | |
229 | goto out_tsk; | |
230 | } | |
231 | tmp = child->thread.dsp.dspcontrol; | |
232 | break; | |
1da177e4 LT |
233 | default: |
234 | tmp = 0; | |
235 | ret = -EIO; | |
236 | goto out_tsk; | |
237 | } | |
3055acb0 | 238 | ret = put_user(tmp, (unsigned __user *) (unsigned long) data); |
1da177e4 LT |
239 | break; |
240 | } | |
241 | ||
242 | /* when I and D space are separate, this will have to be fixed. */ | |
243 | case PTRACE_POKETEXT: /* write the word at location addr. */ | |
244 | case PTRACE_POKEDATA: | |
245 | ret = 0; | |
246 | if (access_process_vm(child, addr, &data, sizeof(data), 1) | |
247 | == sizeof(data)) | |
248 | break; | |
249 | ret = -EIO; | |
250 | break; | |
251 | ||
ea3d710f DJ |
252 | /* |
253 | * Write 4 bytes into the other process' storage | |
254 | * data is the 4 bytes that the user wants written | |
255 | * addr is a pointer in the user's storage that contains an | |
256 | * 8 byte address in the other process where the 4 bytes | |
257 | * that is to be written | |
258 | * (this is run in a 32-bit process looking at a 64-bit process) | |
259 | * when I and D space are separate, these will need to be fixed. | |
260 | */ | |
261 | case PTRACE_POKETEXT_3264: | |
262 | case PTRACE_POKEDATA_3264: { | |
263 | u32 __user * addrOthers; | |
264 | ||
265 | /* Get the addr in the other process that we want to write into */ | |
266 | ret = -EIO; | |
267 | if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0) | |
268 | break; | |
269 | ret = 0; | |
270 | if (access_process_vm(child, (u64)addrOthers, &data, | |
271 | sizeof(data), 1) == sizeof(data)) | |
272 | break; | |
273 | ret = -EIO; | |
274 | break; | |
275 | } | |
276 | ||
1da177e4 LT |
277 | case PTRACE_POKEUSR: { |
278 | struct pt_regs *regs; | |
279 | ret = 0; | |
40bc9c67 | 280 | regs = task_pt_regs(child); |
1da177e4 LT |
281 | |
282 | switch (addr) { | |
283 | case 0 ... 31: | |
284 | regs->regs[addr] = data; | |
285 | break; | |
286 | case FPR_BASE ... FPR_BASE + 31: { | |
287 | fpureg_t *fregs = get_fpu_regs(child); | |
288 | ||
289 | if (!tsk_used_math(child)) { | |
290 | /* FP not yet used */ | |
291 | memset(&child->thread.fpu.hard, ~0, | |
292 | sizeof(child->thread.fpu.hard)); | |
293 | child->thread.fpu.hard.fcr31 = 0; | |
294 | } | |
295 | /* | |
296 | * The odd registers are actually the high order bits | |
297 | * of the values stored in the even registers - unless | |
298 | * we're using r2k_switch.S. | |
299 | */ | |
300 | if (addr & 1) { | |
301 | fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff; | |
302 | fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32; | |
303 | } else { | |
304 | fregs[addr - FPR_BASE] &= ~0xffffffffLL; | |
305 | /* Must cast, lest sign extension fill upper | |
306 | bits! */ | |
307 | fregs[addr - FPR_BASE] |= (unsigned int)data; | |
308 | } | |
309 | break; | |
310 | } | |
311 | case PC: | |
312 | regs->cp0_epc = data; | |
313 | break; | |
314 | case MMHI: | |
315 | regs->hi = data; | |
316 | break; | |
317 | case MMLO: | |
318 | regs->lo = data; | |
319 | break; | |
320 | case FPC_CSR: | |
321 | if (cpu_has_fpu) | |
322 | child->thread.fpu.hard.fcr31 = data; | |
323 | else | |
324 | child->thread.fpu.soft.fcr31 = data; | |
325 | break; | |
3055acb0 AN |
326 | case DSP_BASE ... DSP_BASE + 5: { |
327 | dspreg_t *dregs; | |
328 | ||
e50c0a8f RB |
329 | if (!cpu_has_dsp) { |
330 | ret = -EIO; | |
331 | break; | |
332 | } | |
333 | ||
3055acb0 | 334 | dregs = __get_dsp_regs(child); |
e50c0a8f RB |
335 | dregs[addr - DSP_BASE] = data; |
336 | break; | |
3055acb0 | 337 | } |
e50c0a8f RB |
338 | case DSP_CONTROL: |
339 | if (!cpu_has_dsp) { | |
340 | ret = -EIO; | |
341 | break; | |
342 | } | |
343 | child->thread.dsp.dspcontrol = data; | |
344 | break; | |
1da177e4 LT |
345 | default: |
346 | /* The rest are not allowed. */ | |
347 | ret = -EIO; | |
348 | break; | |
349 | } | |
350 | break; | |
351 | } | |
352 | ||
ea3d710f DJ |
353 | case PTRACE_GETREGS: |
354 | ret = ptrace_getregs (child, (__u64 __user *) (__u64) data); | |
355 | break; | |
356 | ||
357 | case PTRACE_SETREGS: | |
358 | ret = ptrace_setregs (child, (__u64 __user *) (__u64) data); | |
359 | break; | |
360 | ||
361 | case PTRACE_GETFPREGS: | |
362 | ret = ptrace_getfpregs (child, (__u32 __user *) (__u64) data); | |
363 | break; | |
364 | ||
365 | case PTRACE_SETFPREGS: | |
366 | ret = ptrace_setfpregs (child, (__u32 __user *) (__u64) data); | |
367 | break; | |
368 | ||
1da177e4 LT |
369 | case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ |
370 | case PTRACE_CONT: { /* restart after signal. */ | |
371 | ret = -EIO; | |
7ed20e1a | 372 | if (!valid_signal(data)) |
1da177e4 LT |
373 | break; |
374 | if (request == PTRACE_SYSCALL) { | |
375 | set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
376 | } | |
377 | else { | |
378 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
379 | } | |
380 | child->exit_code = data; | |
381 | wake_up_process(child); | |
382 | ret = 0; | |
383 | break; | |
384 | } | |
385 | ||
386 | /* | |
387 | * make the child exit. Best I can do is send it a sigkill. | |
388 | * perhaps it should be put in the status that it wants to | |
389 | * exit. | |
390 | */ | |
391 | case PTRACE_KILL: | |
392 | ret = 0; | |
393 | if (child->exit_state == EXIT_ZOMBIE) /* already dead */ | |
394 | break; | |
395 | child->exit_code = SIGKILL; | |
396 | wake_up_process(child); | |
397 | break; | |
398 | ||
3c37026d | 399 | case PTRACE_GET_THREAD_AREA: |
dc8f6029 | 400 | ret = put_user(task_thread_info(child)->tp_value, |
3c37026d RB |
401 | (unsigned int __user *) (unsigned long) data); |
402 | break; | |
403 | ||
1da177e4 LT |
404 | case PTRACE_DETACH: /* detach a process that was attached. */ |
405 | ret = ptrace_detach(child, data); | |
406 | break; | |
407 | ||
09276d90 RB |
408 | case PTRACE_GETEVENTMSG: |
409 | ret = put_user(child->ptrace_message, | |
410 | (unsigned int __user *) (unsigned long) data); | |
411 | break; | |
412 | ||
ea3d710f | 413 | case PTRACE_GET_THREAD_AREA_3264: |
dc8f6029 | 414 | ret = put_user(task_thread_info(child)->tp_value, |
ea3d710f DJ |
415 | (unsigned long __user *) (unsigned long) data); |
416 | break; | |
417 | ||
1da177e4 LT |
418 | default: |
419 | ret = ptrace_request(child, request, addr, data); | |
420 | break; | |
421 | } | |
422 | ||
423 | out_tsk: | |
424 | put_task_struct(child); | |
425 | out: | |
426 | unlock_kernel(); | |
427 | return ret; | |
428 | } |