Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1995 Linus Torvalds | |
7 | * Copyright (C) 1995 Waldorf Electronics | |
8 | * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 01, 02, 03 Ralf Baechle | |
9 | * Copyright (C) 1996 Stoned Elipot | |
10 | * Copyright (C) 1999 Silicon Graphics, Inc. | |
11 | * Copyright (C) 2000 2001, 2002 Maciej W. Rozycki | |
12 | */ | |
1da177e4 LT |
13 | #include <linux/errno.h> |
14 | #include <linux/init.h> | |
15 | #include <linux/ioport.h> | |
16 | #include <linux/sched.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/mm.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/stddef.h> | |
21 | #include <linux/string.h> | |
22 | #include <linux/unistd.h> | |
23 | #include <linux/slab.h> | |
24 | #include <linux/user.h> | |
25 | #include <linux/utsname.h> | |
26 | #include <linux/a.out.h> | |
894673ee | 27 | #include <linux/screen_info.h> |
1da177e4 LT |
28 | #include <linux/bootmem.h> |
29 | #include <linux/initrd.h> | |
30 | #include <linux/major.h> | |
31 | #include <linux/kdev_t.h> | |
32 | #include <linux/root_dev.h> | |
33 | #include <linux/highmem.h> | |
34 | #include <linux/console.h> | |
b4819b59 | 35 | #include <linux/mmzone.h> |
22a9835c | 36 | #include <linux/pfn.h> |
1da177e4 LT |
37 | |
38 | #include <asm/addrspace.h> | |
39 | #include <asm/bootinfo.h> | |
ec74e361 | 40 | #include <asm/cache.h> |
1da177e4 LT |
41 | #include <asm/cpu.h> |
42 | #include <asm/sections.h> | |
43 | #include <asm/setup.h> | |
44 | #include <asm/system.h> | |
45 | ||
ec74e361 | 46 | struct cpuinfo_mips cpu_data[NR_CPUS] __read_mostly; |
1da177e4 LT |
47 | |
48 | EXPORT_SYMBOL(cpu_data); | |
49 | ||
50 | #ifdef CONFIG_VT | |
51 | struct screen_info screen_info; | |
52 | #endif | |
53 | ||
54 | /* | |
55 | * Despite it's name this variable is even if we don't have PCI | |
56 | */ | |
57 | unsigned int PCI_DMA_BUS_IS_PHYS; | |
58 | ||
59 | EXPORT_SYMBOL(PCI_DMA_BUS_IS_PHYS); | |
60 | ||
61 | /* | |
62 | * Setup information | |
63 | * | |
64 | * These are initialized so they are in the .data section | |
65 | */ | |
ec74e361 RB |
66 | unsigned long mips_machtype __read_mostly = MACH_UNKNOWN; |
67 | unsigned long mips_machgroup __read_mostly = MACH_GROUP_UNKNOWN; | |
1da177e4 LT |
68 | |
69 | EXPORT_SYMBOL(mips_machtype); | |
70 | EXPORT_SYMBOL(mips_machgroup); | |
71 | ||
72 | struct boot_mem_map boot_mem_map; | |
73 | ||
74 | static char command_line[CL_SIZE]; | |
75 | char arcs_cmdline[CL_SIZE]=CONFIG_CMDLINE; | |
76 | ||
77 | /* | |
78 | * mips_io_port_base is the begin of the address space to which x86 style | |
79 | * I/O ports are mapped. | |
80 | */ | |
ec74e361 | 81 | const unsigned long mips_io_port_base __read_mostly = -1; |
1da177e4 LT |
82 | EXPORT_SYMBOL(mips_io_port_base); |
83 | ||
84 | /* | |
85 | * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped | |
86 | * for the processor. | |
87 | */ | |
88 | unsigned long isa_slot_offset; | |
89 | EXPORT_SYMBOL(isa_slot_offset); | |
90 | ||
91 | static struct resource code_resource = { .name = "Kernel code", }; | |
92 | static struct resource data_resource = { .name = "Kernel data", }; | |
93 | ||
94 | void __init add_memory_region(phys_t start, phys_t size, long type) | |
95 | { | |
96 | int x = boot_mem_map.nr_map; | |
97 | struct boot_mem_map_entry *prev = boot_mem_map.map + x - 1; | |
98 | ||
b6f1f0de FBH |
99 | /* Sanity check */ |
100 | if (start + size < start) { | |
101 | printk("Trying to add an invalid memory region, skipped\n"); | |
102 | return; | |
103 | } | |
104 | ||
1da177e4 LT |
105 | /* |
106 | * Try to merge with previous entry if any. This is far less than | |
107 | * perfect but is sufficient for most real world cases. | |
108 | */ | |
109 | if (x && prev->addr + prev->size == start && prev->type == type) { | |
110 | prev->size += size; | |
111 | return; | |
112 | } | |
113 | ||
114 | if (x == BOOT_MEM_MAP_MAX) { | |
115 | printk("Ooops! Too many entries in the memory map!\n"); | |
116 | return; | |
117 | } | |
118 | ||
119 | boot_mem_map.map[x].addr = start; | |
120 | boot_mem_map.map[x].size = size; | |
121 | boot_mem_map.map[x].type = type; | |
122 | boot_mem_map.nr_map++; | |
123 | } | |
124 | ||
125 | static void __init print_memory_map(void) | |
126 | { | |
127 | int i; | |
128 | const int field = 2 * sizeof(unsigned long); | |
129 | ||
130 | for (i = 0; i < boot_mem_map.nr_map; i++) { | |
131 | printk(" memory: %0*Lx @ %0*Lx ", | |
132 | field, (unsigned long long) boot_mem_map.map[i].size, | |
133 | field, (unsigned long long) boot_mem_map.map[i].addr); | |
134 | ||
135 | switch (boot_mem_map.map[i].type) { | |
136 | case BOOT_MEM_RAM: | |
137 | printk("(usable)\n"); | |
138 | break; | |
139 | case BOOT_MEM_ROM_DATA: | |
140 | printk("(ROM data)\n"); | |
141 | break; | |
142 | case BOOT_MEM_RESERVED: | |
143 | printk("(reserved)\n"); | |
144 | break; | |
145 | default: | |
146 | printk("type %lu\n", boot_mem_map.map[i].type); | |
147 | break; | |
148 | } | |
149 | } | |
150 | } | |
151 | ||
152 | static inline void parse_cmdline_early(void) | |
153 | { | |
154 | char c = ' ', *to = command_line, *from = saved_command_line; | |
155 | unsigned long start_at, mem_size; | |
156 | int len = 0; | |
157 | int usermem = 0; | |
158 | ||
159 | printk("Determined physical RAM map:\n"); | |
160 | print_memory_map(); | |
161 | ||
162 | for (;;) { | |
163 | /* | |
164 | * "mem=XXX[kKmM]" defines a memory region from | |
165 | * 0 to <XXX>, overriding the determined size. | |
166 | * "mem=XXX[KkmM]@YYY[KkmM]" defines a memory region from | |
167 | * <YYY> to <YYY>+<XXX>, overriding the determined size. | |
168 | */ | |
169 | if (c == ' ' && !memcmp(from, "mem=", 4)) { | |
170 | if (to != command_line) | |
171 | to--; | |
172 | /* | |
173 | * If a user specifies memory size, we | |
174 | * blow away any automatically generated | |
175 | * size. | |
176 | */ | |
177 | if (usermem == 0) { | |
178 | boot_mem_map.nr_map = 0; | |
179 | usermem = 1; | |
180 | } | |
181 | mem_size = memparse(from + 4, &from); | |
182 | if (*from == '@') | |
183 | start_at = memparse(from + 1, &from); | |
184 | else | |
185 | start_at = 0; | |
186 | add_memory_region(start_at, mem_size, BOOT_MEM_RAM); | |
187 | } | |
188 | c = *(from++); | |
189 | if (!c) | |
190 | break; | |
191 | if (CL_SIZE <= ++len) | |
192 | break; | |
193 | *(to++) = c; | |
194 | } | |
195 | *to = '\0'; | |
196 | ||
197 | if (usermem) { | |
198 | printk("User-defined physical RAM map:\n"); | |
199 | print_memory_map(); | |
200 | } | |
201 | } | |
202 | ||
203 | static inline int parse_rd_cmdline(unsigned long* rd_start, unsigned long* rd_end) | |
204 | { | |
205 | /* | |
206 | * "rd_start=0xNNNNNNNN" defines the memory address of an initrd | |
207 | * "rd_size=0xNN" it's size | |
208 | */ | |
209 | unsigned long start = 0; | |
210 | unsigned long size = 0; | |
211 | unsigned long end; | |
212 | char cmd_line[CL_SIZE]; | |
213 | char *start_str; | |
214 | char *size_str; | |
215 | char *tmp; | |
216 | ||
217 | strcpy(cmd_line, command_line); | |
218 | *command_line = 0; | |
219 | tmp = cmd_line; | |
220 | /* Ignore "rd_start=" strings in other parameters. */ | |
221 | start_str = strstr(cmd_line, "rd_start="); | |
222 | if (start_str && start_str != cmd_line && *(start_str - 1) != ' ') | |
223 | start_str = strstr(start_str, " rd_start="); | |
224 | while (start_str) { | |
225 | if (start_str != cmd_line) | |
226 | strncat(command_line, tmp, start_str - tmp); | |
227 | start = memparse(start_str + 9, &start_str); | |
228 | tmp = start_str + 1; | |
229 | start_str = strstr(start_str, " rd_start="); | |
230 | } | |
231 | if (*tmp) | |
232 | strcat(command_line, tmp); | |
233 | ||
234 | strcpy(cmd_line, command_line); | |
235 | *command_line = 0; | |
236 | tmp = cmd_line; | |
237 | /* Ignore "rd_size" strings in other parameters. */ | |
238 | size_str = strstr(cmd_line, "rd_size="); | |
239 | if (size_str && size_str != cmd_line && *(size_str - 1) != ' ') | |
240 | size_str = strstr(size_str, " rd_size="); | |
241 | while (size_str) { | |
242 | if (size_str != cmd_line) | |
243 | strncat(command_line, tmp, size_str - tmp); | |
244 | size = memparse(size_str + 8, &size_str); | |
245 | tmp = size_str + 1; | |
246 | size_str = strstr(size_str, " rd_size="); | |
247 | } | |
248 | if (*tmp) | |
249 | strcat(command_line, tmp); | |
250 | ||
875d43e7 | 251 | #ifdef CONFIG_64BIT |
1da177e4 LT |
252 | /* HACK: Guess if the sign extension was forgotten */ |
253 | if (start > 0x0000000080000000 && start < 0x00000000ffffffff) | |
460c0422 | 254 | start |= 0xffffffff00000000UL; |
1da177e4 LT |
255 | #endif |
256 | ||
257 | end = start + size; | |
258 | if (start && end) { | |
259 | *rd_start = start; | |
260 | *rd_end = end; | |
261 | return 1; | |
262 | } | |
263 | return 0; | |
264 | } | |
265 | ||
b6f1f0de FBH |
266 | /* |
267 | * Initialize the bootmem allocator. It also setup initrd related data | |
268 | * if needed. | |
269 | */ | |
270 | static void __init bootmem_init(void) | |
1da177e4 | 271 | { |
1da177e4 LT |
272 | unsigned long reserved_end = (unsigned long)&_end; |
273 | #ifndef CONFIG_SGI_IP27 | |
b6f1f0de FBH |
274 | unsigned long highest = 0; |
275 | unsigned long mapstart = -1UL; | |
1da177e4 LT |
276 | unsigned long bootmap_size; |
277 | int i; | |
278 | #endif | |
279 | #ifdef CONFIG_BLK_DEV_INITRD | |
280 | int initrd_reserve_bootmem = 0; | |
281 | ||
282 | /* Board specific code should have set up initrd_start and initrd_end */ | |
283 | ROOT_DEV = Root_RAM0; | |
284 | if (parse_rd_cmdline(&initrd_start, &initrd_end)) { | |
285 | reserved_end = max(reserved_end, initrd_end); | |
286 | initrd_reserve_bootmem = 1; | |
287 | } else { | |
288 | unsigned long tmp; | |
289 | u32 *initrd_header; | |
290 | ||
b6f1f0de | 291 | tmp = PAGE_ALIGN(reserved_end) - sizeof(u32) * 2; |
1da177e4 LT |
292 | if (tmp < reserved_end) |
293 | tmp += PAGE_SIZE; | |
294 | initrd_header = (u32 *)tmp; | |
295 | if (initrd_header[0] == 0x494E5244) { | |
296 | initrd_start = (unsigned long)&initrd_header[2]; | |
297 | initrd_end = initrd_start + initrd_header[1]; | |
298 | reserved_end = max(reserved_end, initrd_end); | |
299 | initrd_reserve_bootmem = 1; | |
300 | } | |
301 | } | |
302 | #endif /* CONFIG_BLK_DEV_INITRD */ | |
303 | ||
b6f1f0de | 304 | #ifndef CONFIG_SGI_IP27 |
1da177e4 | 305 | /* |
b6f1f0de | 306 | * reserved_end is now a pfn |
1da177e4 | 307 | */ |
b6f1f0de | 308 | reserved_end = PFN_UP(CPHYSADDR(reserved_end)); |
1da177e4 | 309 | |
b6f1f0de FBH |
310 | /* |
311 | * Find the highest page frame number we have available. | |
312 | */ | |
1da177e4 LT |
313 | for (i = 0; i < boot_mem_map.nr_map; i++) { |
314 | unsigned long start, end; | |
315 | ||
316 | if (boot_mem_map.map[i].type != BOOT_MEM_RAM) | |
317 | continue; | |
318 | ||
319 | start = PFN_UP(boot_mem_map.map[i].addr); | |
320 | end = PFN_DOWN(boot_mem_map.map[i].addr | |
b6f1f0de | 321 | + boot_mem_map.map[i].size); |
1da177e4 | 322 | |
b6f1f0de FBH |
323 | if (end > highest) |
324 | highest = end; | |
325 | if (end <= reserved_end) | |
1da177e4 | 326 | continue; |
b6f1f0de FBH |
327 | if (start >= mapstart) |
328 | continue; | |
329 | mapstart = max(reserved_end, start); | |
1da177e4 LT |
330 | } |
331 | ||
332 | /* | |
333 | * Determine low and high memory ranges | |
334 | */ | |
b6f1f0de FBH |
335 | if (highest > PFN_DOWN(HIGHMEM_START)) { |
336 | #ifdef CONFIG_HIGHMEM | |
337 | highstart_pfn = PFN_DOWN(HIGHMEM_START); | |
338 | highend_pfn = highest; | |
1da177e4 | 339 | #endif |
b6f1f0de | 340 | highest = PFN_DOWN(HIGHMEM_START); |
1da177e4 LT |
341 | } |
342 | ||
1da177e4 | 343 | /* |
b6f1f0de | 344 | * Initialize the boot-time allocator with low memory only. |
1da177e4 | 345 | */ |
b6f1f0de | 346 | bootmap_size = init_bootmem(mapstart, highest); |
1da177e4 LT |
347 | |
348 | /* | |
349 | * Register fully available low RAM pages with the bootmem allocator. | |
350 | */ | |
351 | for (i = 0; i < boot_mem_map.nr_map; i++) { | |
b6f1f0de | 352 | unsigned long start, end, size; |
1da177e4 LT |
353 | |
354 | /* | |
355 | * Reserve usable memory. | |
356 | */ | |
357 | if (boot_mem_map.map[i].type != BOOT_MEM_RAM) | |
358 | continue; | |
359 | ||
b6f1f0de FBH |
360 | start = PFN_UP(boot_mem_map.map[i].addr); |
361 | end = PFN_DOWN(boot_mem_map.map[i].addr | |
1da177e4 | 362 | + boot_mem_map.map[i].size); |
1da177e4 | 363 | /* |
b6f1f0de FBH |
364 | * We are rounding up the start address of usable memory |
365 | * and at the end of the usable range downwards. | |
1da177e4 | 366 | */ |
b6f1f0de | 367 | if (start >= max_low_pfn) |
1da177e4 | 368 | continue; |
b6f1f0de FBH |
369 | if (start < reserved_end) |
370 | start = reserved_end; | |
371 | if (end > max_low_pfn) | |
372 | end = max_low_pfn; | |
1da177e4 LT |
373 | |
374 | /* | |
b6f1f0de | 375 | * ... finally, is the area going away? |
1da177e4 | 376 | */ |
b6f1f0de | 377 | if (end <= start) |
1da177e4 | 378 | continue; |
b6f1f0de | 379 | size = end - start; |
1da177e4 LT |
380 | |
381 | /* Register lowmem ranges */ | |
b6f1f0de FBH |
382 | free_bootmem(PFN_PHYS(start), size << PAGE_SHIFT); |
383 | memory_present(0, start, end); | |
1da177e4 LT |
384 | } |
385 | ||
b6f1f0de FBH |
386 | /* |
387 | * Reserve the bootmap memory. | |
388 | */ | |
389 | reserve_bootmem(PFN_PHYS(mapstart), bootmap_size); | |
390 | ||
1da177e4 LT |
391 | #endif /* CONFIG_SGI_IP27 */ |
392 | ||
393 | #ifdef CONFIG_BLK_DEV_INITRD | |
394 | initrd_below_start_ok = 1; | |
395 | if (initrd_start) { | |
ecf52d3c AN |
396 | unsigned long initrd_size = ((unsigned char *)initrd_end) - |
397 | ((unsigned char *)initrd_start); | |
398 | const int width = sizeof(long) * 2; | |
399 | ||
1da177e4 LT |
400 | printk("Initial ramdisk at: 0x%p (%lu bytes)\n", |
401 | (void *)initrd_start, initrd_size); | |
402 | ||
403 | if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) { | |
404 | printk("initrd extends beyond end of memory " | |
405 | "(0x%0*Lx > 0x%0*Lx)\ndisabling initrd\n", | |
ecf52d3c AN |
406 | width, |
407 | (unsigned long long) CPHYSADDR(initrd_end), | |
408 | width, | |
409 | (unsigned long long) PFN_PHYS(max_low_pfn)); | |
1da177e4 LT |
410 | initrd_start = initrd_end = 0; |
411 | initrd_reserve_bootmem = 0; | |
412 | } | |
413 | ||
414 | if (initrd_reserve_bootmem) | |
415 | reserve_bootmem(CPHYSADDR(initrd_start), initrd_size); | |
416 | } | |
417 | #endif /* CONFIG_BLK_DEV_INITRD */ | |
418 | } | |
419 | ||
2925aba4 RB |
420 | /* |
421 | * arch_mem_init - initialize memory managment subsystem | |
422 | * | |
423 | * o plat_mem_setup() detects the memory configuration and will record detected | |
424 | * memory areas using add_memory_region. | |
425 | * o parse_cmdline_early() parses the command line for mem= options which, | |
426 | * iff detected, will override the results of the automatic detection. | |
427 | * | |
428 | * At this stage the memory configuration of the system is known to the | |
429 | * kernel but generic memory managment system is still entirely uninitialized. | |
430 | * | |
431 | * o bootmem_init() | |
432 | * o sparse_init() | |
433 | * o paging_init() | |
434 | * | |
435 | * At this stage the bootmem allocator is ready to use. | |
436 | * | |
437 | * NOTE: historically plat_mem_setup did the entire platform initialization. | |
438 | * This was rather impractical because it meant plat_mem_setup had to | |
439 | * get away without any kind of memory allocator. To keep old code from | |
440 | * breaking plat_setup was just renamed to plat_setup and a second platform | |
441 | * initialization hook for anything else was introduced. | |
442 | */ | |
443 | ||
444 | extern void plat_mem_setup(void); | |
445 | ||
446 | static void __init arch_mem_init(char **cmdline_p) | |
447 | { | |
448 | /* call board setup routine */ | |
449 | plat_mem_setup(); | |
450 | ||
451 | strlcpy(command_line, arcs_cmdline, sizeof(command_line)); | |
452 | strlcpy(saved_command_line, command_line, COMMAND_LINE_SIZE); | |
453 | ||
454 | *cmdline_p = command_line; | |
455 | ||
456 | parse_cmdline_early(); | |
457 | bootmem_init(); | |
458 | sparse_init(); | |
459 | paging_init(); | |
460 | } | |
461 | ||
b6f1f0de FBH |
462 | #define MAXMEM HIGHMEM_START |
463 | #define MAXMEM_PFN PFN_DOWN(MAXMEM) | |
464 | ||
1da177e4 LT |
465 | static inline void resource_init(void) |
466 | { | |
467 | int i; | |
468 | ||
6adb5fe7 RB |
469 | if (UNCAC_BASE != IO_BASE) |
470 | return; | |
471 | ||
1da177e4 LT |
472 | code_resource.start = virt_to_phys(&_text); |
473 | code_resource.end = virt_to_phys(&_etext) - 1; | |
474 | data_resource.start = virt_to_phys(&_etext); | |
475 | data_resource.end = virt_to_phys(&_edata) - 1; | |
1da177e4 LT |
476 | |
477 | /* | |
478 | * Request address space for all standard RAM. | |
479 | */ | |
480 | for (i = 0; i < boot_mem_map.nr_map; i++) { | |
481 | struct resource *res; | |
482 | unsigned long start, end; | |
483 | ||
484 | start = boot_mem_map.map[i].addr; | |
485 | end = boot_mem_map.map[i].addr + boot_mem_map.map[i].size - 1; | |
486 | if (start >= MAXMEM) | |
487 | continue; | |
488 | if (end >= MAXMEM) | |
489 | end = MAXMEM - 1; | |
490 | ||
491 | res = alloc_bootmem(sizeof(struct resource)); | |
492 | switch (boot_mem_map.map[i].type) { | |
493 | case BOOT_MEM_RAM: | |
494 | case BOOT_MEM_ROM_DATA: | |
495 | res->name = "System RAM"; | |
496 | break; | |
497 | case BOOT_MEM_RESERVED: | |
498 | default: | |
499 | res->name = "reserved"; | |
500 | } | |
501 | ||
502 | res->start = start; | |
503 | res->end = end; | |
504 | ||
505 | res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; | |
506 | request_resource(&iomem_resource, res); | |
507 | ||
508 | /* | |
509 | * We don't know which RAM region contains kernel data, | |
510 | * so we try it repeatedly and let the resource manager | |
511 | * test it. | |
512 | */ | |
513 | request_resource(res, &code_resource); | |
514 | request_resource(res, &data_resource); | |
515 | } | |
516 | } | |
517 | ||
1da177e4 LT |
518 | #undef MAXMEM |
519 | #undef MAXMEM_PFN | |
520 | ||
1da177e4 LT |
521 | void __init setup_arch(char **cmdline_p) |
522 | { | |
523 | cpu_probe(); | |
524 | prom_init(); | |
525 | cpu_report(); | |
526 | ||
527 | #if defined(CONFIG_VT) | |
528 | #if defined(CONFIG_VGA_CONSOLE) | |
529 | conswitchp = &vga_con; | |
530 | #elif defined(CONFIG_DUMMY_CONSOLE) | |
531 | conswitchp = &dummy_con; | |
532 | #endif | |
533 | #endif | |
534 | ||
2925aba4 | 535 | arch_mem_init(cmdline_p); |
1da177e4 | 536 | |
1da177e4 | 537 | resource_init(); |
9b6695a8 RB |
538 | #ifdef CONFIG_SMP |
539 | plat_smp_setup(); | |
540 | #endif | |
1da177e4 LT |
541 | } |
542 | ||
543 | int __init fpu_disable(char *s) | |
544 | { | |
f088fc84 RB |
545 | int i; |
546 | ||
547 | for (i = 0; i < NR_CPUS; i++) | |
548 | cpu_data[i].options &= ~MIPS_CPU_FPU; | |
1da177e4 LT |
549 | |
550 | return 1; | |
551 | } | |
552 | ||
553 | __setup("nofpu", fpu_disable); | |
e50c0a8f RB |
554 | |
555 | int __init dsp_disable(char *s) | |
556 | { | |
557 | cpu_data[0].ases &= ~MIPS_ASE_DSP; | |
558 | ||
559 | return 1; | |
560 | } | |
561 | ||
562 | __setup("nodsp", dsp_disable); |